Lines Matching +full:iommu +full:- +full:secure +full:- +full:id
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2017-2021 NVIDIA CORPORATION. All rights reserved.
7 #include <linux/iommu.h>
17 #include <dt-bindings/memory/tegra186-mc.h>
28 struct platform_device *pdev = to_platform_device(mc->dev); in tegra186_mc_probe()
33 mc->bcast_ch_regs = devm_platform_ioremap_resource_byname(pdev, "broadcast"); in tegra186_mc_probe()
34 if (IS_ERR(mc->bcast_ch_regs)) { in tegra186_mc_probe()
35 if (PTR_ERR(mc->bcast_ch_regs) == -EINVAL) { in tegra186_mc_probe()
36 dev_warn(&pdev->dev, in tegra186_mc_probe()
37 "Broadcast channel is missing, please update your device-tree\n"); in tegra186_mc_probe()
38 mc->bcast_ch_regs = NULL; in tegra186_mc_probe()
42 return PTR_ERR(mc->bcast_ch_regs); in tegra186_mc_probe()
45 mc->ch_regs = devm_kcalloc(mc->dev, mc->soc->num_channels, sizeof(*mc->ch_regs), in tegra186_mc_probe()
47 if (!mc->ch_regs) in tegra186_mc_probe()
48 return -ENOMEM; in tegra186_mc_probe()
50 for (i = 0; i < mc->soc->num_channels; i++) { in tegra186_mc_probe()
53 mc->ch_regs[i] = devm_platform_ioremap_resource_byname(pdev, name); in tegra186_mc_probe()
54 if (IS_ERR(mc->ch_regs[i])) in tegra186_mc_probe()
55 return PTR_ERR(mc->ch_regs[i]); in tegra186_mc_probe()
59 err = of_platform_populate(mc->dev->of_node, NULL, NULL, mc->dev); in tegra186_mc_probe()
68 of_platform_depopulate(mc->dev); in tegra186_mc_remove()
78 if (client->regs.sid.security == 0 && client->regs.sid.override == 0) in tegra186_mc_client_sid_override()
81 value = readl(mc->regs + client->regs.sid.security); in tegra186_mc_client_sid_override()
84 * If the secure firmware has locked this down the override in tegra186_mc_client_sid_override()
92 * secure firmware will never have set this configuration. in tegra186_mc_client_sid_override()
100 writel(value, mc->regs + client->regs.sid.security); in tegra186_mc_client_sid_override()
103 value = readl(mc->regs + client->regs.sid.override); in tegra186_mc_client_sid_override()
107 dev_dbg(mc->dev, "overriding SID %x for %s with %x\n", old, in tegra186_mc_client_sid_override()
108 client->name, sid); in tegra186_mc_client_sid_override()
109 writel(sid, mc->regs + client->regs.sid.override); in tegra186_mc_client_sid_override()
124 while (!of_parse_phandle_with_args(dev->of_node, "interconnects", "#interconnect-cells", in tegra186_mc_probe_device()
126 if (args.np == mc->dev->of_node && args.args_count != 0) { in tegra186_mc_probe_device()
127 for (i = 0; i < mc->soc->num_clients; i++) { in tegra186_mc_probe_device()
128 const struct tegra_mc_client *client = &mc->soc->clients[i]; in tegra186_mc_probe_device()
130 if (client->id == args.args[0]) in tegra186_mc_probe_device()
149 for (i = 0; i < mc->soc->num_clients; i++) { in tegra186_mc_resume()
150 const struct tegra_mc_client *client = &mc->soc->clients[i]; in tegra186_mc_resume()
152 tegra186_mc_client_sid_override(mc, client, client->sid); in tegra186_mc_resume()
170 .id = TEGRA186_MEMORY_CLIENT_PTCR,
180 .id = TEGRA186_MEMORY_CLIENT_AFIR,
190 .id = TEGRA186_MEMORY_CLIENT_HDAR,
200 .id = TEGRA186_MEMORY_CLIENT_HOST1XDMAR,
210 .id = TEGRA186_MEMORY_CLIENT_NVENCSRD,
220 .id = TEGRA186_MEMORY_CLIENT_SATAR,
230 .id = TEGRA186_MEMORY_CLIENT_MPCORER,
240 .id = TEGRA186_MEMORY_CLIENT_NVENCSWR,
250 .id = TEGRA186_MEMORY_CLIENT_AFIW,
260 .id = TEGRA186_MEMORY_CLIENT_HDAW,
270 .id = TEGRA186_MEMORY_CLIENT_MPCOREW,
280 .id = TEGRA186_MEMORY_CLIENT_SATAW,
290 .id = TEGRA186_MEMORY_CLIENT_ISPRA,
300 .id = TEGRA186_MEMORY_CLIENT_ISPWA,
310 .id = TEGRA186_MEMORY_CLIENT_ISPWB,
320 .id = TEGRA186_MEMORY_CLIENT_XUSB_HOSTR,
330 .id = TEGRA186_MEMORY_CLIENT_XUSB_HOSTW,
340 .id = TEGRA186_MEMORY_CLIENT_XUSB_DEVR,
350 .id = TEGRA186_MEMORY_CLIENT_XUSB_DEVW,
360 .id = TEGRA186_MEMORY_CLIENT_TSECSRD,
370 .id = TEGRA186_MEMORY_CLIENT_TSECSWR,
380 .id = TEGRA186_MEMORY_CLIENT_GPUSRD,
390 .id = TEGRA186_MEMORY_CLIENT_GPUSWR,
400 .id = TEGRA186_MEMORY_CLIENT_SDMMCRA,
410 .id = TEGRA186_MEMORY_CLIENT_SDMMCRAA,
420 .id = TEGRA186_MEMORY_CLIENT_SDMMCR,
430 .id = TEGRA186_MEMORY_CLIENT_SDMMCRAB,
440 .id = TEGRA186_MEMORY_CLIENT_SDMMCWA,
450 .id = TEGRA186_MEMORY_CLIENT_SDMMCWAA,
460 .id = TEGRA186_MEMORY_CLIENT_SDMMCW,
470 .id = TEGRA186_MEMORY_CLIENT_SDMMCWAB,
480 .id = TEGRA186_MEMORY_CLIENT_VICSRD,
490 .id = TEGRA186_MEMORY_CLIENT_VICSWR,
500 .id = TEGRA186_MEMORY_CLIENT_VIW,
510 .id = TEGRA186_MEMORY_CLIENT_NVDECSRD,
520 .id = TEGRA186_MEMORY_CLIENT_NVDECSWR,
530 .id = TEGRA186_MEMORY_CLIENT_APER,
540 .id = TEGRA186_MEMORY_CLIENT_APEW,
550 .id = TEGRA186_MEMORY_CLIENT_NVJPGSRD,
560 .id = TEGRA186_MEMORY_CLIENT_NVJPGSWR,
570 .id = TEGRA186_MEMORY_CLIENT_SESRD,
580 .id = TEGRA186_MEMORY_CLIENT_SESWR,
590 .id = TEGRA186_MEMORY_CLIENT_ETRR,
600 .id = TEGRA186_MEMORY_CLIENT_ETRW,
610 .id = TEGRA186_MEMORY_CLIENT_TSECSRDB,
620 .id = TEGRA186_MEMORY_CLIENT_TSECSWRB,
630 .id = TEGRA186_MEMORY_CLIENT_GPUSRD2,
640 .id = TEGRA186_MEMORY_CLIENT_GPUSWR2,
650 .id = TEGRA186_MEMORY_CLIENT_AXISR,
660 .id = TEGRA186_MEMORY_CLIENT_AXISW,
670 .id = TEGRA186_MEMORY_CLIENT_EQOSR,
680 .id = TEGRA186_MEMORY_CLIENT_EQOSW,
690 .id = TEGRA186_MEMORY_CLIENT_UFSHCR,
700 .id = TEGRA186_MEMORY_CLIENT_UFSHCW,
710 .id = TEGRA186_MEMORY_CLIENT_NVDISPLAYR,
720 .id = TEGRA186_MEMORY_CLIENT_BPMPR,
730 .id = TEGRA186_MEMORY_CLIENT_BPMPW,
740 .id = TEGRA186_MEMORY_CLIENT_BPMPDMAR,
750 .id = TEGRA186_MEMORY_CLIENT_BPMPDMAW,
760 .id = TEGRA186_MEMORY_CLIENT_AONR,
770 .id = TEGRA186_MEMORY_CLIENT_AONW,
780 .id = TEGRA186_MEMORY_CLIENT_AONDMAR,
790 .id = TEGRA186_MEMORY_CLIENT_AONDMAW,
800 .id = TEGRA186_MEMORY_CLIENT_SCER,
810 .id = TEGRA186_MEMORY_CLIENT_SCEW,
820 .id = TEGRA186_MEMORY_CLIENT_SCEDMAR,
830 .id = TEGRA186_MEMORY_CLIENT_SCEDMAW,
840 .id = TEGRA186_MEMORY_CLIENT_APEDMAR,
850 .id = TEGRA186_MEMORY_CLIENT_APEDMAW,
860 .id = TEGRA186_MEMORY_CLIENT_NVDISPLAYR1,
870 .id = TEGRA186_MEMORY_CLIENT_VICSRD1,
880 .id = TEGRA186_MEMORY_CLIENT_NVDECSRD1,