Lines Matching full:cs
207 /* Structure to save gpmc cs context */
278 void gpmc_cs_write_reg(int cs, int idx, u32 val) in gpmc_cs_write_reg() argument
282 reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx; in gpmc_cs_write_reg()
286 static u32 gpmc_cs_read_reg(int cs, int idx) in gpmc_cs_read_reg() argument
290 reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx; in gpmc_cs_read_reg()
307 * @cs: Chip Select Region.
310 * GPMC_CS_CONFIG1 GPMCFCLKDIVIDER for cs has to be setup
313 static unsigned long gpmc_get_clk_period(int cs, enum gpmc_clk_domain cd) in gpmc_get_clk_period() argument
322 l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); in gpmc_get_clk_period()
335 static unsigned int gpmc_ns_to_clk_ticks(unsigned int time_ns, int cs, in gpmc_ns_to_clk_ticks() argument
341 tick_ps = gpmc_get_clk_period(cs, cd); in gpmc_ns_to_clk_ticks()
348 return gpmc_ns_to_clk_ticks(time_ns, /* any CS */ 0, GPMC_CD_FCLK); in gpmc_ns_to_ticks()
373 static inline void gpmc_cs_modify_reg(int cs, int reg, u32 mask, bool value) in gpmc_cs_modify_reg() argument
377 l = gpmc_cs_read_reg(cs, reg); in gpmc_cs_modify_reg()
382 gpmc_cs_write_reg(cs, reg, l); in gpmc_cs_modify_reg()
385 static void gpmc_cs_bool_timings(int cs, const struct gpmc_bool_timings *p) in gpmc_cs_bool_timings() argument
387 gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG1, in gpmc_cs_bool_timings()
390 gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG2, in gpmc_cs_bool_timings()
392 gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG3, in gpmc_cs_bool_timings()
394 gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG4, in gpmc_cs_bool_timings()
396 gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG4, in gpmc_cs_bool_timings()
398 gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG6, in gpmc_cs_bool_timings()
401 gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG6, in gpmc_cs_bool_timings()
408 static unsigned int gpmc_clk_ticks_to_ns(unsigned int ticks, int cs, in gpmc_clk_ticks_to_ns() argument
411 return ticks * gpmc_get_clk_period(cs, cd) / 1000; in gpmc_clk_ticks_to_ns()
416 * @cs: Chip Select Region
436 int cs, int reg, int st_bit, int end_bit, int max, in get_gpmc_timing_reg() argument
448 l = gpmc_cs_read_reg(cs, reg); in get_gpmc_timing_reg()
465 time_ns_min = gpmc_clk_ticks_to_ns(l - 1, cs, cd) + 1; in get_gpmc_timing_reg()
466 time_ns = gpmc_clk_ticks_to_ns(l, cs, cd); in get_gpmc_timing_reg()
479 #define GPMC_PRINT_CONFIG(cs, config) \ argument
480 pr_info("cs%i %s: 0x%08x\n", cs, #config, \
481 gpmc_cs_read_reg(cs, config))
483 get_gpmc_timing_reg(cs, (reg), (st), (end), 0, field, GPMC_CD_FCLK, 0, 1, 0)
485 get_gpmc_timing_reg(cs, (reg), (st), (end), (max), field, GPMC_CD_FCLK, 0, 1, 0)
487 get_gpmc_timing_reg(cs, (reg), (st), (end), 0, field, GPMC_CD_FCLK, 0, 1, 1)
489 get_gpmc_timing_reg(cs, (reg), (st), (end), (max), field, GPMC_CD_FCLK, (shift), 1, 1)
491 get_gpmc_timing_reg(cs, (reg), (st), (end), 0, field, GPMC_CD_FCLK, 0, 0, 0)
493 get_gpmc_timing_reg(cs, (reg), (st), (end), 0, field, (cd), 0, 0, 0)
495 get_gpmc_timing_reg(cs, (reg), (st), (end), (max), field, (cd), 0, 0, 0)
497 static void gpmc_show_regs(int cs, const char *desc) in gpmc_show_regs() argument
499 pr_info("gpmc cs%i %s:\n", cs, desc); in gpmc_show_regs()
500 GPMC_PRINT_CONFIG(cs, GPMC_CS_CONFIG1); in gpmc_show_regs()
501 GPMC_PRINT_CONFIG(cs, GPMC_CS_CONFIG2); in gpmc_show_regs()
502 GPMC_PRINT_CONFIG(cs, GPMC_CS_CONFIG3); in gpmc_show_regs()
503 GPMC_PRINT_CONFIG(cs, GPMC_CS_CONFIG4); in gpmc_show_regs()
504 GPMC_PRINT_CONFIG(cs, GPMC_CS_CONFIG5); in gpmc_show_regs()
505 GPMC_PRINT_CONFIG(cs, GPMC_CS_CONFIG6); in gpmc_show_regs()
512 static void gpmc_cs_show_timings(int cs, const char *desc) in gpmc_cs_show_timings() argument
514 gpmc_show_regs(cs, desc); in gpmc_cs_show_timings()
516 pr_info("gpmc cs%i access configuration:\n", cs); in gpmc_cs_show_timings()
533 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG2, 7, 7, "cs-extra-delay"); in gpmc_cs_show_timings()
543 pr_info("gpmc cs%i timings configuration:\n", cs); in gpmc_cs_show_timings()
544 GPMC_GET_TICKS(GPMC_CS_CONFIG2, 0, 3, "cs-on-ns"); in gpmc_cs_show_timings()
545 GPMC_GET_TICKS(GPMC_CS_CONFIG2, 8, 12, "cs-rd-off-ns"); in gpmc_cs_show_timings()
546 GPMC_GET_TICKS(GPMC_CS_CONFIG2, 16, 20, "cs-wr-off-ns"); in gpmc_cs_show_timings()
588 static inline void gpmc_cs_show_timings(int cs, const char *desc) in gpmc_cs_show_timings() argument
598 * @cs: Chip Select Region.
609 static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit, int max, in set_gpmc_timing_reg() argument
618 ticks = gpmc_ns_to_clk_ticks(time, cs, cd); in set_gpmc_timing_reg()
626 pr_err("%s: GPMC CS%d: %s %d ns, %d ticks > %d ticks\n", in set_gpmc_timing_reg()
627 __func__, cs, name, time, ticks, max); in set_gpmc_timing_reg()
632 l = gpmc_cs_read_reg(cs, reg); in set_gpmc_timing_reg()
634 pr_info("GPMC CS%d: %-17s: %3d ticks, %3lu ns (was %3i ticks) %3d ns\n", in set_gpmc_timing_reg()
635 cs, name, ticks, gpmc_get_clk_period(cs, cd) * ticks / 1000, in set_gpmc_timing_reg()
640 gpmc_cs_write_reg(cs, reg, l); in set_gpmc_timing_reg()
695 * @cs: Chip Select Region.
700 int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t, in gpmc_cs_set_timings() argument
737 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG2, 0, 3, 0, t->cs_on, in gpmc_cs_set_timings()
739 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG2, 8, 12, 0, t->cs_rd_off, in gpmc_cs_set_timings()
741 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG2, 16, 20, 0, t->cs_wr_off, in gpmc_cs_set_timings()
746 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG3, 0, 3, 0, t->adv_on, in gpmc_cs_set_timings()
748 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG3, 8, 12, 0, t->adv_rd_off, in gpmc_cs_set_timings()
750 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG3, 16, 20, 0, t->adv_wr_off, in gpmc_cs_set_timings()
756 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG3, 4, 6, 0, in gpmc_cs_set_timings()
759 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG3, 24, 26, 0, in gpmc_cs_set_timings()
762 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG3, 28, 30, 0, in gpmc_cs_set_timings()
769 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG4, 0, 3, 0, t->oe_on, in gpmc_cs_set_timings()
771 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG4, 8, 12, 0, t->oe_off, in gpmc_cs_set_timings()
774 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG4, 4, 6, 0, in gpmc_cs_set_timings()
777 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG4, 13, 15, 0, in gpmc_cs_set_timings()
781 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG4, 16, 19, 0, t->we_on, in gpmc_cs_set_timings()
783 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG4, 24, 28, 0, t->we_off, in gpmc_cs_set_timings()
788 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG5, 0, 4, 0, t->rd_cycle, in gpmc_cs_set_timings()
790 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG5, 8, 12, 0, t->wr_cycle, in gpmc_cs_set_timings()
792 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG5, 16, 20, 0, t->access, in gpmc_cs_set_timings()
794 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG5, 24, 27, 0, in gpmc_cs_set_timings()
800 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG6, 0, 3, 0, in gpmc_cs_set_timings()
803 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG6, 8, 11, 0, in gpmc_cs_set_timings()
810 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG6, 16, 19, 0, in gpmc_cs_set_timings()
817 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG6, 24, 28, 0, in gpmc_cs_set_timings()
824 l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); in gpmc_cs_set_timings()
827 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, l); in gpmc_cs_set_timings()
830 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG1, 18, 19, in gpmc_cs_set_timings()
834 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG1, 25, 26, in gpmc_cs_set_timings()
842 pr_info("GPMC CS%d CLK period is %lu ns (div %d)\n", in gpmc_cs_set_timings()
843 cs, (div * gpmc_get_fclk_period()) / 1000, div); in gpmc_cs_set_timings()
846 gpmc_cs_bool_timings(cs, &t->bool_timings); in gpmc_cs_set_timings()
847 gpmc_cs_show_timings(cs, "after gpmc_cs_set_timings"); in gpmc_cs_set_timings()
852 static int gpmc_cs_set_memconf(int cs, u32 base, u32 size) in gpmc_cs_set_memconf() argument
869 l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); in gpmc_cs_set_memconf()
874 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l); in gpmc_cs_set_memconf()
879 static void gpmc_cs_enable_mem(int cs) in gpmc_cs_enable_mem() argument
883 l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); in gpmc_cs_enable_mem()
885 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l); in gpmc_cs_enable_mem()
888 static void gpmc_cs_disable_mem(int cs) in gpmc_cs_disable_mem() argument
892 l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); in gpmc_cs_disable_mem()
894 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l); in gpmc_cs_disable_mem()
897 static void gpmc_cs_get_memconf(int cs, u32 *base, u32 *size) in gpmc_cs_get_memconf() argument
902 l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); in gpmc_cs_get_memconf()
908 static int gpmc_cs_mem_enabled(int cs) in gpmc_cs_mem_enabled() argument
912 l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); in gpmc_cs_mem_enabled()
916 static void gpmc_cs_set_reserved(int cs, int reserved) in gpmc_cs_set_reserved() argument
918 struct gpmc_cs_data *gpmc = &gpmc_cs[cs]; in gpmc_cs_set_reserved()
923 static bool gpmc_cs_reserved(int cs) in gpmc_cs_reserved() argument
925 struct gpmc_cs_data *gpmc = &gpmc_cs[cs]; in gpmc_cs_reserved()
944 static int gpmc_cs_insert_mem(int cs, unsigned long base, unsigned long size) in gpmc_cs_insert_mem() argument
946 struct gpmc_cs_data *gpmc = &gpmc_cs[cs]; in gpmc_cs_insert_mem()
960 static int gpmc_cs_delete_mem(int cs) in gpmc_cs_delete_mem() argument
962 struct gpmc_cs_data *gpmc = &gpmc_cs[cs]; in gpmc_cs_delete_mem()
975 int gpmc_cs_request(int cs, unsigned long size, unsigned long *base) in gpmc_cs_request() argument
977 struct gpmc_cs_data *gpmc = &gpmc_cs[cs]; in gpmc_cs_request()
981 if (cs >= gpmc_cs_num) { in gpmc_cs_request()
991 if (gpmc_cs_reserved(cs)) in gpmc_cs_request()
994 if (gpmc_cs_mem_enabled(cs)) in gpmc_cs_request()
1002 /* Disable CS while changing base address and size mask */ in gpmc_cs_request()
1003 gpmc_cs_disable_mem(cs); in gpmc_cs_request()
1005 r = gpmc_cs_set_memconf(cs, res->start, resource_size(res)); in gpmc_cs_request()
1011 /* Enable CS */ in gpmc_cs_request()
1012 gpmc_cs_enable_mem(cs); in gpmc_cs_request()
1014 gpmc_cs_set_reserved(cs, 1); in gpmc_cs_request()
1020 void gpmc_cs_free(int cs) in gpmc_cs_free() argument
1026 if (cs >= gpmc_cs_num || cs < 0 || !gpmc_cs_reserved(cs)) { in gpmc_cs_free()
1027 WARN(1, "Trying to free non-reserved GPMC CS%d\n", cs); in gpmc_cs_free()
1030 gpmc = &gpmc_cs[cs]; in gpmc_cs_free()
1033 gpmc_cs_disable_mem(cs); in gpmc_cs_free()
1036 gpmc_cs_set_reserved(cs, 0); in gpmc_cs_free()
1140 * @cs: GPMC chip select number on which the NAND sits. The
1143 * Returns NULL on error e.g. invalid cs.
1145 struct gpmc_nand_ops *gpmc_omap_get_nand_ops(struct gpmc_nand_regs *reg, int cs) in gpmc_omap_get_nand_ops() argument
1149 if (cs >= gpmc_cs_num) in gpmc_omap_get_nand_ops()
1153 GPMC_CS_NAND_COMMAND + GPMC_CS_SIZE * cs; in gpmc_omap_get_nand_ops()
1155 GPMC_CS_NAND_ADDRESS + GPMC_CS_SIZE * cs; in gpmc_omap_get_nand_ops()
1157 GPMC_CS_NAND_DATA + GPMC_CS_SIZE * cs; in gpmc_omap_get_nand_ops()
1267 int gpmc_omap_onenand_set_timings(struct device *dev, int cs, int freq, in gpmc_omap_onenand_set_timings() argument
1286 ret = gpmc_cs_program_settings(cs, &gpmc_s); in gpmc_omap_onenand_set_timings()
1290 return gpmc_cs_set_timings(cs, &gpmc_t, &gpmc_s); in gpmc_omap_onenand_set_timings()
1495 int cs; in gpmc_mem_exit() local
1497 for (cs = 0; cs < gpmc_cs_num; cs++) { in gpmc_mem_exit()
1498 if (!gpmc_cs_mem_enabled(cs)) in gpmc_mem_exit()
1500 gpmc_cs_delete_mem(cs); in gpmc_mem_exit()
1506 int cs; in gpmc_mem_init() local
1518 for (cs = 0; cs < gpmc_cs_num; cs++) { in gpmc_mem_init()
1521 if (!gpmc_cs_mem_enabled(cs)) in gpmc_mem_init()
1523 gpmc_cs_get_memconf(cs, &base, &size); in gpmc_mem_init()
1524 if (gpmc_cs_insert_mem(cs, base, size)) { in gpmc_mem_init()
1525 pr_warn("%s: disabling cs %d mapped at 0x%x-0x%x\n", in gpmc_mem_init()
1526 __func__, cs, base, base + size); in gpmc_mem_init()
1527 gpmc_cs_disable_mem(cs); in gpmc_mem_init()
1854 * @cs: GPMC chip-select to program
1864 int gpmc_cs_program_settings(int cs, struct gpmc_settings *p) in gpmc_cs_program_settings() argument
1931 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, config1); in gpmc_cs_program_settings()
1948 static void gpmc_cs_set_name(int cs, const char *name) in gpmc_cs_set_name() argument
1950 struct gpmc_cs_data *gpmc = &gpmc_cs[cs]; in gpmc_cs_set_name()
1955 static const char *gpmc_cs_get_name(int cs) in gpmc_cs_get_name() argument
1957 struct gpmc_cs_data *gpmc = &gpmc_cs[cs]; in gpmc_cs_get_name()
1964 * @cs: chip-select to remap
1971 static int gpmc_cs_remap(int cs, u32 base) in gpmc_cs_remap() argument
1976 if (cs >= gpmc_cs_num) { in gpmc_cs_remap()
1988 gpmc_cs_get_memconf(cs, &old_base, &size); in gpmc_cs_remap()
1992 ret = gpmc_cs_delete_mem(cs); in gpmc_cs_remap()
1996 ret = gpmc_cs_insert_mem(cs, base, size); in gpmc_cs_remap()
2000 ret = gpmc_cs_set_memconf(cs, base, size); in gpmc_cs_remap()
2076 of_property_read_u32(np, "gpmc,cs-on-ns", &gpmc_t->cs_on); in gpmc_read_timings_dt()
2077 of_property_read_u32(np, "gpmc,cs-rd-off-ns", &gpmc_t->cs_rd_off); in gpmc_read_timings_dt()
2078 of_property_read_u32(np, "gpmc,cs-wr-off-ns", &gpmc_t->cs_wr_off); in gpmc_read_timings_dt()
2133 p->cs_extra_delay = of_property_read_bool(np, "gpmc,cs-extra-delay"); in gpmc_read_timings_dt()
2154 int ret, cs; in gpmc_probe_generic_child() local
2158 if (of_property_read_u32(child, "reg", &cs) < 0) { in gpmc_probe_generic_child()
2175 name = gpmc_cs_get_name(cs); in gpmc_probe_generic_child()
2179 ret = gpmc_cs_request(cs, resource_size(&res), &base); in gpmc_probe_generic_child()
2181 dev_err(&pdev->dev, "cannot request GPMC CS %d\n", cs); in gpmc_probe_generic_child()
2184 gpmc_cs_set_name(cs, child->full_name); in gpmc_probe_generic_child()
2195 WARN(1, "enable GPMC debug to configure .dts timings for CS%i\n", in gpmc_probe_generic_child()
2196 cs); in gpmc_probe_generic_child()
2197 gpmc_cs_show_timings(cs, in gpmc_probe_generic_child()
2202 /* CS must be disabled while making changes to gpmc configuration */ in gpmc_probe_generic_child()
2203 gpmc_cs_disable_mem(cs); in gpmc_probe_generic_child()
2206 * FIXME: gpmc_cs_request() will map the CS to an arbitrary in gpmc_probe_generic_child()
2210 * CS to this location. Once DT migration is complete should in gpmc_probe_generic_child()
2213 ret = gpmc_cs_remap(cs, res.start); in gpmc_probe_generic_child()
2215 dev_err(&pdev->dev, "cannot remap GPMC CS %d to %pa\n", in gpmc_probe_generic_child()
2216 cs, &res.start); in gpmc_probe_generic_child()
2219 "GPMC CS %d start cannot be lesser than 0x%x\n", in gpmc_probe_generic_child()
2220 cs, GPMC_MEM_START); in gpmc_probe_generic_child()
2223 "GPMC CS %d end cannot be greater than 0x%x\n", in gpmc_probe_generic_child()
2224 cs, GPMC_MEM_END); in gpmc_probe_generic_child()
2268 gpmc_cs_show_timings(cs, "before gpmc_cs_program_settings"); in gpmc_probe_generic_child()
2270 ret = gpmc_cs_program_settings(cs, &gpmc_s); in gpmc_probe_generic_child()
2274 ret = gpmc_cs_set_timings(cs, &gpmc_t, &gpmc_s); in gpmc_probe_generic_child()
2286 /* Enable CS region */ in gpmc_probe_generic_child()
2287 gpmc_cs_enable_mem(cs); in gpmc_probe_generic_child()
2309 gpmc_cs_free(cs); in gpmc_probe_generic_child()
2325 ret = of_property_read_u32(pdev->dev.of_node, "gpmc,num-cs", in gpmc_probe_dt()