Lines Matching +full:mt8173 +full:- +full:smi +full:- +full:common
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2015-2016 MediaTek Inc.
6 #include <linux/arm-smccc.h>
19 #include <soc/mediatek/smi.h>
20 #include <dt-bindings/memory/mt2701-larb-port.h>
21 #include <dt-bindings/memory/mtk-memory-port.h>
23 /* SMI COMMON */
39 /* SMI LARB */
66 * or non-security.
77 /* mt8173 */
104 MTK_SMI_GEN2, /* gen2 smi common */
105 MTK_SMI_GEN2_SUB_COMM, /* gen2 smi sub common */
108 /* larbs: Require apb/smi clocks while gals is optional. */
109 static const char * const mtk_smi_larb_clks[] = {"apb", "smi", "gals"};
114 * common: Require these four clocks in has_gals case. Otherwise, only apb/smi are required.
115 * sub common: Require apb/smi/gals0 clocks in has_gals case. Otherwise, only apb/smi are required.
117 static const char * const mtk_smi_common_clks[] = {"apb", "smi", "gals0", "gals1"};
148 struct device *smi_common_dev; /* for sub common */
153 struct mtk_smi smi; member
155 struct device *smi_common_dev; /* common or sub-common dev */
171 larb->larbid = i; in mtk_smi_larb_bind()
172 larb->mmu = &larb_mmu[i].mmu; in mtk_smi_larb_bind()
173 larb->bank = larb_mmu[i].bank; in mtk_smi_larb_bind()
177 return -ENODEV; in mtk_smi_larb_bind()
194 const struct mtk_smi_larb_gen *larb_gen = larb->larb_gen; in mtk_smi_larb_config_port_gen1()
195 struct mtk_smi *common = dev_get_drvdata(larb->smi_common_dev); in mtk_smi_larb_config_port_gen1() local
199 m4u_port_id = larb_gen->port_in_larb[larb->larbid]; in mtk_smi_larb_config_port_gen1()
200 larb_port_num = larb_gen->port_in_larb[larb->larbid + 1] in mtk_smi_larb_config_port_gen1()
201 - larb_gen->port_in_larb[larb->larbid]; in mtk_smi_larb_config_port_gen1()
204 if (*larb->mmu & BIT(i)) { in mtk_smi_larb_config_port_gen1()
211 reg_val = readl(common->smi_ao_base in mtk_smi_larb_config_port_gen1()
217 common->smi_ao_base in mtk_smi_larb_config_port_gen1()
227 writel(*larb->mmu, larb->base + MT8167_SMI_LARB_MMU_EN); in mtk_smi_larb_config_port_mt8167()
235 writel(*larb->mmu, larb->base + MT8173_SMI_LARB_MMU_EN); in mtk_smi_larb_config_port_mt8173()
242 u32 reg, flags_general = larb->larb_gen->flags_general; in mtk_smi_larb_config_port_gen2_general()
243 const u8 *larbostd = larb->larb_gen->ostd ? larb->larb_gen->ostd[larb->larbid] : NULL; in mtk_smi_larb_config_port_gen2_general()
247 if (BIT(larb->larbid) & larb->larb_gen->larb_direct_to_common_mask) in mtk_smi_larb_config_port_gen2_general()
251 reg = readl_relaxed(larb->base + SMI_LARB_CMD_THRT_CON); in mtk_smi_larb_config_port_gen2_general()
254 writel_relaxed(reg, larb->base + SMI_LARB_CMD_THRT_CON); in mtk_smi_larb_config_port_gen2_general()
258 writel_relaxed(SMI_LARB_SW_FLAG_1, larb->base + SMI_LARB_SW_FLAG); in mtk_smi_larb_config_port_gen2_general()
261 writel_relaxed(larbostd[i], larb->base + SMI_LARB_OSTDL_PORTx(i)); in mtk_smi_larb_config_port_gen2_general()
270 larb->larbid, *larb->mmu, 0, 0, 0, 0, &res); in mtk_smi_larb_config_port_gen2_general()
273 return -EINVAL; in mtk_smi_larb_config_port_gen2_general()
277 for_each_set_bit(i, (unsigned long *)larb->mmu, 32) { in mtk_smi_larb_config_port_gen2_general()
278 reg = readl_relaxed(larb->base + SMI_LARB_NONSEC_CON(i)); in mtk_smi_larb_config_port_gen2_general()
280 reg |= BANK_SEL(larb->bank[i]); in mtk_smi_larb_config_port_gen2_general()
281 writel(reg, larb->base + SMI_LARB_NONSEC_CON(i)); in mtk_smi_larb_config_port_gen2_general()
438 /* mt8173 do not need the port in larb */
473 {.compatible = "mediatek,mt2701-smi-larb", .data = &mtk_smi_larb_mt2701},
474 {.compatible = "mediatek,mt2712-smi-larb", .data = &mtk_smi_larb_mt2712},
475 {.compatible = "mediatek,mt6779-smi-larb", .data = &mtk_smi_larb_mt6779},
476 {.compatible = "mediatek,mt6795-smi-larb", .data = &mtk_smi_larb_mt8173},
477 {.compatible = "mediatek,mt8167-smi-larb", .data = &mtk_smi_larb_mt8167},
478 {.compatible = "mediatek,mt8173-smi-larb", .data = &mtk_smi_larb_mt8173},
479 {.compatible = "mediatek,mt8183-smi-larb", .data = &mtk_smi_larb_mt8183},
480 {.compatible = "mediatek,mt8186-smi-larb", .data = &mtk_smi_larb_mt8186},
481 {.compatible = "mediatek,mt8188-smi-larb", .data = &mtk_smi_larb_mt8188},
482 {.compatible = "mediatek,mt8192-smi-larb", .data = &mtk_smi_larb_mt8192},
483 {.compatible = "mediatek,mt8195-smi-larb", .data = &mtk_smi_larb_mt8195},
493 writel_relaxed(SLP_PROT_EN, larb->base + SMI_LARB_SLP_CON); in mtk_smi_larb_sleep_ctrl_enable()
494 ret = readl_poll_timeout_atomic(larb->base + SMI_LARB_SLP_CON, in mtk_smi_larb_sleep_ctrl_enable()
498 dev_err(larb->smi.dev, "sleep ctrl is not ready(0x%x).\n", tmp); in mtk_smi_larb_sleep_ctrl_enable()
505 writel_relaxed(0, larb->base + SMI_LARB_SLP_CON); in mtk_smi_larb_sleep_ctrl_disable()
515 smi_com_node = of_parse_phandle(dev->of_node, "mediatek,smi", 0); in mtk_smi_device_link_common()
517 return -EINVAL; in mtk_smi_device_link_common()
522 /* smi common is the supplier, Make sure it is ready before */ in mtk_smi_device_link_common()
524 put_device(&smi_com_pdev->dev); in mtk_smi_device_link_common()
525 return -EPROBE_DEFER; in mtk_smi_device_link_common()
527 smi_com_dev = &smi_com_pdev->dev; in mtk_smi_device_link_common()
531 dev_err(dev, "Unable to link smi-common dev\n"); in mtk_smi_device_link_common()
532 put_device(&smi_com_pdev->dev); in mtk_smi_device_link_common()
533 return -ENODEV; in mtk_smi_device_link_common()
538 return -EINVAL; in mtk_smi_device_link_common()
543 static int mtk_smi_dts_clk_init(struct device *dev, struct mtk_smi *smi, in mtk_smi_dts_clk_init() argument
551 smi->clks[i].id = clks[i]; in mtk_smi_dts_clk_init()
552 ret = devm_clk_bulk_get(dev, clk_nr_required, smi->clks); in mtk_smi_dts_clk_init()
557 smi->clks[i].id = clks[i]; in mtk_smi_dts_clk_init()
559 smi->clks + clk_nr_required); in mtk_smi_dts_clk_init()
560 smi->clk_num = clk_nr_required + clk_nr_optional; in mtk_smi_dts_clk_init()
567 struct device *dev = &pdev->dev; in mtk_smi_larb_probe()
572 return -ENOMEM; in mtk_smi_larb_probe()
574 larb->larb_gen = of_device_get_match_data(dev); in mtk_smi_larb_probe()
575 larb->base = devm_platform_ioremap_resource(pdev, 0); in mtk_smi_larb_probe()
576 if (IS_ERR(larb->base)) in mtk_smi_larb_probe()
577 return PTR_ERR(larb->base); in mtk_smi_larb_probe()
579 ret = mtk_smi_dts_clk_init(dev, &larb->smi, mtk_smi_larb_clks, in mtk_smi_larb_probe()
584 larb->smi.dev = dev; in mtk_smi_larb_probe()
586 ret = mtk_smi_device_link_common(dev, &larb->smi_common_dev); in mtk_smi_larb_probe()
599 device_link_remove(dev, larb->smi_common_dev); in mtk_smi_larb_probe()
607 device_link_remove(&pdev->dev, larb->smi_common_dev); in mtk_smi_larb_remove()
608 pm_runtime_disable(&pdev->dev); in mtk_smi_larb_remove()
609 component_del(&pdev->dev, &mtk_smi_larb_component_ops); in mtk_smi_larb_remove()
615 const struct mtk_smi_larb_gen *larb_gen = larb->larb_gen; in mtk_smi_larb_resume()
618 ret = clk_bulk_prepare_enable(larb->smi.clk_num, larb->smi.clks); in mtk_smi_larb_resume()
622 if (MTK_SMI_CAPS(larb->larb_gen->flags_general, MTK_SMI_FLAG_SLEEP_CTL)) in mtk_smi_larb_resume()
626 return larb_gen->config_port(dev); in mtk_smi_larb_resume()
634 if (MTK_SMI_CAPS(larb->larb_gen->flags_general, MTK_SMI_FLAG_SLEEP_CTL)) { in mtk_smi_larb_suspend()
640 clk_bulk_disable_unprepare(larb->smi.clk_num, larb->smi.clks); in mtk_smi_larb_suspend()
654 .name = "mtk-smi-larb",
755 {.compatible = "mediatek,mt2701-smi-common", .data = &mtk_smi_common_gen1},
756 {.compatible = "mediatek,mt2712-smi-common", .data = &mtk_smi_common_gen2},
757 {.compatible = "mediatek,mt6779-smi-common", .data = &mtk_smi_common_mt6779},
758 {.compatible = "mediatek,mt6795-smi-common", .data = &mtk_smi_common_mt6795},
759 {.compatible = "mediatek,mt8167-smi-common", .data = &mtk_smi_common_gen2},
760 {.compatible = "mediatek,mt8173-smi-common", .data = &mtk_smi_common_gen2},
761 {.compatible = "mediatek,mt8183-smi-common", .data = &mtk_smi_common_mt8183},
762 {.compatible = "mediatek,mt8186-smi-common", .data = &mtk_smi_common_mt8186},
763 {.compatible = "mediatek,mt8188-smi-common-vdo", .data = &mtk_smi_common_mt8188_vdo},
764 {.compatible = "mediatek,mt8188-smi-common-vpp", .data = &mtk_smi_common_mt8188_vpp},
765 {.compatible = "mediatek,mt8192-smi-common", .data = &mtk_smi_common_mt8192},
766 {.compatible = "mediatek,mt8195-smi-common-vdo", .data = &mtk_smi_common_mt8195_vdo},
767 {.compatible = "mediatek,mt8195-smi-common-vpp", .data = &mtk_smi_common_mt8195_vpp},
768 {.compatible = "mediatek,mt8195-smi-sub-common", .data = &mtk_smi_sub_common_mt8195},
769 {.compatible = "mediatek,mt8365-smi-common", .data = &mtk_smi_common_mt8365},
776 struct device *dev = &pdev->dev; in mtk_smi_common_probe()
777 struct mtk_smi *common; in mtk_smi_common_probe() local
780 common = devm_kzalloc(dev, sizeof(*common), GFP_KERNEL); in mtk_smi_common_probe()
781 if (!common) in mtk_smi_common_probe()
782 return -ENOMEM; in mtk_smi_common_probe()
783 common->dev = dev; in mtk_smi_common_probe()
784 common->plat = of_device_get_match_data(dev); in mtk_smi_common_probe()
786 if (common->plat->has_gals) { in mtk_smi_common_probe()
787 if (common->plat->type == MTK_SMI_GEN2) in mtk_smi_common_probe()
789 else if (common->plat->type == MTK_SMI_GEN2_SUB_COMM) in mtk_smi_common_probe()
792 ret = mtk_smi_dts_clk_init(dev, common, mtk_smi_common_clks, clk_required, 0); in mtk_smi_common_probe()
797 * for mtk smi gen 1, we need to get the ao(always on) base to config in mtk_smi_common_probe()
798 * m4u port, and we need to enable the aync clock for transform the smi in mtk_smi_common_probe()
799 * clock into emi clock domain, but for mtk smi gen2, there's no smi ao in mtk_smi_common_probe()
802 if (common->plat->type == MTK_SMI_GEN1) { in mtk_smi_common_probe()
803 common->smi_ao_base = devm_platform_ioremap_resource(pdev, 0); in mtk_smi_common_probe()
804 if (IS_ERR(common->smi_ao_base)) in mtk_smi_common_probe()
805 return PTR_ERR(common->smi_ao_base); in mtk_smi_common_probe()
807 common->clk_async = devm_clk_get_enabled(dev, "async"); in mtk_smi_common_probe()
808 if (IS_ERR(common->clk_async)) in mtk_smi_common_probe()
809 return PTR_ERR(common->clk_async); in mtk_smi_common_probe()
811 common->base = devm_platform_ioremap_resource(pdev, 0); in mtk_smi_common_probe()
812 if (IS_ERR(common->base)) in mtk_smi_common_probe()
813 return PTR_ERR(common->base); in mtk_smi_common_probe()
816 /* link its smi-common if this is smi-sub-common */ in mtk_smi_common_probe()
817 if (common->plat->type == MTK_SMI_GEN2_SUB_COMM) { in mtk_smi_common_probe()
818 ret = mtk_smi_device_link_common(dev, &common->smi_common_dev); in mtk_smi_common_probe()
824 platform_set_drvdata(pdev, common); in mtk_smi_common_probe()
830 struct mtk_smi *common = dev_get_drvdata(&pdev->dev); in mtk_smi_common_remove() local
832 if (common->plat->type == MTK_SMI_GEN2_SUB_COMM) in mtk_smi_common_remove()
833 device_link_remove(&pdev->dev, common->smi_common_dev); in mtk_smi_common_remove()
834 pm_runtime_disable(&pdev->dev); in mtk_smi_common_remove()
839 struct mtk_smi *common = dev_get_drvdata(dev); in mtk_smi_common_resume() local
840 const struct mtk_smi_reg_pair *init = common->plat->init; in mtk_smi_common_resume()
841 u32 bus_sel = common->plat->bus_sel; /* default is 0 */ in mtk_smi_common_resume()
844 ret = clk_bulk_prepare_enable(common->clk_num, common->clks); in mtk_smi_common_resume()
848 if (common->plat->type != MTK_SMI_GEN2) in mtk_smi_common_resume()
852 writel_relaxed(init[i].value, common->base + init[i].offset); in mtk_smi_common_resume()
854 writel(bus_sel, common->base + SMI_BUS_SEL); in mtk_smi_common_resume()
860 struct mtk_smi *common = dev_get_drvdata(dev); in mtk_smi_common_suspend() local
862 clk_bulk_disable_unprepare(common->clk_num, common->clks); in mtk_smi_common_suspend()
876 .name = "mtk-smi-common",
899 MODULE_DESCRIPTION("MediaTek SMI driver");