Lines Matching +full:0 +full:x60
25 ret = regmap_write_bits(dev->regmap, R06_POWER2, 0x07, 0x00); in tda18250_power_control()
28 ret = regmap_write_bits(dev->regmap, R25_REF, 0xc0, 0xc0); in tda18250_power_control()
35 R25_REF, 0xc0, 0x80); in tda18250_power_control()
39 R06_POWER2, 0x07, 0x02); in tda18250_power_control()
43 R10_LT1, 0x80, 0x00); in tda18250_power_control()
48 R25_REF, 0xc0, 0x80); in tda18250_power_control()
52 R06_POWER2, 0x07, 0x01); in tda18250_power_control()
60 R0D_AGC12, 0x03, 0x03); in tda18250_power_control()
64 R10_LT1, 0x80, 0x80); in tda18250_power_control()
68 R0D_AGC12, 0x03, utmp & 0x03); in tda18250_power_control()
78 return 0; in tda18250_power_control()
107 dev_dbg(&client->dev, "waited IRQ (0x%02x) %d ms, triggered: %s", irq, in tda18250_wait_for_irq()
115 return 0; in tda18250_wait_for_irq()
128 { R0C_AGC11, 0xc7 }, in tda18250_init()
129 { R0D_AGC12, 0x5d }, in tda18250_init()
130 { R0E_AGC13, 0x40 }, in tda18250_init()
131 { R0F_AGC14, 0x0e }, in tda18250_init()
132 { R10_LT1, 0x47 }, in tda18250_init()
133 { R11_LT2, 0x4e }, in tda18250_init()
134 { R12_AGC21, 0x26 }, in tda18250_init()
135 { R13_AGC22, 0x60 }, in tda18250_init()
136 { R18_AGC32, 0x37 }, in tda18250_init()
137 { R19_AGC33, 0x09 }, in tda18250_init()
138 { R1A_AGCK, 0x00 }, in tda18250_init()
139 { R1E_WI_FI, 0x29 }, in tda18250_init()
140 { R1F_RF_BPF, 0x06 }, in tda18250_init()
141 { R20_IR_MIX, 0xc6 }, in tda18250_init()
142 { R21_IF_AGC, 0x00 }, in tda18250_init()
143 { R2C_PS1, 0x75 }, in tda18250_init()
144 { R2D_PS2, 0x06 }, in tda18250_init()
145 { R2E_PS3, 0x07 }, in tda18250_init()
146 { R30_RSSI2, 0x0e }, in tda18250_init()
147 { R31_IRQ_CTRL, 0x00 }, in tda18250_init()
148 { R39_SD5, 0x00 }, in tda18250_init()
149 { R3B_REGU, 0x55 }, in tda18250_init()
150 { R3C_RCCAL1, 0xa7 }, in tda18250_init()
151 { R3F_IRCAL2, 0x85 }, in tda18250_init()
152 { R40_IRCAL3, 0x87 }, in tda18250_init()
153 { R41_IRCAL4, 0xc0 }, in tda18250_init()
154 { R43_PD1, 0x40 }, in tda18250_init()
155 { R44_PD2, 0xc0 }, in tda18250_init()
156 { R46_CPUMP, 0x0c }, in tda18250_init()
157 { R47_LNAPOL, 0x64 }, in tda18250_init()
158 { R4B_XTALOSC1, 0x30 }, in tda18250_init()
159 { R59_AGC2_UP2, 0x05 }, in tda18250_init()
160 { R5B_AGC_AUTO, 0x07 }, in tda18250_init()
161 { R5C_AGC_DEBUG, 0x00 }, in tda18250_init()
167 [TDA18250_XTAL_FREQ_16MHZ] = { 0x3e, 0x80, 0x50, 0x00, 0x20 }, in tda18250_init()
168 [TDA18250_XTAL_FREQ_24MHZ] = { 0x5d, 0xc0, 0xec, 0x00, 0x18 }, in tda18250_init()
169 [TDA18250_XTAL_FREQ_25MHZ] = { 0x61, 0xa8, 0xec, 0x80, 0x19 }, in tda18250_init()
170 [TDA18250_XTAL_FREQ_27MHZ] = { 0x69, 0x78, 0x8d, 0x80, 0x1b }, in tda18250_init()
171 [TDA18250_XTAL_FREQ_30MHZ] = { 0x75, 0x30, 0x8f, 0x00, 0x1e }, in tda18250_init()
186 for (i = 0; i < ARRAY_SIZE(init_regs); i++) { in tda18250_init()
187 ret = regmap_write(dev->regmap, init_regs[i][0], in tda18250_init()
199 ret = regmap_write_bits(dev->regmap, R10_LT1, 0x80, in tda18250_init()
200 dev->loopthrough ? 0x00 : 0x80); in tda18250_init()
210 ret = regmap_write(dev->regmap, R2A_MSM1, 0x70); in tda18250_init()
214 ret = regmap_write(dev->regmap, R2B_MSM2, 0x01); in tda18250_init()
223 ret = regmap_write(dev->regmap, R2A_MSM1, 0x02); in tda18250_init()
227 ret = regmap_write(dev->regmap, R2B_MSM2, 0x01); in tda18250_init()
239 ret = regmap_write_bits(dev->regmap, R0C_AGC11, 0x80, 0x00); in tda18250_init()
243 return 0; in tda18250_init()
259 ret = regmap_write_bits(dev->regmap, R1F_RF_BPF, 0x87, 0x06); in tda18250_set_agc()
266 (c->bandwidth_hz == 6000000)) ? 0x80 : 0x00; in tda18250_set_agc()
290 ret = regmap_write_bits(dev->regmap, R0C_AGC11, 0x07, utmp); in tda18250_set_agc()
323 ret = regmap_write_bits(dev->regmap, R58_AGC2_UP1, 0x1f, utmp2+8); in tda18250_set_agc()
326 ret = regmap_write_bits(dev->regmap, R13_AGC22, 0x1f, utmp); in tda18250_set_agc()
329 ret = regmap_write_bits(dev->regmap, R14_AGC23, 0x1f, utmp2); in tda18250_set_agc()
343 ret = regmap_write_bits(dev->regmap, R16_AGC25, 0xf8, utmp); in tda18250_set_agc()
347 ret = regmap_write_bits(dev->regmap, R12_AGC21, 0x60, in tda18250_set_agc()
348 (c->frequency > 800000000) ? 0x40 : 0x20); in tda18250_set_agc()
375 utmp = 0x04; in tda18250_set_agc()
377 utmp = (c->frequency < 320000000) ? 0x04 : 0x02; in tda18250_set_agc()
382 (c->frequency < 320000000)) ? 0x04 : 0x02; in tda18250_set_agc()
385 (c->frequency < 600000000)) ? 0x02 : 0x04; in tda18250_set_agc()
388 ret = regmap_write_bits(dev->regmap, R20_IR_MIX, 0x06, utmp); in tda18250_set_agc()
396 utmp = 0; in tda18250_set_agc()
399 utmp = (c->frequency < 600000000) ? 0 : 3; in tda18250_set_agc()
402 ret = regmap_write_bits(dev->regmap, R16_AGC25, 0x03, utmp); in tda18250_set_agc()
406 utmp = 0x09; in tda18250_set_agc()
412 utmp = 0x0c; in tda18250_set_agc()
415 utmp = 0x0c; in tda18250_set_agc()
418 ret = regmap_write_bits(dev->regmap, R0F_AGC14, 0x3f, utmp); in tda18250_set_agc()
422 return 0; in tda18250_set_agc()
442 exp = (uval & 0x70) >> 4; in tda18250_pll_calc()
444 exp = 0; in tda18250_pll_calc()
446 scale = uval & 0x0f; in tda18250_pll_calc()
452 *ndiv = 0; in tda18250_pll_calc()
453 *icp = (fvco < 6622000) ? 0x05 : 0x02; in tda18250_pll_calc()
459 *icp = (fvco < 6622000) ? 0x05 : 0x02; in tda18250_pll_calc()
464 *ndiv = 0; in tda18250_pll_calc()
465 *icp = 0x05; in tda18250_pll_calc()
468 *ndiv = 0; in tda18250_pll_calc()
469 *icp = 0x06; in tda18250_pll_calc()
473 *icp = 0x02; in tda18250_pll_calc()
478 *ndiv = 0; in tda18250_pll_calc()
479 *icp = (fvco < 6811000) ? 0x05 : 0x02; in tda18250_pll_calc()
488 return 0; in tda18250_pll_calc()
504 #define REG 0 in tda18250_set_params()
514 [REG] = { 0x22, 0x23, 0x24, 0x21, 0x0d, 0x0c, 0x0f, 0x14, in tda18250_set_params()
515 0x0e, 0x12, 0x58, 0x59, 0x1a, 0x19, 0x1e, 0x30 }, in tda18250_set_params()
516 [MASK] = { 0x77, 0xff, 0xff, 0x87, 0xf0, 0x78, 0x07, 0xe0, in tda18250_set_params()
517 0x60, 0x0f, 0x60, 0x0f, 0x33, 0x30, 0x80, 0x06 }, in tda18250_set_params()
518 [DVBT_6] = { 0x51, 0x03, 0x83, 0x82, 0x40, 0x48, 0x01, 0xe0, in tda18250_set_params()
519 0x60, 0x0f, 0x60, 0x05, 0x03, 0x10, 0x00, 0x04 }, in tda18250_set_params()
520 [DVBT_7] = { 0x52, 0x03, 0x85, 0x82, 0x40, 0x48, 0x01, 0xe0, in tda18250_set_params()
521 0x60, 0x0f, 0x60, 0x05, 0x03, 0x10, 0x00, 0x04 }, in tda18250_set_params()
522 [DVBT_8] = { 0x53, 0x03, 0x87, 0x82, 0x40, 0x48, 0x06, 0xe0, in tda18250_set_params()
523 0x60, 0x07, 0x60, 0x05, 0x03, 0x10, 0x00, 0x04 }, in tda18250_set_params()
524 [DVBC_6] = { 0x32, 0x05, 0x86, 0x82, 0x50, 0x00, 0x06, 0x60, in tda18250_set_params()
525 0x40, 0x0e, 0x60, 0x05, 0x33, 0x10, 0x00, 0x04 }, in tda18250_set_params()
526 [DVBC_8] = { 0x53, 0x03, 0x88, 0x82, 0x50, 0x00, 0x06, 0x60, in tda18250_set_params()
527 0x40, 0x0e, 0x60, 0x05, 0x33, 0x10, 0x00, 0x04 }, in tda18250_set_params()
528 [ATSC] = { 0x51, 0x03, 0x83, 0x82, 0x40, 0x48, 0x01, 0xe0, in tda18250_set_params()
529 0x40, 0x0e, 0x60, 0x05, 0x03, 0x00, 0x80, 0x04 }, in tda18250_set_params()
544 if (c->bandwidth_hz == 0) { in tda18250_set_params()
563 if (c->bandwidth_hz == 0) { in tda18250_set_params()
585 for (i = 0; i < 16; i++) { in tda18250_set_params()
607 ret = regmap_write_bits(dev->regmap, R1A_AGCK, 0x03, 0x01); in tda18250_set_params()
611 ret = regmap_write_bits(dev->regmap, R14_AGC23, 0x40, 0x00); in tda18250_set_params()
616 buf[0] = ((c->frequency / 1000) >> 16) & 0xff; in tda18250_set_params()
617 buf[1] = ((c->frequency / 1000) >> 8) & 0xff; in tda18250_set_params()
618 buf[2] = ((c->frequency / 1000) >> 0) & 0xff; in tda18250_set_params()
628 ret = regmap_write(dev->regmap, R2A_MSM1, 0x01); in tda18250_set_params()
632 ret = regmap_write(dev->regmap, R2B_MSM2, 0x01); in tda18250_set_params()
641 ret = tda18250_pll_calc(fe, &buf[0], &buf[1], &buf[2]); in tda18250_set_params()
645 ret = regmap_write_bits(dev->regmap, R4F_XTALFLX3, 0xe0, in tda18250_set_params()
646 (buf[0] << 6) | (buf[1] << 5)); in tda18250_set_params()
655 ret = regmap_write_bits(dev->regmap, R46_CPUMP, 0x07, 0x00); in tda18250_set_params()
659 ret = regmap_write_bits(dev->regmap, R39_SD5, 0x03, 0x00); in tda18250_set_params()
664 ret = regmap_write(dev->regmap, R2A_MSM1, 0x01); /* tune */ in tda18250_set_params()
668 ret = regmap_write(dev->regmap, R2B_MSM2, 0x01); /* go */ in tda18250_set_params()
679 ret = regmap_write_bits(dev->regmap, R2B_MSM2, 0x04, 0x04); in tda18250_set_params()
686 ret = regmap_write_bits(dev->regmap, R1A_AGCK, 0x03, 0x03); in tda18250_set_params()
690 ret = regmap_write_bits(dev->regmap, R14_AGC23, 0x40, 0x40); in tda18250_set_params()
695 ret = regmap_write_bits(dev->regmap, R46_CPUMP, 0x07, buf[2]); in tda18250_set_params()
697 return 0; in tda18250_set_params()
708 return 0; in tda18250_get_if_frequency()
720 ret = regmap_write_bits(dev->regmap, R0C_AGC11, 0x80, 0x00); in tda18250_sleep()
724 /* set if freq to 0 in order to make sure it's set after wake up */ in tda18250_sleep()
725 dev->if_frequency = 0; in tda18250_sleep()
796 dev->if_frequency = 0; in tda18250_probe()
808 chip_id[0], chip_id[1], chip_id[2]); in tda18250_probe()
810 switch (chip_id[0]) { in tda18250_probe()
811 case 0xc7: in tda18250_probe()
814 case 0x47: in tda18250_probe()
822 if (chip_id[1] != 0x4a) { in tda18250_probe()
828 case 0x20: in tda18250_probe()
833 case 0x21: in tda18250_probe()
850 return 0; in tda18250_probe()
865 memset(&fe->ops.tuner_ops, 0, sizeof(struct dvb_tuner_ops)); in tda18250_remove()