Lines Matching +full:0 +full:- +full:576
1 /* SPDX-License-Identifier: GPL-2.0-only */
13 #include "regs-mfc-v7.h"
16 #define S5P_FIMV_D_MVC_NUM_VIEWS_V8 0xf104
17 #define S5P_FIMV_D_MIN_SCRATCH_BUFFER_SIZE_V8 0xf108
18 #define S5P_FIMV_D_FIRST_PLANE_DPB_SIZE_V8 0xf144
19 #define S5P_FIMV_D_SECOND_PLANE_DPB_SIZE_V8 0xf148
20 #define S5P_FIMV_D_THIRD_PLANE_DPB_SIZE_V8 0xf14C
21 #define S5P_FIMV_D_MV_BUFFER_SIZE_V8 0xf150
23 #define S5P_FIMV_D_FIRST_PLANE_DPB_STRIDE_SIZE_V8 0xf138
24 #define S5P_FIMV_D_SECOND_PLANE_DPB_STRIDE_SIZE_V8 0xf13c
25 #define S5P_FIMV_D_THIRD_PLANE_DPB_STRIDE_SIZE_V8 0xf140
27 #define S5P_FIMV_D_FIRST_PLANE_DPB_V8 0xf160
28 #define S5P_FIMV_D_SECOND_PLANE_DPB_V8 0xf260
29 #define S5P_FIMV_D_THIRD_PLANE_DPB_V8 0xf360
30 #define S5P_FIMV_D_MV_BUFFER_V8 0xf460
32 #define S5P_FIMV_D_NUM_MV_V8 0xf134
33 #define S5P_FIMV_D_INIT_BUFFER_OPTIONS_V8 0xf154
35 #define S5P_FIMV_D_SCRATCH_BUFFER_ADDR_V8 0xf560
36 #define S5P_FIMV_D_SCRATCH_BUFFER_SIZE_V8 0xf564
38 #define S5P_FIMV_D_CPB_BUFFER_ADDR_V8 0xf5b0
39 #define S5P_FIMV_D_CPB_BUFFER_SIZE_V8 0xf5b4
40 #define S5P_FIMV_D_AVAILABLE_DPB_FLAG_LOWER_V8 0xf5bc
41 #define S5P_FIMV_D_CPB_BUFFER_OFFSET_V8 0xf5c0
42 #define S5P_FIMV_D_SLICE_IF_ENABLE_V8 0xf5c4
43 #define S5P_FIMV_D_STREAM_DATA_SIZE_V8 0xf5d0
46 #define S5P_FIMV_D_DISPLAY_FRAME_WIDTH_V8 0xf600
47 #define S5P_FIMV_D_DISPLAY_FRAME_HEIGHT_V8 0xf604
50 #define S5P_FIMV_D_DISPLAY_STATUS_V8 0xf608
52 #define S5P_FIMV_D_DISPLAY_FIRST_PLANE_ADDR_V8 0xf60c
53 #define S5P_FIMV_D_DISPLAY_SECOND_PLANE_ADDR_V8 0xf610
55 #define S5P_FIMV_D_DISPLAY_FRAME_TYPE_V8 0xf618
56 #define S5P_FIMV_D_DISPLAY_CROP_INFO1_V8 0xf61c
57 #define S5P_FIMV_D_DISPLAY_CROP_INFO2_V8 0xf620
58 #define S5P_FIMV_D_DISPLAY_PICTURE_PROFILE_V8 0xf624
61 #define S5P_FIMV_D_DECODED_STATUS_V8 0xf644
62 #define S5P_FIMV_D_DECODED_FIRST_PLANE_ADDR_V8 0xf648
63 #define S5P_FIMV_D_DECODED_SECOND_PLANE_ADDR_V8 0xf64c
64 #define S5P_FIMV_D_DECODED_THIRD_PLANE_ADDR_V8 0xf650
65 #define S5P_FIMV_D_DECODED_FRAME_TYPE_V8 0xf654
66 #define S5P_FIMV_D_DECODED_NAL_SIZE_V8 0xf664
69 #define S5P_FIMV_D_RET_PICTURE_TAG_TOP_V8 0xf674
70 #define S5P_FIMV_D_RET_PICTURE_TAG_BOT_V8 0xf678
71 #define S5P_FIMV_D_MVC_VIEW_ID_V8 0xf6d8
74 #define S5P_FIMV_D_FRAME_PACK_SEI_AVAIL_V8 0xf6dc
77 #define S5P_FIMV_E_FIXED_PICTURE_QP_V8 0xf794
78 #define S5P_FIMV_E_RC_CONFIG_V8 0xf798
79 #define S5P_FIMV_E_RC_QP_BOUND_V8 0xf79c
80 #define S5P_FIMV_E_RC_RPARAM_V8 0xf7a4
81 #define S5P_FIMV_E_MB_RC_CONFIG_V8 0xf7a8
82 #define S5P_FIMV_E_PADDING_CTRL_V8 0xf7ac
83 #define S5P_FIMV_E_MV_HOR_RANGE_V8 0xf7b4
84 #define S5P_FIMV_E_MV_VER_RANGE_V8 0xf7b8
86 #define S5P_FIMV_E_VBV_BUFFER_SIZE_V8 0xf78c
87 #define S5P_FIMV_E_VBV_INIT_DELAY_V8 0xf790
88 #define S5P_FIMV_E_MIN_SCRATCH_BUFFER_SIZE_V8 0xf894
90 #define S5P_FIMV_E_ASPECT_RATIO_V8 0xfb4c
91 #define S5P_FIMV_E_EXTENDED_SAR_V8 0xfb50
92 #define S5P_FIMV_E_H264_OPTIONS_V8 0xfb54
106 (((w) * 576 + (h) * 128) + 4128)
111 (((w) * 576) + 10512 + \
123 #define MFC_VERSION_V8 0x80