Lines Matching full:csid
3 * camss-csid-4-7.c
5 * Qualcomm MSM Camera Subsystem - CSID (CSI Decoder) Module
15 #include "camss-csid.h"
16 #include "camss-csid-gen2.h"
19 /* The CSID 2 IP-block is different from the others,
37 #define CSID_CSI2_RDIN_IRQ_STATUS(rdi) ((csid_is_lite(csid) ? 0x30 : 0x40) \
39 #define CSID_CSI2_RDIN_IRQ_MASK(rdi) ((csid_is_lite(csid) ? 0x34 : 0x44) \
41 #define CSID_CSI2_RDIN_IRQ_CLEAR(rdi) ((csid_is_lite(csid) ? 0x38 : 0x48) \
43 #define CSID_CSI2_RDIN_IRQ_SET(rdi) ((csid_is_lite(csid) ? 0x3C : 0x4C) \
75 #define CSID_RDI_CFG0(rdi) ((csid_is_lite(csid) ? 0x200 : 0x300) \
100 #define CSID_RDI_CFG1(rdi) ((csid_is_lite(csid) ? 0x204 : 0x304)\
104 #define CSID_RDI_CTRL(rdi) ((csid_is_lite(csid) ? 0x208 : 0x308)\
111 #define CSID_RDI_FRM_DROP_PATTERN(rdi) ((csid_is_lite(csid) ? 0x20C : 0x30C)\
113 #define CSID_RDI_FRM_DROP_PERIOD(rdi) ((csid_is_lite(csid) ? 0x210 : 0x310)\
115 #define CSID_RDI_IRQ_SUBSAMPLE_PATTERN(rdi) ((csid_is_lite(csid) ? 0x214 : 0x314)\
117 #define CSID_RDI_IRQ_SUBSAMPLE_PERIOD(rdi) ((csid_is_lite(csid) ? 0x218 : 0x318)\
119 #define CSID_RDI_RPP_PIX_DROP_PATTERN(rdi) ((csid_is_lite(csid) ? 0x224 : 0x324)\
121 #define CSID_RDI_RPP_PIX_DROP_PERIOD(rdi) ((csid_is_lite(csid) ? 0x228 : 0x328)\
123 #define CSID_RDI_RPP_LINE_DROP_PATTERN(rdi) ((csid_is_lite(csid) ? 0x22C : 0x32C)\
125 #define CSID_RDI_RPP_LINE_DROP_PERIOD(rdi) ((csid_is_lite(csid) ? 0x230 : 0x330)\
179 static void __csid_configure_rx(struct csid_device *csid, in __csid_configure_rx() argument
182 u8 lane_cnt = csid->phy.lane_cnt; in __csid_configure_rx()
191 writel_relaxed(val, csid->base + CSID_CSI2_RX_CFG0); in __csid_configure_rx()
197 writel_relaxed(val, csid->base + CSID_CSI2_RX_CFG1); in __csid_configure_rx()
200 static void __csid_ctrl_rdi(struct csid_device *csid, int enable, u8 rdi) in __csid_ctrl_rdi() argument
208 writel_relaxed(val, csid->base + CSID_RDI_CTRL(rdi)); in __csid_ctrl_rdi()
211 static void __csid_configure_testgen(struct csid_device *csid, u8 enable, u8 vc) in __csid_configure_testgen() argument
213 struct csid_testgen_config *tg = &csid->testgen; in __csid_configure_testgen()
214 struct v4l2_mbus_framefmt *input_format = &csid->fmt[MSM_CSID_PAD_FIRST_SRC + vc]; in __csid_configure_testgen()
215 const struct csid_format_info *format = csid_get_fmt_entry(csid->res->formats->formats, in __csid_configure_testgen()
216 csid->res->formats->nformats, in __csid_configure_testgen()
218 u8 lane_cnt = csid->phy.lane_cnt; in __csid_configure_testgen()
228 writel_relaxed(val, csid->base + CSID_TPG_VC_CFG0); in __csid_configure_testgen()
232 writel_relaxed(val, csid->base + CSID_TPG_VC_CFG1); in __csid_configure_testgen()
234 writel_relaxed(0x12345678, csid->base + CSID_TPG_LFSR_SEED); in __csid_configure_testgen()
238 writel_relaxed(val, csid->base + CSID_TPG_DT_n_CFG_0(0)); in __csid_configure_testgen()
241 writel_relaxed(val, csid->base + CSID_TPG_DT_n_CFG_1(0)); in __csid_configure_testgen()
246 writel_relaxed(val, csid->base + CSID_TPG_DT_n_CFG_2(0)); in __csid_configure_testgen()
248 writel_relaxed(0, csid->base + CSID_TPG_COLOR_BARS_CFG); in __csid_configure_testgen()
250 writel_relaxed(0, csid->base + CSID_TPG_COLOR_BOX_CFG); in __csid_configure_testgen()
258 writel_relaxed(val, csid->base + CSID_TPG_CTRL); in __csid_configure_testgen()
261 static void __csid_configure_rdi_stream(struct csid_device *csid, u8 enable, u8 vc) in __csid_configure_rdi_stream() argument
264 struct v4l2_mbus_framefmt *input_format = &csid->fmt[MSM_CSID_PAD_FIRST_SRC + vc]; in __csid_configure_rdi_stream()
265 const struct csid_format_info *format = csid_get_fmt_entry(csid->res->formats->formats, in __csid_configure_rdi_stream()
266 csid->res->formats->nformats, in __csid_configure_rdi_stream()
292 writel_relaxed(val, csid->base + CSID_RDI_CFG0(vc)); in __csid_configure_rdi_stream()
296 writel_relaxed(val, csid->base + CSID_RDI_CFG1(vc)); in __csid_configure_rdi_stream()
299 writel_relaxed(val, csid->base + CSID_RDI_FRM_DROP_PERIOD(vc)); in __csid_configure_rdi_stream()
302 writel_relaxed(val, csid->base + CSID_RDI_FRM_DROP_PATTERN(vc)); in __csid_configure_rdi_stream()
305 writel_relaxed(val, csid->base + CSID_RDI_IRQ_SUBSAMPLE_PERIOD(vc)); in __csid_configure_rdi_stream()
308 writel_relaxed(val, csid->base + CSID_RDI_IRQ_SUBSAMPLE_PATTERN(vc)); in __csid_configure_rdi_stream()
311 writel_relaxed(val, csid->base + CSID_RDI_RPP_PIX_DROP_PERIOD(vc)); in __csid_configure_rdi_stream()
314 writel_relaxed(val, csid->base + CSID_RDI_RPP_PIX_DROP_PATTERN(vc)); in __csid_configure_rdi_stream()
317 writel_relaxed(val, csid->base + CSID_RDI_RPP_LINE_DROP_PERIOD(vc)); in __csid_configure_rdi_stream()
320 writel_relaxed(val, csid->base + CSID_RDI_RPP_LINE_DROP_PATTERN(vc)); in __csid_configure_rdi_stream()
323 writel_relaxed(val, csid->base + CSID_RDI_CTRL(vc)); in __csid_configure_rdi_stream()
325 val = readl_relaxed(csid->base + CSID_RDI_CFG0(vc)); in __csid_configure_rdi_stream()
327 writel_relaxed(val, csid->base + CSID_RDI_CFG0(vc)); in __csid_configure_rdi_stream()
330 static void csid_configure_stream(struct csid_device *csid, u8 enable) in csid_configure_stream() argument
332 struct csid_testgen_config *tg = &csid->testgen; in csid_configure_stream()
336 if (csid->phy.en_vc & BIT(i)) { in csid_configure_stream()
338 __csid_configure_testgen(csid, enable, i); in csid_configure_stream()
340 __csid_configure_rdi_stream(csid, enable, i); in csid_configure_stream()
341 __csid_configure_rx(csid, &csid->phy, i); in csid_configure_stream()
342 __csid_ctrl_rdi(csid, enable, i); in csid_configure_stream()
346 static int csid_configure_testgen_pattern(struct csid_device *csid, s32 val) in csid_configure_testgen_pattern() argument
348 if (val > 0 && val <= csid->testgen.nmodes) in csid_configure_testgen_pattern()
349 csid->testgen.mode = val; in csid_configure_testgen_pattern()
355 * csid_hw_version - CSID hardware version query
356 * @csid: CSID device
360 static u32 csid_hw_version(struct csid_device *csid) in csid_hw_version() argument
367 hw_version = readl_relaxed(csid->base + CSID_HW_VERSION); in csid_hw_version()
371 dev_dbg(csid->camss->dev, "CSID HW Version = %u.%u.%u\n", in csid_hw_version()
378 * csid_isr - CSID module interrupt service routine
380 * @dev: CSID device
386 struct csid_device *csid = dev; in csid_isr() local
391 val = readl_relaxed(csid->base + CSID_TOP_IRQ_STATUS); in csid_isr()
392 writel_relaxed(val, csid->base + CSID_TOP_IRQ_CLEAR); in csid_isr()
395 val = readl_relaxed(csid->base + CSID_CSI2_RX_IRQ_STATUS); in csid_isr()
396 writel_relaxed(val, csid->base + CSID_CSI2_RX_IRQ_CLEAR); in csid_isr()
400 if (csid->phy.en_vc & BIT(i)) { in csid_isr()
401 val = readl_relaxed(csid->base + CSID_CSI2_RDIN_IRQ_STATUS(i)); in csid_isr()
402 writel_relaxed(val, csid->base + CSID_CSI2_RDIN_IRQ_CLEAR(i)); in csid_isr()
406 writel_relaxed(val, csid->base + CSID_IRQ_CMD); in csid_isr()
409 complete(&csid->reset_complete); in csid_isr()
415 * csid_reset - Trigger reset on CSID module and wait to complete
416 * @csid: CSID device
420 static int csid_reset(struct csid_device *csid) in csid_reset() argument
425 reinit_completion(&csid->reset_complete); in csid_reset()
427 writel_relaxed(1, csid->base + CSID_TOP_IRQ_CLEAR); in csid_reset()
428 writel_relaxed(1, csid->base + CSID_IRQ_CMD); in csid_reset()
429 writel_relaxed(1, csid->base + CSID_TOP_IRQ_MASK); in csid_reset()
430 writel_relaxed(1, csid->base + CSID_IRQ_CMD); in csid_reset()
434 writel_relaxed(val, csid->base + CSID_RST_STROBES); in csid_reset()
436 time = wait_for_completion_timeout(&csid->reset_complete, in csid_reset()
439 dev_err(csid->camss->dev, "CSID reset timeout\n"); in csid_reset()
446 static u32 csid_src_pad_code(struct csid_device *csid, u32 sink_code, in csid_src_pad_code() argument
478 static void csid_subdev_init(struct csid_device *csid) in csid_subdev_init() argument
480 csid->testgen.modes = csid_testgen_modes; in csid_subdev_init()
481 csid->testgen.nmodes = CSID_PAYLOAD_MODE_NUM_SUPPORTED_GEN2; in csid_subdev_init()