35 #define REG_PCAR		0x0020		/* PC address register */
36 #define REG_TSCR		0x0024		/* TS ctrl & status */
37 #define REG_MISC		0x0028		/* miscellaneous */
38 #define REG_MMAC		0x002c		/* MSB MAC address */
39 #define REG_IMAC		0x0030		/* ISB MAC address */
40 #define REG_LMAC		0x0034		/* LSB MAC address */
41 #define REG_SPID		0x0038		/* SPI data */
42 #define REG_SLCS		0x003c		/* serial links ctrl/status */
44 #define PID0_NOFIL		(0x0001 << 16)
45 #define PIDn_ENP		(0x0001 << 15)
46 #define PID0_END		(0x0001 << 14)
47 #define PID0_AFIL		(0x0001 << 13)
48 #define PIDn_PID		(0x1fff <<  0)
50 #define TSCR_NBPACKETS		(0x00ff << 24)
51 #define TSCR_DEM		(0x0001 << 17)
52 #define TSCR_DE			(0x0001 << 16)
53 #define TSCR_RSTN		(0x0001 << 15)
54 #define TSCR_MSKO		(0x0001 << 14)
55 #define TSCR_MSKA		(0x0001 << 13)
56 #define TSCR_MSKL		(0x0001 << 12)
57 #define TSCR_OVR		(0x0001 << 11)
58 #define TSCR_AFUL		(0x0001 << 10)
59 #define TSCR_LOCK		(0x0001 <<  9)
60 #define TSCR_IACK		(0x0001 <<  8)
61 #define TSCR_ADEF		(0x007f <<  0)
63 #define MISC_DVR		(0x0fff <<  4)
64 #define MISC_ALED		(0x0001 <<  3)
65 #define MISC_FRST		(0x0001 <<  2)
66 #define MISC_LED1		(0x0001 <<  1)
67 #define MISC_LED0		(0x0001 <<  0)
69 #define SPID_SPIDR		(0x00ff <<  0)
71 #define SLCS_SCL		(0x0001 <<  7)
72 #define SLCS_SDA		(0x0001 <<  6)
73 #define SLCS_CSN		(0x0001 <<  2)
74 #define SLCS_OVR		(0x0001 <<  1)
75 #define SLCS_SWC		(0x0001 <<  0)
80 #define I2C_ADDR_TDA10046	0x10
81 #define I2C_ADDR_TUA6034	0xc2
159 		pluto_rw(pluto, REG_SLCS, SLCS_SDA, 0);  in pluto_setsda()
169 		pluto_rw(pluto, REG_SLCS, SLCS_SCL, 0);  in pluto_setscl()
173 	if ((state) && (pluto->i2cbug == 0)) {  in pluto_setscl()
178 		pluto->i2cbug = 0;  in pluto_setscl()
248 	if (pluto->users++ == 0)  in pluto_start_feed()
249 		pluto_rw(pluto, REG_PIDn(0), PID0_AFIL | PID0_NOFIL, 0);  in pluto_start_feed()
251 	if ((f->pid < 0x2000) && (f->index < NHWFILTERS))  in pluto_start_feed()
253 	else if (pluto->full_ts_users++ == 0)  in pluto_start_feed()
254 		pluto_rw(pluto, REG_PIDn(0), PID0_NOFIL, PID0_NOFIL);  in pluto_start_feed()
256 	return 0;  in pluto_start_feed()
264 	if (--pluto->users == 0)  in pluto_stop_feed()
265 		pluto_rw(pluto, REG_PIDn(0), PID0_AFIL, PID0_AFIL);  in pluto_stop_feed()
267 	if ((f->pid < 0x2000) && (f->index < NHWFILTERS))  in pluto_stop_feed()
268 		pluto_rw(pluto, REG_PIDn(f->index), PIDn_ENP | PIDn_PID, 0x1fff);  in pluto_stop_feed()
269 	else if (--pluto->full_ts_users == 0)  in pluto_stop_feed()
270 		pluto_rw(pluto, REG_PIDn(0), PID0_NOFIL, 0);  in pluto_stop_feed()
272 	return 0;  in pluto_stop_feed()
292 	if ((nbpackets == 0) || (nbpackets > TS_DMA_PACKETS)) {  in pluto_dma_end()
293 		unsigned int i = 0;  in pluto_dma_end()
294 		while (pluto->dma_buf[i] == 0x47)  in pluto_dma_end()
297 		if (i == 0) {  in pluto_dma_end()
307 	memset(pluto->dma_buf, 0, nbpackets * 188);  in pluto_dma_end()
327 	if (tscr == 0xffffffff) {  in pluto_irq()
328 		if (pluto->dead == 0)  in pluto_irq()
345 			pluto->overflow = 0;  in pluto_irq()
392 	pluto_rw(pluto, REG_PIDn(0), PID0_END, PID0_END);  in pluto_hw_init()
394 	pluto_rw(pluto, REG_PIDn(0), PID0_END, 0);  in pluto_hw_init()
406 	return 0;  in pluto_hw_init()
414 	pluto_reset_ts(pluto, 0);  in pluto_hw_exit()
422 	pluto_reset_frontend(pluto, 0);  in pluto_hw_exit()
427 	if (denominator == 0)  in divide()
428 		return ~0;  in divide()
449 	buf[0] = (div >> 8) & 0x7f;  in lg_tdtpe001p_tuner_set_params()
450 	buf[1] = (div >> 0) & 0xff;  in lg_tdtpe001p_tuner_set_params()
453 		buf[2] = 0xb4;  in lg_tdtpe001p_tuner_set_params()
455 		buf[2] = 0xbc;  in lg_tdtpe001p_tuner_set_params()
457 		buf[2] = 0xf4;  in lg_tdtpe001p_tuner_set_params()
463 		buf[3] = 0x02;  in lg_tdtpe001p_tuner_set_params()
465 		buf[3] = 0x04;  in lg_tdtpe001p_tuner_set_params()
468 		buf[3] |= 0x08;  in lg_tdtpe001p_tuner_set_params()
471 	msg.flags = 0;  in lg_tdtpe001p_tuner_set_params()
478 	if (ret < 0)  in lg_tdtpe001p_tuner_set_params()
480 	else if (ret == 0)  in lg_tdtpe001p_tuner_set_params()
483 	return 0;  in lg_tdtpe001p_tuner_set_params()
497 	.invert_oclk = 0,
516 	if (ret < 0) {  in frontend_init()
522 	return 0;  in frontend_init()
529 			(val >> 12) & 0x0f, (val >> 4) & 0xff);  in pluto_read_rev()
535 	mac[0] = (val >> 8) & 0xff;  in pluto_read_mac()
536 	mac[1] = (val >> 0) & 0xff;  in pluto_read_mac()
539 	mac[2] = (val >> 8) & 0xff;  in pluto_read_mac()
540 	mac[3] = (val >> 0) & 0xff;  in pluto_read_mac()
543 	mac[4] = (val >> 8) & 0xff;  in pluto_read_mac()
544 	mac[5] = (val >> 0) & 0xff;  in pluto_read_mac()
555 	cis = pci_iomap(pdev, 1, 0);  in pluto_read_serial()
561 	for (i = 0xe0; i < 0x100; i += 4) {  in pluto_read_serial()
563 		for (j = 0; j < 32; j += 8) {  in pluto_read_serial()
564 			if ((val & 0xff) == 0xff)  in pluto_read_serial()
566 			printk(KERN_CONT "%c", val & 0xff);  in pluto_read_serial()
574 	return 0;  in pluto_read_serial()
592 	if (ret < 0)  in pluto2_probe()
596 	pci_write_config_dword(pdev, 0x6c, 0x8000);  in pluto2_probe()
599 	if (ret < 0)  in pluto2_probe()
605 	if (ret < 0)  in pluto2_probe()
608 	pluto->io_mem = pci_iomap(pdev, 0, 0x40);  in pluto2_probe()
617 	if (ret < 0)  in pluto2_probe()
621 	if (ret < 0)  in pluto2_probe()
643 	if (ret < 0)  in pluto2_probe()
649 	if (ret < 0)  in pluto2_probe()
666 	if (ret < 0)  in pluto2_probe()
677 	if (ret < 0)  in pluto2_probe()
681 	if (ret < 0)  in pluto2_probe()
685 	if (ret < 0)  in pluto2_probe()
689 	if (ret < 0)  in pluto2_probe()
693 	if (ret < 0)  in pluto2_probe()
757 #define PCI_VENDOR_ID_SCM	0x0432
760 #define PCI_DEVICE_ID_PLUTO2	0x0001