32 #include "xc5000.h"
71 } while (0)
84 	sizes[0] = dev->ts_packet_size * dev->ts_packet_count;  in queue_setup()
86 	return 0;  in queue_setup()
108 	memset(risc, 0, sizeof(*risc));  in buffer_finish()
128 	return 0;  in start_streaming()
165 	int ret = 0;  in cx88_dvb_bus_ctrl()
182 			dev->frontends.active_fe_id = 0;  in cx88_dvb_bus_ctrl()
216 	static const u8 clock_config[]  = { CLOCK_CTL,  0x38, 0x39 };  in dvico_fusionhdtv_demod_init()
217 	static const u8 reset[]         = { RESET,      0x80 };  in dvico_fusionhdtv_demod_init()
218 	static const u8 adc_ctl_1_cfg[] = { ADC_CTL_1,  0x40 };  in dvico_fusionhdtv_demod_init()
219 	static const u8 agc_cfg[]       = { AGC_TARGET, 0x24, 0x20 };  in dvico_fusionhdtv_demod_init()
220 	static const u8 gpp_ctl_cfg[]   = { GPP_CTL,    0x33 };  in dvico_fusionhdtv_demod_init()
221 	static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };  in dvico_fusionhdtv_demod_init()
231 	return 0;  in dvico_fusionhdtv_demod_init()
236 	static const u8 clock_config[]  = { CLOCK_CTL,  0x38, 0x38 };  in dvico_dual_demod_init()
237 	static const u8 reset[]         = { RESET,      0x80 };  in dvico_dual_demod_init()
238 	static const u8 adc_ctl_1_cfg[] = { ADC_CTL_1,  0x40 };  in dvico_dual_demod_init()
239 	static const u8 agc_cfg[]       = { AGC_TARGET, 0x28, 0x20 };  in dvico_dual_demod_init()
240 	static const u8 gpp_ctl_cfg[]   = { GPP_CTL,    0x33 };  in dvico_dual_demod_init()
241 	static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };  in dvico_dual_demod_init()
252 	return 0;  in dvico_dual_demod_init()
257 	static const u8 clock_config[]  = { 0x89, 0x38, 0x39 };  in dntv_live_dvbt_demod_init()
258 	static const u8 reset[]         = { 0x50, 0x80 };  in dntv_live_dvbt_demod_init()
259 	static const u8 adc_ctl_1_cfg[] = { 0x8E, 0x40 };  in dntv_live_dvbt_demod_init()
260 	static const u8 agc_cfg[]       = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,  in dntv_live_dvbt_demod_init()
261 				       0x00, 0xFF, 0x00, 0x40, 0x40 };  in dntv_live_dvbt_demod_init()
262 	static const u8 dntv_extra[]     = { 0xB5, 0x7A };  in dntv_live_dvbt_demod_init()
263 	static const u8 capt_range_cfg[] = { 0x75, 0x32 };  in dntv_live_dvbt_demod_init()
275 	return 0;  in dntv_live_dvbt_demod_init()
279 	.demod_address = 0x0f,
284 	.demod_address = 0x0f,
289 	.demod_address = 0x0f,
294 	.demod_address = (0x1e >> 1),
300 	.demod_address  = 0x08,
306 	static const u8 clock_config[]  = { 0x89, 0x38, 0x38 };  in dntv_live_dvbt_pro_demod_init()
307 	static const u8 reset[]         = { 0x50, 0x80 };  in dntv_live_dvbt_pro_demod_init()
308 	static const u8 adc_ctl_1_cfg[] = { 0x8E, 0x40 };  in dntv_live_dvbt_pro_demod_init()
309 	static const u8 agc_cfg[]       = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,  in dntv_live_dvbt_pro_demod_init()
310 				       0x00, 0xFF, 0x00, 0x40, 0x40 };  in dntv_live_dvbt_pro_demod_init()
311 	static const u8 dntv_extra[]     = { 0xB5, 0x7A };  in dntv_live_dvbt_pro_demod_init()
312 	static const u8 capt_range_cfg[] = { 0x75, 0x32 };  in dntv_live_dvbt_pro_demod_init()
324 	return 0;  in dntv_live_dvbt_pro_demod_init()
328 	.demod_address = 0x0f,
335 	.demod_address = 0x0f,
340 	.demod_address = 0x0f,
346 	.demod_address = 0x0f,
353 	.demod_address = 0x0f,
357 	.demod_address = 0x43,
362 	.demod_address = 0x63,
370 	dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;  in or51132_set_ts_param()
371 	return 0;  in or51132_set_ts_param()
375 	.demod_address = 0x15,
385 	if (index == 0)  in lgdt330x_pll_rf_set()
389 	return 0;  in lgdt330x_pll_rf_set()
397 		dev->ts_gen_cntrl |= 0x04;  in lgdt330x_set_ts_param()
399 		dev->ts_gen_cntrl &= ~0x04;  in lgdt330x_set_ts_param()
400 	return 0;  in lgdt330x_set_ts_param()
405 	.serial_mpeg   = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
411 	.serial_mpeg   = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
417 	.serial_mpeg   = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
425 	dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;  in nxt200x_set_ts_param()
426 	return 0;  in nxt200x_set_ts_param()
430 	.demod_address = 0x0a,
439 	dev->ts_gen_cntrl = 0x02;  in cx24123_set_ts_param()
440 	return 0;  in cx24123_set_ts_param()
450 		cx_write(MO_GP0_IO, 0x000006fb);  in kworld_dvbs_100_set_voltage()
452 		cx_write(MO_GP0_IO, 0x000006f9);  in kworld_dvbs_100_set_voltage()
456 	return 0;  in kworld_dvbs_100_set_voltage()
467 		cx_write(MO_GP0_IO, 0x0000efff);  in geniatech_dvbs_set_voltage()
472 	return 0;  in geniatech_dvbs_set_voltage()
481 	cx_set(MO_GP0_IO, 0x6040);  in tevii_dvbs_set_voltage()
484 		cx_clear(MO_GP0_IO, 0x20);  in tevii_dvbs_set_voltage()
487 		cx_set(MO_GP0_IO, 0x20);  in tevii_dvbs_set_voltage()
490 		cx_clear(MO_GP0_IO, 0x20);  in tevii_dvbs_set_voltage()
496 	return 0;  in tevii_dvbs_set_voltage()
508 		cx_write(MO_GP0_IO, 0x00001220);  in vp1027_set_voltage()
512 		cx_write(MO_GP0_IO, 0x00001222);  in vp1027_set_voltage()
516 		cx_write(MO_GP0_IO, 0x00001230);  in vp1027_set_voltage()
522 	return 0;  in vp1027_set_voltage()
526 	.demod_address = 0x55,
531 	.demod_address = 0x55,
536 	.demod_address = 0x15,
542 	.demod_address = 0x32 >> 1,
552 	.demod_address = 0x32 >> 1,
561 	.demod_address = 0x32 >> 1,
570 	.i2c_address	= 0x64,
575 	.demod_address = (0x1e >> 1),
581 	.demod_address = (0x1e >> 1),
597 	.i2c_address    = 0xc2 >> 1,
640 	return 0;  in attach_xc3028()
670 	return 0;  in attach_xc4000()
678 	dev->ts_gen_cntrl = 0x2;  in cx24116_set_ts_param()
680 	return 0;  in cx24116_set_ts_param()
688 	dev->ts_gen_cntrl = 0;  in stv0900_set_ts_param()
690 	return 0;  in stv0900_set_ts_param()
700 	cx_write(MO_SRST_IO, 0);  in cx24116_reset_device()
706 	return 0;  in cx24116_reset_device()
710 	.demod_address          = 0x05,
716 	.demod_address = 0x55,
728 	return 0;  in ds3000_set_ts_param()
732 	.demod_address = 0x68,
737 	.tuner_address = 0x60,
742 	.demod_address = 0x6a,
743 /*	demod_mode = 0,*/
745 	.clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
747 	.tun1_maddress = 0,/* 0x60 */
748 	.tun1_adc = 0,/* 2 Vpp */
754 	.tuner_address = 0x60,
759 	.demod_address = 0x68,
763 	.skip_reinit = 0,
772 	.demod_address = 0x68,
799 	return 0;  in cx8802_alloc_frontends()
803 	     0x01, 0x15,
804 	     0x02, 0x00,
805 	     0x03, 0x00,
806 	     0x04, 0x7D,
807 	     0x05, 0x0F,
808 	     0x06, 0x02,
809 	     0x07, 0x00,
810 	     0x08, 0x60,
812 	     0x0A, 0xC2,
813 	     0x0B, 0x00,
814 	     0x0C, 0x01,
815 	     0x0D, 0x81,
816 	     0x0E, 0x44,
817 	     0x0F, 0x09,
818 	     0x10, 0x3C,
819 	     0x11, 0x84,
820 	     0x12, 0xDA,
821 	     0x13, 0x99,
822 	     0x14, 0x8D,
823 	     0x15, 0xCE,
824 	     0x16, 0xE8,
825 	     0x17, 0x43,
826 	     0x18, 0x1C,
827 	     0x19, 0x1B,
828 	     0x1A, 0x1D,
830 	     0x1C, 0x12,
831 	     0x1D, 0x00,
832 	     0x1E, 0x00,
833 	     0x1F, 0x00,
834 	     0x20, 0x00,
835 	     0x21, 0x00,
836 	     0x22, 0x00,
837 	     0x23, 0x00,
839 	     0x28, 0x02,
840 	     0x29, 0x28,
841 	     0x2A, 0x14,
842 	     0x2B, 0x0F,
843 	     0x2C, 0x09,
844 	     0x2D, 0x05,
846 	     0x31, 0x1F,
847 	     0x32, 0x19,
848 	     0x33, 0xFC,
849 	     0x34, 0x13,
850 	     0xff, 0xff,
860 		.addr = 0x61,  in samsung_smt_7020_tuner_set_params()
861 		.flags = 0,  in samsung_smt_7020_tuner_set_params()
867 	buf[0] = (div >> 8) & 0x7f;  in samsung_smt_7020_tuner_set_params()
868 	buf[1] = div & 0xff;  in samsung_smt_7020_tuner_set_params()
869 	buf[2] = 0x84;  /* 0xC4 */  in samsung_smt_7020_tuner_set_params()
870 	buf[3] = 0x00;  in samsung_smt_7020_tuner_set_params()
873 		buf[3] |= 0x10;  in samsung_smt_7020_tuner_set_params()
881 	return 0;  in samsung_smt_7020_tuner_set_params()
890 	cx_set(MO_GP0_IO, 0x0800);  in samsung_smt_7020_set_tone()
894 		cx_set(MO_GP0_IO, 0x08);  in samsung_smt_7020_set_tone()
897 		cx_clear(MO_GP0_IO, 0x08);  in samsung_smt_7020_set_tone()
903 	return 0;  in samsung_smt_7020_set_tone()
915 		.flags = 0,  in samsung_smt_7020_set_voltage()
919 	cx_set(MO_GP0_IO, 0x8000);  in samsung_smt_7020_set_voltage()
926 		cx_clear(MO_GP0_IO, 0x80);  in samsung_smt_7020_set_voltage()
930 		cx_clear(MO_GP0_IO, 0x80);  in samsung_smt_7020_set_voltage()
936 	return (i2c_transfer(&dev->core->i2c_adap, &msg, 1) == 1) ? 0 : -EIO;  in samsung_smt_7020_set_voltage()
942 	u8 aclk = 0;  in samsung_smt_7020_stv0299_set_symbol_rate()
943 	u8 bclk = 0;  in samsung_smt_7020_stv0299_set_symbol_rate()
946 		aclk = 0xb7;  in samsung_smt_7020_stv0299_set_symbol_rate()
947 		bclk = 0x47;  in samsung_smt_7020_stv0299_set_symbol_rate()
949 		aclk = 0xb7;  in samsung_smt_7020_stv0299_set_symbol_rate()
950 		bclk = 0x4b;  in samsung_smt_7020_stv0299_set_symbol_rate()
952 		aclk = 0xb7;  in samsung_smt_7020_stv0299_set_symbol_rate()
953 		bclk = 0x4f;  in samsung_smt_7020_stv0299_set_symbol_rate()
955 		aclk = 0xb7;  in samsung_smt_7020_stv0299_set_symbol_rate()
956 		bclk = 0x53;  in samsung_smt_7020_stv0299_set_symbol_rate()
958 		aclk = 0xb6;  in samsung_smt_7020_stv0299_set_symbol_rate()
959 		bclk = 0x53;  in samsung_smt_7020_stv0299_set_symbol_rate()
961 		aclk = 0xb4;  in samsung_smt_7020_stv0299_set_symbol_rate()
962 		bclk = 0x51;  in samsung_smt_7020_stv0299_set_symbol_rate()
965 	stv0299_writereg(fe, 0x13, aclk);  in samsung_smt_7020_stv0299_set_symbol_rate()
966 	stv0299_writereg(fe, 0x14, bclk);  in samsung_smt_7020_stv0299_set_symbol_rate()
967 	stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);  in samsung_smt_7020_stv0299_set_symbol_rate()
968 	stv0299_writereg(fe, 0x20, (ratio >>  8) & 0xff);  in samsung_smt_7020_stv0299_set_symbol_rate()
969 	stv0299_writereg(fe, 0x21, ratio & 0xf0);  in samsung_smt_7020_stv0299_set_symbol_rate()
971 	return 0;  in samsung_smt_7020_stv0299_set_symbol_rate()
975 	.demod_address = 0x68,
978 	.invert = 0,
979 	.skip_reinit = 0,
990 	int mfe_shared = 0; /* bus not shared by default */  in dvb_register()
993 	if (core->i2c_rc != 0) {  in dvb_register()
1004 	dev->frontends.gate = 0;  in dvb_register()
1017 					0x61, &core->i2c_adap,  in dvb_register()
1031 					0x60, &core->i2c_adap,  in dvb_register()
1045 					&core->i2c_adap, 0x61,  in dvb_register()
1056 					&core->i2c_adap, 0x61,  in dvb_register()
1073 					0x08, ISL6421_DCL, 0x00, false))  in dvb_register()
1089 					0x61, TUNER_PHILIPS_FMD1216ME_MK3))  in dvb_register()
1099 					0x60, NULL, DVB_PLL_THOMSON_DTT7579))  in dvb_register()
1109 					0x60, NULL, DVB_PLL_THOMSON_DTT7579))  in dvb_register()
1123 					0x61, NULL, DVB_PLL_THOMSON_DTT7579))  in dvb_register()
1133 					0x61, NULL, DVB_PLL_THOMSON_DTT7579))  in dvb_register()
1143 					0x61, NULL, DVB_PLL_LG_Z201))  in dvb_register()
1155 					0x61, NULL, DVB_PLL_UNKNOWN_1))  in dvb_register()
1167 					&core->i2c_adap, 0x61,  in dvb_register()
1181 					&core->i2c_adap, 0x61,  in dvb_register()
1201 		if (attach_xc3028(0x61, dev) < 0)  in dvb_register()
1209 					&core->i2c_adap, 0x61,  in dvb_register()
1215 		dev->ts_gen_cntrl = 0x08;  in dvb_register()
1227 					       0x0e,  in dvb_register()
1231 					&core->i2c_adap, 0x61,  in dvb_register()
1237 		dev->ts_gen_cntrl = 0x08;  in dvb_register()
1246 					       0x0e,  in dvb_register()
1250 					&core->i2c_adap, 0x61,  in dvb_register()
1256 		dev->ts_gen_cntrl = 0x08;  in dvb_register()
1265 					       0x0e,  in dvb_register()
1269 					&core->i2c_adap, 0x61,  in dvb_register()
1273 					&core->i2c_adap, 0x43))  in dvb_register()
1278 		dev->ts_gen_cntrl = 0x08;  in dvb_register()
1287 					       0x59,  in dvb_register()
1291 					&core->i2c_adap, 0x61,  in dvb_register()
1295 					&core->i2c_adap, 0x43))  in dvb_register()
1305 					&core->i2c_adap, 0x61,  in dvb_register()
1324 					&core->i2c_adap, 0x08, ISL6421_DCL,  in dvb_register()
1325 					0x00, override_tone))  in dvb_register()
1366 				.i2c_addr  = 0x61,  in dvb_register()
1388 			if (attach_xc3028(0x61, dev) < 0)  in dvb_register()
1399 				.i2c_address	  = 0x61,  in dvb_register()
1400 				.default_pm	  = 0,  in dvb_register()
1406 			if (attach_xc4000(dev, &cfg) < 0)  in dvb_register()
1411 		dev->ts_gen_cntrl = 0x00;  in dvb_register()
1416 		if (attach_xc3028(0x61, dev) < 0)  in dvb_register()
1423 		if (attach_xc3028(0x61, dev) < 0)  in dvb_register()
1449 					0x08, ISL6421_DCL, 0x00, false))  in dvb_register()
1465 					0x61, TUNER_PHILIPS_FMD1216ME_MK3))  in dvb_register()
1477 					0x08, ISL6421_DCL, 0x00, false))  in dvb_register()
1488 			if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,  in dvb_register()
1500 						fe0->dvb.frontend, 0x61,  in dvb_register()
1542 			if (attach_xc3028(0x61, dev) < 0)  in dvb_register()
1551 					       &core->i2c_adap, 0);  in dvb_register()
1572 		dev->ts_gen_cntrl = 0x08;  in dvb_register()
1574 		cx_set(MO_GP0_IO, 0x0101);  in dvb_register()
1576 		cx_clear(MO_GP0_IO, 0x01);  in dvb_register()
1578 		cx_set(MO_GP0_IO, 0x01);  in dvb_register()
1597 		dev->ts_gen_cntrl = 0x00;  in dvb_register()
1649 	int err = 0;  in cx8802_dvb_advise_acquire()
1660 		cx_set(MO_GP0_IO, 0x00000080);  in cx8802_dvb_advise_acquire()
1662 		cx_clear(MO_GP0_IO, 0x00000080);  in cx8802_dvb_advise_acquire()
1664 		cx_set(MO_GP0_IO, 0x00000080);  in cx8802_dvb_advise_acquire()
1667 		cx_clear(MO_GP0_IO, 0x00000004);  in cx8802_dvb_advise_acquire()
1674 		cx_set(MO_GP0_IO, 0x00000080);  in cx8802_dvb_advise_acquire()
1676 		cx_clear(MO_GP0_IO, 0x00000080);  in cx8802_dvb_advise_acquire()
1678 		cx_set(MO_GP0_IO, 0x00000080);  in cx8802_dvb_advise_acquire()
1683 			cx_set(MO_GP0_IO, 0x00000004);  in cx8802_dvb_advise_acquire()
1686 			core->dvbdev->ts_gen_cntrl = 0x02; /* Parallel IO */  in cx8802_dvb_advise_acquire()
1690 			cx_write(MO_SRST_IO, 0);  in cx8802_dvb_advise_acquire()
1692 			cx_clear(MO_GP0_IO, 0x00000004);  in cx8802_dvb_advise_acquire()
1693 			core->dvbdev->ts_gen_cntrl = 0x0c; /* Serial IO */  in cx8802_dvb_advise_acquire()
1701 		cx_write(MO_GP2_IO, 0x0101);  in cx8802_dvb_advise_acquire()
1714 	int err = 0;  in cx8802_dvb_advise_release()
1750 	/* If vp3054 isn't enabled, a stub will just return 0 */  in cx8802_dvb_probe()
1752 	if (err != 0)  in cx8802_dvb_probe()
1757 	dev->ts_gen_cntrl = 0x0c;  in cx8802_dvb_probe()
1787 		if (err < 0)  in cx8802_dvb_probe()
1818 	return 0;  in cx8802_dvb_remove()