3157 	gpio_bits(LM1882_SYNC_DRIVE,LM1882_SYNC_DRIVE);  in init_ids_eagle()
3168 	gpio_bits(3, input & 3);  in eagle_muxsel()
3178 	gpio_bits(LM1882_SYNC_DRIVE,LM1882_SYNC_DRIVE);  in eagle_muxsel()
3212 	gpio_bits( 0xf, inmux );  in sigmaSQ_muxsel()
3219 	gpio_bits( 3<<9, inmux<<9 );  in sigmaSLC_muxsel()
3226 	gpio_bits(0xf, inmux);  in geovision_muxsel()
3241 	gpio_bits((1<<18) | 0xff, value);  in td3116_latch_value()
3242 	gpio_bits((1<<18) | 0xff, (1<<18) | value);  in td3116_latch_value()
3244 	gpio_bits((1<<18) | 0xff, value);  in td3116_latch_value()
3749 	gpio_bits((1 << gpio.data) | (1 << gpio.clk) | (1 << gpio.wren), val);  in bttv_tea575x_set_pins()
3752 		gpio_bits(btv->mbox_iow | btv->mbox_csel, 0);  in bttv_tea575x_set_pins()
3755 		gpio_bits(btv->mbox_ior | btv->mbox_iow | btv->mbox_csel,  in bttv_tea575x_set_pins()
3769 		gpio_bits(btv->mbox_ior | btv->mbox_csel, 0);  in bttv_tea575x_get_pins()
3775 		gpio_bits(btv->mbox_ior | btv->mbox_iow | btv->mbox_csel,  in bttv_tea575x_get_pins()
3878 			gpio_bits(BTTV_ALT_DCLK,0);  in pvr_altera_load()
3880 				gpio_bits(BTTV_ALT_DATA,BTTV_ALT_DATA);  in pvr_altera_load()
3882 				gpio_bits(BTTV_ALT_DATA,0);  in pvr_altera_load()
3883 			gpio_bits(BTTV_ALT_DCLK,BTTV_ALT_DCLK);  in pvr_altera_load()
3887 	gpio_bits(BTTV_ALT_DCLK,0);  in pvr_altera_load()
3892 		gpio_bits(BTTV_ALT_DCLK,0);  in pvr_altera_load()
3893 		gpio_bits(BTTV_ALT_DCLK,BTTV_ALT_DCLK);  in pvr_altera_load()
3895 	gpio_bits(BTTV_ALT_DCLK,0);  in pvr_altera_load()
4102 	gpio_bits(bttv_tvcards[btv->c.type].gpiomask, gpiobits);  in bttv_tda9880_setnorm()
4119 	gpio_bits(mask,0);  in boot_msp34xx()
4122 	gpio_bits(mask,mask);  in boot_msp34xx()
4152 	gpio_bits(0xffffff, 0);  in init_PXC200()
4394 	gpio_bits(0x07f, muxgpio[input]);  in rv605_muxsel()
4397 	gpio_bits(0x200,0x200);  in rv605_muxsel()
4399 	gpio_bits(0x200,0x000);  in rv605_muxsel()
4403 	gpio_bits(0x480,0x480);  in rv605_muxsel()
4405 	gpio_bits(0x480,0x080);  in rv605_muxsel()
4440 	gpio_bits(0x0f0000, input << 16);  in tibetCS16_muxsel()
4484 	gpio_bits(0x1ff, udata);		/* write ADDR and DAT */  in kodicom4400r_write()
4485 	gpio_bits(0x1ff, udata | (1 << 8));	/* strobe high */  in kodicom4400r_write()
4486 	gpio_bits(0x1ff, udata);		/* strobe low */  in kodicom4400r_write()
4749 	gpio_bits(0x3, mux);  in phytec_muxsel()
4785 	gpio_bits(0x1007f, ADDRESS | CSELECT);	/* write ADDRESS and CSELECT */  in gv800s_write()
4786 	gpio_bits(0x20000, STROBE);		/* STROBE high */  in gv800s_write()
4787 	gpio_bits(0x40000, DATA);		/* write DATA */  in gv800s_write()
4788 	gpio_bits(0x20000, ~STROBE);		/* STROBE low */  in gv800s_write()