Lines Matching +full:0 +full:x36c

13 #define PCI_VENDOR_ID_BROOKTREE 0x109e
16 #define PCI_DEVICE_ID_BT848 0x350
19 #define PCI_DEVICE_ID_BT849 0x351
22 #define PCI_DEVICE_ID_FUSION879 0x36c
26 #define PCI_DEVICE_ID_BT878 0x36e
29 #define PCI_DEVICE_ID_BT879 0x36f
34 #define BT848_DSTATUS 0x000
42 #define BT848_DSTATUS_COF (1<<0)
44 #define BT848_IFORM 0x004
62 #define BT848_IFORM_AUTO 0
65 #define BT848_TDEC 0x008
68 #define BT848_TDEC_DEC_RAT (0x1f)
70 #define BT848_E_CROP 0x00C
71 #define BT848_O_CROP 0x08C
73 #define BT848_E_VDELAY_LO 0x010
74 #define BT848_O_VDELAY_LO 0x090
76 #define BT848_E_VACTIVE_LO 0x014
77 #define BT848_O_VACTIVE_LO 0x094
79 #define BT848_E_HDELAY_LO 0x018
80 #define BT848_O_HDELAY_LO 0x098
82 #define BT848_E_HACTIVE_LO 0x01C
83 #define BT848_O_HACTIVE_LO 0x09C
85 #define BT848_E_HSCALE_HI 0x020
86 #define BT848_O_HSCALE_HI 0x0A0
88 #define BT848_E_HSCALE_LO 0x024
89 #define BT848_O_HSCALE_LO 0x0A4
91 #define BT848_BRIGHT 0x028
93 #define BT848_E_CONTROL 0x02C
94 #define BT848_O_CONTROL 0x0AC
101 #define BT848_CONTROL_SAT_V_MSB (1<<0)
103 #define BT848_CONTRAST_LO 0x030
104 #define BT848_SAT_U_LO 0x034
105 #define BT848_SAT_V_LO 0x038
106 #define BT848_HUE 0x03C
108 #define BT848_E_SCLOOP 0x040
109 #define BT848_O_SCLOOP 0x0C0
112 #define BT848_SCLOOP_HFILT_AUTO (0<<3)
123 #define BT848_OFORM 0x048
125 #define BT848_OFORM_CORE0 (0<<5)
130 #define BT848_E_VSCALE_HI 0x04C
131 #define BT848_O_VSCALE_HI 0x0CC
137 #define BT848_E_VSCALE_LO 0x050
138 #define BT848_O_VSCALE_LO 0x0D0
139 #define BT848_TEST 0x054
140 #define BT848_ADELAY 0x060
141 #define BT848_BDELAY 0x064
143 #define BT848_ADC 0x068
150 #define BT848_ADC_CRUSH (1<<0)
152 #define BT848_WC_UP 0x044
153 #define BT848_WC_DOWN 0x078
155 #define BT848_E_VTC 0x06C
156 #define BT848_O_VTC 0x0EC
158 #define BT848_VTC_VFILT_2TAP 0
163 #define BT848_SRESET 0x07C
165 #define BT848_COLOR_FMT 0x0D4
166 #define BT848_COLOR_FMT_O_RGB32 (0<<4)
177 #define BT848_COLOR_FMT_E_RGB32 0
189 #define BT848_COLOR_FMT_RGB32 0x00
190 #define BT848_COLOR_FMT_RGB24 0x11
191 #define BT848_COLOR_FMT_RGB16 0x22
192 #define BT848_COLOR_FMT_RGB15 0x33
193 #define BT848_COLOR_FMT_YUY2 0x44
194 #define BT848_COLOR_FMT_BtYUV 0x55
195 #define BT848_COLOR_FMT_Y8 0x66
196 #define BT848_COLOR_FMT_RGB8 0x77
197 #define BT848_COLOR_FMT_YCrCb422 0x88
198 #define BT848_COLOR_FMT_YCrCb411 0x99
199 #define BT848_COLOR_FMT_RAW 0xee
201 #define BT848_VTOTAL_LO 0xB0
202 #define BT848_VTOTAL_HI 0xB4
204 #define BT848_COLOR_CTL 0x0D8
212 #define BT848_COLOR_CTL_BSWAP_EVEN (1<<0)
214 #define BT848_CAP_CTL 0x0DC
219 #define BT848_CAP_CTL_CAPTURE_EVEN (1<<0)
221 #define BT848_VBI_PACK_SIZE 0x0E0
223 #define BT848_VBI_PACK_DEL 0x0E4
224 #define BT848_VBI_PACK_DEL_VBI_HDELAY 0xfc
229 #define BT848_INT_STAT 0x100
230 #define BT848_INT_MASK 0x104
238 #define BT848_INT_RISCS (0xf<<28)
262 #define BT848_INT_FMTCHG (1<<0)
265 #define BT848_GPIO_DMA_CTL 0x10C
271 #define BT848_GPIO_DMA_CTL_PLTP23_4 (0<<6)
275 #define BT848_GPIO_DMA_CTL_PLTP1_4 (0<<4)
279 #define BT848_GPIO_DMA_CTL_PKTP_4 (0<<2)
284 #define BT848_GPIO_DMA_CTL_FIFO_ENABLE (1<<0)
286 #define BT848_I2C 0x110
291 #define BT848_I2C_DIV (0xf<<4)
295 #define BT848_I2C_SDA (1<<0)
297 #define BT848_RISC_STRT_ADD 0x114
298 #define BT848_GPIO_OUT_EN 0x118
299 #define BT848_GPIO_REG_INP 0x11C
300 #define BT848_RISC_COUNT 0x120
301 #define BT848_GPIO_DATA 0x200
307 #define BT848_FIFO_STATUS_FM1 0x06
308 #define BT848_FIFO_STATUS_FM3 0x0e
309 #define BT848_FIFO_STATUS_SOL 0x02
310 #define BT848_FIFO_STATUS_EOL4 0x01
311 #define BT848_FIFO_STATUS_EOL3 0x0d
312 #define BT848_FIFO_STATUS_EOL2 0x09
313 #define BT848_FIFO_STATUS_EOL1 0x05
314 #define BT848_FIFO_STATUS_VRE 0x04
315 #define BT848_FIFO_STATUS_VRO 0x0c
316 #define BT848_FIFO_STATUS_PXV 0x00
326 #define BT848_RISC_BYTE_ALL (0x0fU<<12)
327 #define BT848_RISC_BYTE_NONE 0
335 #define BT848_RISC_WRITE (0x01U<<28)
336 #define BT848_RISC_SKIP (0x02U<<28)
337 #define BT848_RISC_WRITEC (0x05U<<28)
338 #define BT848_RISC_JUMP (0x07U<<28)
339 #define BT848_RISC_SYNC (0x08U<<28)
341 #define BT848_RISC_WRITE123 (0x09U<<28)
342 #define BT848_RISC_SKIP123 (0x0aU<<28)
343 #define BT848_RISC_WRITE1S23 (0x0bU<<28)
347 #define BT848_TGLB 0x080
348 #define BT848_TGCTRL 0x084
349 #define BT848_FCAP 0x0E8
350 #define BT848_PLL_F_LO 0x0F0
351 #define BT848_PLL_F_HI 0x0F4
353 #define BT848_PLL_XCI 0x0F8
357 #define BT848_DVSIF 0x0FC
361 #define BT878_DEVCTRL 0x40
362 #define BT878_EN_TBFX 0x02
363 #define BT878_EN_VSFX 0x04