Lines Matching +full:0 +full:x5b00
35 #define OV8858_REG_ADDR_MASK 0xffff
40 #define OV8858_REG_SC_CTRL0100 OV8858_REG_8BIT(0x0100)
41 #define OV8858_MODE_SW_STANDBY 0x0
42 #define OV8858_MODE_STREAMING 0x1
44 #define OV8858_REG_CHIP_ID OV8858_REG_24BIT(0x300a)
45 #define OV8858_CHIP_ID 0x008858
47 #define OV8858_REG_SUB_ID OV8858_REG_8BIT(0x302a)
48 #define OV8858_R1A 0xb0
49 #define OV8858_R2A 0xb2
51 #define OV8858_REG_LONG_EXPO OV8858_REG_24BIT(0x3500)
56 #define OV8858_REG_LONG_GAIN OV8858_REG_16BIT(0x3508)
57 #define OV8858_LONG_GAIN_MIN 0x0
58 #define OV8858_LONG_GAIN_MAX 0x7ff
60 #define OV8858_LONG_GAIN_DEFAULT 0x80
62 #define OV8858_REG_LONG_DIGIGAIN OV8858_REG_16BIT(0x350a)
63 #define OV8858_LONG_DIGIGAIN_H_MASK 0x3fc0
64 #define OV8858_LONG_DIGIGAIN_L_MASK 0x3f
66 #define OV8858_LONG_DIGIGAIN_MIN 0x0
67 #define OV8858_LONG_DIGIGAIN_MAX 0x3fff
69 #define OV8858_LONG_DIGIGAIN_DEFAULT 0x200
71 #define OV8858_REG_VTS OV8858_REG_16BIT(0x380e)
72 #define OV8858_VTS_MAX 0x7fff
74 #define OV8858_REG_TEST_PATTERN OV8858_REG_8BIT(0x5e00)
75 #define OV8858_TEST_PATTERN_ENABLE 0x80
76 #define OV8858_TEST_PATTERN_DISABLE 0x0
78 #define REG_NULL 0xffff
130 {0x0100, 0x00},
131 {0x0100, 0x00},
132 {0x0100, 0x00},
133 {0x0100, 0x00},
134 {0x0302, 0x1e},
135 {0x0303, 0x00},
136 {0x0304, 0x03},
137 {0x030e, 0x00},
138 {0x030f, 0x09},
139 {0x0312, 0x01},
140 {0x031e, 0x0c},
141 {0x3600, 0x00},
142 {0x3601, 0x00},
143 {0x3602, 0x00},
144 {0x3603, 0x00},
145 {0x3604, 0x22},
146 {0x3605, 0x30},
147 {0x3606, 0x00},
148 {0x3607, 0x20},
149 {0x3608, 0x11},
150 {0x3609, 0x28},
151 {0x360a, 0x00},
152 {0x360b, 0x06},
153 {0x360c, 0xdc},
154 {0x360d, 0x40},
155 {0x360e, 0x0c},
156 {0x360f, 0x20},
157 {0x3610, 0x07},
158 {0x3611, 0x20},
159 {0x3612, 0x88},
160 {0x3613, 0x80},
161 {0x3614, 0x58},
162 {0x3615, 0x00},
163 {0x3616, 0x4a},
164 {0x3617, 0xb0},
165 {0x3618, 0x56},
166 {0x3619, 0x70},
167 {0x361a, 0x99},
168 {0x361b, 0x00},
169 {0x361c, 0x07},
170 {0x361d, 0x00},
171 {0x361e, 0x00},
172 {0x361f, 0x00},
173 {0x3638, 0xff},
174 {0x3633, 0x0c},
175 {0x3634, 0x0c},
176 {0x3635, 0x0c},
177 {0x3636, 0x0c},
178 {0x3645, 0x13},
179 {0x3646, 0x83},
180 {0x364a, 0x07},
181 {0x3015, 0x01},
182 {0x3018, 0x32},
183 {0x3020, 0x93},
184 {0x3022, 0x01},
185 {0x3031, 0x0a},
186 {0x3034, 0x00},
187 {0x3106, 0x01},
188 {0x3305, 0xf1},
189 {0x3308, 0x00},
190 {0x3309, 0x28},
191 {0x330a, 0x00},
192 {0x330b, 0x20},
193 {0x330c, 0x00},
194 {0x330d, 0x00},
195 {0x330e, 0x00},
196 {0x330f, 0x40},
197 {0x3307, 0x04},
198 {0x3500, 0x00},
199 {0x3501, 0x4d},
200 {0x3502, 0x40},
201 {0x3503, 0x00},
202 {0x3505, 0x80},
203 {0x3508, 0x04},
204 {0x3509, 0x00},
205 {0x350c, 0x00},
206 {0x350d, 0x80},
207 {0x3510, 0x00},
208 {0x3511, 0x02},
209 {0x3512, 0x00},
210 {0x3700, 0x18},
211 {0x3701, 0x0c},
212 {0x3702, 0x28},
213 {0x3703, 0x19},
214 {0x3704, 0x14},
215 {0x3705, 0x00},
216 {0x3706, 0x35},
217 {0x3707, 0x04},
218 {0x3708, 0x24},
219 {0x3709, 0x33},
220 {0x370a, 0x00},
221 {0x370b, 0xb5},
222 {0x370c, 0x04},
223 {0x3718, 0x12},
224 {0x3719, 0x31},
225 {0x3712, 0x42},
226 {0x3714, 0x24},
227 {0x371e, 0x19},
228 {0x371f, 0x40},
229 {0x3720, 0x05},
230 {0x3721, 0x05},
231 {0x3724, 0x06},
232 {0x3725, 0x01},
233 {0x3726, 0x06},
234 {0x3728, 0x05},
235 {0x3729, 0x02},
236 {0x372a, 0x03},
237 {0x372b, 0x53},
238 {0x372c, 0xa3},
239 {0x372d, 0x53},
240 {0x372e, 0x06},
241 {0x372f, 0x10},
242 {0x3730, 0x01},
243 {0x3731, 0x06},
244 {0x3732, 0x14},
245 {0x3733, 0x10},
246 {0x3734, 0x40},
247 {0x3736, 0x20},
248 {0x373a, 0x05},
249 {0x373b, 0x06},
250 {0x373c, 0x0a},
251 {0x373e, 0x03},
252 {0x3755, 0x10},
253 {0x3758, 0x00},
254 {0x3759, 0x4c},
255 {0x375a, 0x06},
256 {0x375b, 0x13},
257 {0x375c, 0x20},
258 {0x375d, 0x02},
259 {0x375e, 0x00},
260 {0x375f, 0x14},
261 {0x3768, 0x22},
262 {0x3769, 0x44},
263 {0x376a, 0x44},
264 {0x3761, 0x00},
265 {0x3762, 0x00},
266 {0x3763, 0x00},
267 {0x3766, 0xff},
268 {0x376b, 0x00},
269 {0x3772, 0x23},
270 {0x3773, 0x02},
271 {0x3774, 0x16},
272 {0x3775, 0x12},
273 {0x3776, 0x04},
274 {0x3777, 0x00},
275 {0x3778, 0x1b},
276 {0x37a0, 0x44},
277 {0x37a1, 0x3d},
278 {0x37a2, 0x3d},
279 {0x37a3, 0x00},
280 {0x37a4, 0x00},
281 {0x37a5, 0x00},
282 {0x37a6, 0x00},
283 {0x37a7, 0x44},
284 {0x37a8, 0x4c},
285 {0x37a9, 0x4c},
286 {0x3760, 0x00},
287 {0x376f, 0x01},
288 {0x37aa, 0x44},
289 {0x37ab, 0x2e},
290 {0x37ac, 0x2e},
291 {0x37ad, 0x33},
292 {0x37ae, 0x0d},
293 {0x37af, 0x0d},
294 {0x37b0, 0x00},
295 {0x37b1, 0x00},
296 {0x37b2, 0x00},
297 {0x37b3, 0x42},
298 {0x37b4, 0x42},
299 {0x37b5, 0x33},
300 {0x37b6, 0x00},
301 {0x37b7, 0x00},
302 {0x37b8, 0x00},
303 {0x37b9, 0xff},
304 {0x3800, 0x00},
305 {0x3801, 0x0c},
306 {0x3802, 0x00},
307 {0x3803, 0x0c},
308 {0x3804, 0x0c},
309 {0x3805, 0xd3},
310 {0x3806, 0x09},
311 {0x3807, 0xa3},
312 {0x3808, 0x06},
313 {0x3809, 0x60},
314 {0x380a, 0x04},
315 {0x380b, 0xc8},
316 {0x380c, 0x07},
317 {0x380d, 0x88},
318 {0x380e, 0x04},
319 {0x380f, 0xdc},
320 {0x3810, 0x00},
321 {0x3811, 0x04},
322 {0x3813, 0x02},
323 {0x3814, 0x03},
324 {0x3815, 0x01},
325 {0x3820, 0x00},
326 {0x3821, 0x67},
327 {0x382a, 0x03},
328 {0x382b, 0x01},
329 {0x3830, 0x08},
330 {0x3836, 0x02},
331 {0x3837, 0x18},
332 {0x3841, 0xff},
333 {0x3846, 0x48},
334 {0x3d85, 0x14},
335 {0x3f08, 0x08},
336 {0x3f0a, 0x80},
337 {0x4000, 0xf1},
338 {0x4001, 0x10},
339 {0x4005, 0x10},
340 {0x4002, 0x27},
341 {0x4009, 0x81},
342 {0x400b, 0x0c},
343 {0x401b, 0x00},
344 {0x401d, 0x00},
345 {0x4020, 0x00},
346 {0x4021, 0x04},
347 {0x4022, 0x04},
348 {0x4023, 0xb9},
349 {0x4024, 0x05},
350 {0x4025, 0x2a},
351 {0x4026, 0x05},
352 {0x4027, 0x2b},
353 {0x4028, 0x00},
354 {0x4029, 0x02},
355 {0x402a, 0x04},
356 {0x402b, 0x04},
357 {0x402c, 0x02},
358 {0x402d, 0x02},
359 {0x402e, 0x08},
360 {0x402f, 0x02},
361 {0x401f, 0x00},
362 {0x4034, 0x3f},
363 {0x403d, 0x04},
364 {0x4300, 0xff},
365 {0x4301, 0x00},
366 {0x4302, 0x0f},
367 {0x4316, 0x00},
368 {0x4500, 0x38},
369 {0x4503, 0x18},
370 {0x4600, 0x00},
371 {0x4601, 0xcb},
372 {0x481f, 0x32},
373 {0x4837, 0x16},
374 {0x4850, 0x10},
375 {0x4851, 0x32},
376 {0x4b00, 0x2a},
377 {0x4b0d, 0x00},
378 {0x4d00, 0x04},
379 {0x4d01, 0x18},
380 {0x4d02, 0xc3},
381 {0x4d03, 0xff},
382 {0x4d04, 0xff},
383 {0x4d05, 0xff},
384 {0x5000, 0x7e},
385 {0x5001, 0x01},
386 {0x5002, 0x08},
387 {0x5003, 0x20},
388 {0x5046, 0x12},
389 {0x5901, 0x00},
390 {0x5e00, 0x00},
391 {0x5e01, 0x41},
392 {0x382d, 0x7f},
393 {0x4825, 0x3a},
394 {0x4826, 0x40},
395 {0x4808, 0x25},
396 {REG_NULL, 0x00},
403 * AM19 : 3617 <- 0xC0
404 * AM20 : change FWC_6K_EN to be default 0x3618=0x5a
406 {0x0103, 0x01}, /* software reset */
407 {0x0100, 0x00}, /* software standby */
408 {0x0302, 0x1e}, /* pll1_multi */
409 {0x0303, 0x00}, /* pll1_divm */
410 {0x0304, 0x03}, /* pll1_div_mipi */
411 {0x030e, 0x02}, /* pll2_rdiv */
412 {0x030f, 0x04}, /* pll2_divsp */
413 {0x0312, 0x03}, /* pll2_pre_div0, pll2_r_divdac */
414 {0x031e, 0x0c}, /* pll1_no_lat */
415 {0x3600, 0x00},
416 {0x3601, 0x00},
417 {0x3602, 0x00},
418 {0x3603, 0x00},
419 {0x3604, 0x22},
420 {0x3605, 0x20},
421 {0x3606, 0x00},
422 {0x3607, 0x20},
423 {0x3608, 0x11},
424 {0x3609, 0x28},
425 {0x360a, 0x00},
426 {0x360b, 0x05},
427 {0x360c, 0xd4},
428 {0x360d, 0x40},
429 {0x360e, 0x0c},
430 {0x360f, 0x20},
431 {0x3610, 0x07},
432 {0x3611, 0x20},
433 {0x3612, 0x88},
434 {0x3613, 0x80},
435 {0x3614, 0x58},
436 {0x3615, 0x00},
437 {0x3616, 0x4a},
438 {0x3617, 0x90},
439 {0x3618, 0x5a},
440 {0x3619, 0x70},
441 {0x361a, 0x99},
442 {0x361b, 0x0a},
443 {0x361c, 0x07},
444 {0x361d, 0x00},
445 {0x361e, 0x00},
446 {0x361f, 0x00},
447 {0x3638, 0xff},
448 {0x3633, 0x0f},
449 {0x3634, 0x0f},
450 {0x3635, 0x0f},
451 {0x3636, 0x12},
452 {0x3645, 0x13},
453 {0x3646, 0x83},
454 {0x364a, 0x07},
455 {0x3015, 0x00},
456 {0x3018, 0x32}, /* MIPI 2 lane */
457 {0x3020, 0x93}, /* Clock switch output normal, pclk_div =/1 */
458 {0x3022, 0x01}, /* pd_mipi enable when rst_sync */
459 {0x3031, 0x0a}, /* MIPI 10-bit mode */
460 {0x3034, 0x00},
461 {0x3106, 0x01}, /* sclk_div, sclk_pre_div */
462 {0x3305, 0xf1},
463 {0x3308, 0x00},
464 {0x3309, 0x28},
465 {0x330a, 0x00},
466 {0x330b, 0x20},
467 {0x330c, 0x00},
468 {0x330d, 0x00},
469 {0x330e, 0x00},
470 {0x330f, 0x40},
471 {0x3307, 0x04},
472 {0x3500, 0x00}, /* exposure H */
473 {0x3501, 0x4d}, /* exposure M */
474 {0x3502, 0x40}, /* exposure L */
475 {0x3503, 0x80}, /* gain delay ?, exposure delay 1 frame, real gain */
476 {0x3505, 0x80}, /* gain option */
477 {0x3508, 0x02}, /* gain H */
478 {0x3509, 0x00}, /* gain L */
479 {0x350c, 0x00}, /* short gain H */
480 {0x350d, 0x80}, /* short gain L */
481 {0x3510, 0x00}, /* short exposure H */
482 {0x3511, 0x02}, /* short exposure M */
483 {0x3512, 0x00}, /* short exposure L */
484 {0x3700, 0x18},
485 {0x3701, 0x0c},
486 {0x3702, 0x28},
487 {0x3703, 0x19},
488 {0x3704, 0x14},
489 {0x3705, 0x00},
490 {0x3706, 0x82},
491 {0x3707, 0x04},
492 {0x3708, 0x24},
493 {0x3709, 0x33},
494 {0x370a, 0x01},
495 {0x370b, 0x82},
496 {0x370c, 0x04},
497 {0x3718, 0x12},
498 {0x3719, 0x31},
499 {0x3712, 0x42},
500 {0x3714, 0x24},
501 {0x371e, 0x19},
502 {0x371f, 0x40},
503 {0x3720, 0x05},
504 {0x3721, 0x05},
505 {0x3724, 0x06},
506 {0x3725, 0x01},
507 {0x3726, 0x06},
508 {0x3728, 0x05},
509 {0x3729, 0x02},
510 {0x372a, 0x03},
511 {0x372b, 0x53},
512 {0x372c, 0xa3},
513 {0x372d, 0x53},
514 {0x372e, 0x06},
515 {0x372f, 0x10},
516 {0x3730, 0x01},
517 {0x3731, 0x06},
518 {0x3732, 0x14},
519 {0x3733, 0x10},
520 {0x3734, 0x40},
521 {0x3736, 0x20},
522 {0x373a, 0x05},
523 {0x373b, 0x06},
524 {0x373c, 0x0a},
525 {0x373e, 0x03},
526 {0x3750, 0x0a},
527 {0x3751, 0x0e},
528 {0x3755, 0x10},
529 {0x3758, 0x00},
530 {0x3759, 0x4c},
531 {0x375a, 0x06},
532 {0x375b, 0x13},
533 {0x375c, 0x20},
534 {0x375d, 0x02},
535 {0x375e, 0x00},
536 {0x375f, 0x14},
537 {0x3768, 0x22},
538 {0x3769, 0x44},
539 {0x376a, 0x44},
540 {0x3761, 0x00},
541 {0x3762, 0x00},
542 {0x3763, 0x00},
543 {0x3766, 0xff},
544 {0x376b, 0x00},
545 {0x3772, 0x23},
546 {0x3773, 0x02},
547 {0x3774, 0x16},
548 {0x3775, 0x12},
549 {0x3776, 0x04},
550 {0x3777, 0x00},
551 {0x3778, 0x17},
552 {0x37a0, 0x44},
553 {0x37a1, 0x3d},
554 {0x37a2, 0x3d},
555 {0x37a3, 0x00},
556 {0x37a4, 0x00},
557 {0x37a5, 0x00},
558 {0x37a6, 0x00},
559 {0x37a7, 0x44},
560 {0x37a8, 0x4c},
561 {0x37a9, 0x4c},
562 {0x3760, 0x00},
563 {0x376f, 0x01},
564 {0x37aa, 0x44},
565 {0x37ab, 0x2e},
566 {0x37ac, 0x2e},
567 {0x37ad, 0x33},
568 {0x37ae, 0x0d},
569 {0x37af, 0x0d},
570 {0x37b0, 0x00},
571 {0x37b1, 0x00},
572 {0x37b2, 0x00},
573 {0x37b3, 0x42},
574 {0x37b4, 0x42},
575 {0x37b5, 0x31},
576 {0x37b6, 0x00},
577 {0x37b7, 0x00},
578 {0x37b8, 0x00},
579 {0x37b9, 0xff},
580 {0x3800, 0x00}, /* x start H */
581 {0x3801, 0x0c}, /* x start L */
582 {0x3802, 0x00}, /* y start H */
583 {0x3803, 0x0c}, /* y start L */
584 {0x3804, 0x0c}, /* x end H */
585 {0x3805, 0xd3}, /* x end L */
586 {0x3806, 0x09}, /* y end H */
587 {0x3807, 0xa3}, /* y end L */
588 {0x3808, 0x06}, /* x output size H */
589 {0x3809, 0x60}, /* x output size L */
590 {0x380a, 0x04}, /* y output size H */
591 {0x380b, 0xc8}, /* y output size L */
592 {0x380c, 0x07}, /* HTS H */
593 {0x380d, 0x88}, /* HTS L */
594 {0x380e, 0x04}, /* VTS H */
595 {0x380f, 0xdc}, /* VTS L */
596 {0x3810, 0x00}, /* ISP x win H */
597 {0x3811, 0x04}, /* ISP x win L */
598 {0x3813, 0x02}, /* ISP y win L */
599 {0x3814, 0x03}, /* x odd inc */
600 {0x3815, 0x01}, /* x even inc */
601 {0x3820, 0x00}, /* vflip off */
602 {0x3821, 0x67}, /* mirror on, bin on */
603 {0x382a, 0x03}, /* y odd inc */
604 {0x382b, 0x01}, /* y even inc */
605 {0x3830, 0x08},
606 {0x3836, 0x02},
607 {0x3837, 0x18},
608 {0x3841, 0xff}, /* window auto size enable */
609 {0x3846, 0x48},
610 {0x3d85, 0x16}, /* OTP power up load data enable with BIST */
611 {0x3d8c, 0x73}, /* OTP setting start High */
612 {0x3d8d, 0xde}, /* OTP setting start Low */
613 {0x3f08, 0x08},
614 {0x3f0a, 0x00},
615 {0x4000, 0xf1}, /* out_range_trig, format_chg_trig */
616 {0x4001, 0x10}, /* total 128 black column */
617 {0x4005, 0x10}, /* BLC target L */
618 {0x4002, 0x27}, /* value used to limit BLC offset */
619 {0x4009, 0x81}, /* final BLC offset limitation enable */
620 {0x400b, 0x0c}, /* DCBLC on, DCBLC manual mode on */
621 {0x401b, 0x00}, /* zero line R coefficient */
622 {0x401d, 0x00}, /* zoro line T coefficient */
623 {0x4020, 0x00}, /* Anchor left start H */
624 {0x4021, 0x04}, /* Anchor left start L */
625 {0x4022, 0x06}, /* Anchor left end H */
626 {0x4023, 0x00}, /* Anchor left end L */
627 {0x4024, 0x0f}, /* Anchor right start H */
628 {0x4025, 0x2a}, /* Anchor right start L */
629 {0x4026, 0x0f}, /* Anchor right end H */
630 {0x4027, 0x2b}, /* Anchor right end L */
631 {0x4028, 0x00}, /* top zero line start */
632 {0x4029, 0x02}, /* top zero line number */
633 {0x402a, 0x04}, /* top black line start */
634 {0x402b, 0x04}, /* top black line number */
635 {0x402c, 0x00}, /* bottom zero line start */
636 {0x402d, 0x02}, /* bottom zoro line number */
637 {0x402e, 0x04}, /* bottom black line start */
638 {0x402f, 0x04}, /* bottom black line number */
639 {0x401f, 0x00}, /* interpolation x/y disable, Anchor one disable */
640 {0x4034, 0x3f},
641 {0x403d, 0x04}, /* md_precision_en */
642 {0x4300, 0xff}, /* clip max H */
643 {0x4301, 0x00}, /* clip min H */
644 {0x4302, 0x0f}, /* clip min L, clip max L */
645 {0x4316, 0x00},
646 {0x4500, 0x58},
647 {0x4503, 0x18},
648 {0x4600, 0x00},
649 {0x4601, 0xcb},
650 {0x481f, 0x32}, /* clk prepare min */
651 {0x4837, 0x16}, /* global timing */
652 {0x4850, 0x10}, /* lane 1 = 1, lane 0 = 0 */
653 {0x4851, 0x32}, /* lane 3 = 3, lane 2 = 2 */
654 {0x4b00, 0x2a},
655 {0x4b0d, 0x00},
656 {0x4d00, 0x04}, /* temperature sensor */
657 {0x4d01, 0x18},
658 {0x4d02, 0xc3},
659 {0x4d03, 0xff},
660 {0x4d04, 0xff},
661 {0x4d05, 0xff}, /* temperature sensor */
662 {0x5000, 0xfe}, /* lenc on, slave/master AWB gain/statistics enable */
663 {0x5001, 0x01}, /* BLC on */
664 {0x5002, 0x08}, /* H scale off, WBMATCH off, OTP_DPC */
665 {0x5003, 0x20}, /* DPC_DBC buffer control enable, WB */
666 {0x501e, 0x93}, /* enable digital gain */
667 {0x5046, 0x12},
668 {0x5780, 0x3e}, /* DPC */
669 {0x5781, 0x0f},
670 {0x5782, 0x44},
671 {0x5783, 0x02},
672 {0x5784, 0x01},
673 {0x5785, 0x00},
674 {0x5786, 0x00},
675 {0x5787, 0x04},
676 {0x5788, 0x02},
677 {0x5789, 0x0f},
678 {0x578a, 0xfd},
679 {0x578b, 0xf5},
680 {0x578c, 0xf5},
681 {0x578d, 0x03},
682 {0x578e, 0x08},
683 {0x578f, 0x0c},
684 {0x5790, 0x08},
685 {0x5791, 0x04},
686 {0x5792, 0x00},
687 {0x5793, 0x52},
688 {0x5794, 0xa3}, /* DPC */
689 {0x5871, 0x0d}, /* Lenc */
690 {0x5870, 0x18},
691 {0x586e, 0x10},
692 {0x586f, 0x08},
693 {0x58f7, 0x01},
694 {0x58f8, 0x3d}, /* Lenc */
695 {0x5901, 0x00}, /* H skip off, V skip off */
696 {0x5b00, 0x02}, /* OTP DPC start address */
697 {0x5b01, 0x10}, /* OTP DPC start address */
698 {0x5b02, 0x03}, /* OTP DPC end address */
699 {0x5b03, 0xcf}, /* OTP DPC end address */
700 {0x5b05, 0x6c}, /* recover method = 2b11, */
701 {0x5e00, 0x00}, /* use 0x3ff to test pattern off */
702 {0x5e01, 0x41}, /* window cut enable */
703 {0x382d, 0x7f},
704 {0x4825, 0x3a}, /* lpx_p_min */
705 {0x4826, 0x40}, /* hs_prepare_min */
706 {0x4808, 0x25}, /* wake up delay in 1/1024 s */
707 {0x3763, 0x18},
708 {0x3768, 0xcc},
709 {0x470b, 0x28},
710 {0x4202, 0x00},
711 {0x400d, 0x10}, /* BLC offset trigger L */
712 {0x4040, 0x04}, /* BLC gain th2 */
713 {0x403e, 0x04}, /* BLC gain th1 */
714 {0x4041, 0xc6}, /* BLC */
715 {0x3007, 0x80},
716 {0x400a, 0x01},
717 {REG_NULL, 0x00},
729 * AM19 : 3617 <- 0xC0
730 * AM20 : change FWC_6K_EN to be default 0x3618=0x5a
732 {0x0100, 0x00},
733 {0x3501, 0x4d}, /* exposure M */
734 {0x3502, 0x40}, /* exposure L */
735 {0x3778, 0x17},
736 {0x3808, 0x06}, /* x output size H */
737 {0x3809, 0x60}, /* x output size L */
738 {0x380a, 0x04}, /* y output size H */
739 {0x380b, 0xc8}, /* y output size L */
740 {0x380c, 0x07}, /* HTS H */
741 {0x380d, 0x88}, /* HTS L */
742 {0x380e, 0x04}, /* VTS H */
743 {0x380f, 0xdc}, /* VTS L */
744 {0x3814, 0x03}, /* x odd inc */
745 {0x3821, 0x67}, /* mirror on, bin on */
746 {0x382a, 0x03}, /* y odd inc */
747 {0x3830, 0x08},
748 {0x3836, 0x02},
749 {0x3f0a, 0x00},
750 {0x4001, 0x10}, /* total 128 black column */
751 {0x4022, 0x06}, /* Anchor left end H */
752 {0x4023, 0x00}, /* Anchor left end L */
753 {0x4025, 0x2a}, /* Anchor right start L */
754 {0x4027, 0x2b}, /* Anchor right end L */
755 {0x402b, 0x04}, /* top black line number */
756 {0x402f, 0x04}, /* bottom black line number */
757 {0x4500, 0x58},
758 {0x4600, 0x00},
759 {0x4601, 0xcb},
760 {0x382d, 0x7f},
761 {0x0100, 0x01},
762 {REG_NULL, 0x00},
771 {0x0100, 0x00},
772 {0x3501, 0x9a}, /* exposure M */
773 {0x3502, 0x20}, /* exposure L */
774 {0x3778, 0x1a},
775 {0x3808, 0x0c}, /* x output size H */
776 {0x3809, 0xc0}, /* x output size L */
777 {0x380a, 0x09}, /* y output size H */
778 {0x380b, 0x90}, /* y output size L */
779 {0x380c, 0x07}, /* HTS H */
780 {0x380d, 0x94}, /* HTS L */
781 {0x380e, 0x09}, /* VTS H */
782 {0x380f, 0xaa}, /* VTS L */
783 {0x3814, 0x01}, /* x odd inc */
784 {0x3821, 0x46}, /* mirror on, bin off */
785 {0x382a, 0x01}, /* y odd inc */
786 {0x3830, 0x06},
787 {0x3836, 0x01},
788 {0x3f0a, 0x00},
789 {0x4001, 0x00}, /* total 256 black column */
790 {0x4022, 0x0c}, /* Anchor left end H */
791 {0x4023, 0x60}, /* Anchor left end L */
792 {0x4025, 0x36}, /* Anchor right start L */
793 {0x4027, 0x37}, /* Anchor right end L */
794 {0x402b, 0x08}, /* top black line number */
795 {0x402f, 0x08}, /* bottom black line number */
796 {0x4500, 0x58},
797 {0x4600, 0x01},
798 {0x4601, 0x97},
799 {0x382d, 0xff},
800 {REG_NULL, 0x00},
807 * AM19 : 3617 <- 0xC0
808 * AM20 : change FWC_6K_EN to be default 0x3618=0x5a
810 {0x0103, 0x01}, /* software reset for OVTATool only */
811 {0x0103, 0x01}, /* software reset */
812 {0x0100, 0x00}, /* software standby */
813 {0x0302, 0x1e}, /* pll1_multi */
814 {0x0303, 0x00}, /* pll1_divm */
815 {0x0304, 0x03}, /* pll1_div_mipi */
816 {0x030e, 0x00}, /* pll2_rdiv */
817 {0x030f, 0x04}, /* pll2_divsp */
818 {0x0312, 0x01}, /* pll2_pre_div0, pll2_r_divdac */
819 {0x031e, 0x0c}, /* pll1_no_lat */
820 {0x3600, 0x00},
821 {0x3601, 0x00},
822 {0x3602, 0x00},
823 {0x3603, 0x00},
824 {0x3604, 0x22},
825 {0x3605, 0x20},
826 {0x3606, 0x00},
827 {0x3607, 0x20},
828 {0x3608, 0x11},
829 {0x3609, 0x28},
830 {0x360a, 0x00},
831 {0x360b, 0x05},
832 {0x360c, 0xd4},
833 {0x360d, 0x40},
834 {0x360e, 0x0c},
835 {0x360f, 0x20},
836 {0x3610, 0x07},
837 {0x3611, 0x20},
838 {0x3612, 0x88},
839 {0x3613, 0x80},
840 {0x3614, 0x58},
841 {0x3615, 0x00},
842 {0x3616, 0x4a},
843 {0x3617, 0x90},
844 {0x3618, 0x5a},
845 {0x3619, 0x70},
846 {0x361a, 0x99},
847 {0x361b, 0x0a},
848 {0x361c, 0x07},
849 {0x361d, 0x00},
850 {0x361e, 0x00},
851 {0x361f, 0x00},
852 {0x3638, 0xff},
853 {0x3633, 0x0f},
854 {0x3634, 0x0f},
855 {0x3635, 0x0f},
856 {0x3636, 0x12},
857 {0x3645, 0x13},
858 {0x3646, 0x83},
859 {0x364a, 0x07},
860 {0x3015, 0x01},
861 {0x3018, 0x72}, /* MIPI 4 lane */
862 {0x3020, 0x93}, /* Clock switch output normal, pclk_div =/1 */
863 {0x3022, 0x01}, /* pd_mipi enable when rst_sync */
864 {0x3031, 0x0a}, /* MIPI 10-bit mode */
865 {0x3034, 0x00},
866 {0x3106, 0x01}, /* sclk_div, sclk_pre_div */
867 {0x3305, 0xf1},
868 {0x3308, 0x00},
869 {0x3309, 0x28},
870 {0x330a, 0x00},
871 {0x330b, 0x20},
872 {0x330c, 0x00},
873 {0x330d, 0x00},
874 {0x330e, 0x00},
875 {0x330f, 0x40},
876 {0x3307, 0x04},
877 {0x3500, 0x00}, /* exposure H */
878 {0x3501, 0x4d}, /* exposure M */
879 {0x3502, 0x40}, /* exposure L */
880 {0x3503, 0x80}, /* gain delay ?, exposure delay 1 frame, real gain */
881 {0x3505, 0x80}, /* gain option */
882 {0x3508, 0x02}, /* gain H */
883 {0x3509, 0x00}, /* gain L */
884 {0x350c, 0x00}, /* short gain H */
885 {0x350d, 0x80}, /* short gain L */
886 {0x3510, 0x00}, /* short exposure H */
887 {0x3511, 0x02}, /* short exposure M */
888 {0x3512, 0x00}, /* short exposure L */
889 {0x3700, 0x30},
890 {0x3701, 0x18},
891 {0x3702, 0x50},
892 {0x3703, 0x32},
893 {0x3704, 0x28},
894 {0x3705, 0x00},
895 {0x3706, 0x82},
896 {0x3707, 0x08},
897 {0x3708, 0x48},
898 {0x3709, 0x66},
899 {0x370a, 0x01},
900 {0x370b, 0x82},
901 {0x370c, 0x07},
902 {0x3718, 0x14},
903 {0x3719, 0x31},
904 {0x3712, 0x44},
905 {0x3714, 0x24},
906 {0x371e, 0x31},
907 {0x371f, 0x7f},
908 {0x3720, 0x0a},
909 {0x3721, 0x0a},
910 {0x3724, 0x0c},
911 {0x3725, 0x02},
912 {0x3726, 0x0c},
913 {0x3728, 0x0a},
914 {0x3729, 0x03},
915 {0x372a, 0x06},
916 {0x372b, 0xa6},
917 {0x372c, 0xa6},
918 {0x372d, 0xa6},
919 {0x372e, 0x0c},
920 {0x372f, 0x20},
921 {0x3730, 0x02},
922 {0x3731, 0x0c},
923 {0x3732, 0x28},
924 {0x3733, 0x10},
925 {0x3734, 0x40},
926 {0x3736, 0x30},
927 {0x373a, 0x0a},
928 {0x373b, 0x0b},
929 {0x373c, 0x14},
930 {0x373e, 0x06},
931 {0x3750, 0x0a},
932 {0x3751, 0x0e},
933 {0x3755, 0x10},
934 {0x3758, 0x00},
935 {0x3759, 0x4c},
936 {0x375a, 0x0c},
937 {0x375b, 0x26},
938 {0x375c, 0x20},
939 {0x375d, 0x04},
940 {0x375e, 0x00},
941 {0x375f, 0x28},
942 {0x3768, 0x22},
943 {0x3769, 0x44},
944 {0x376a, 0x44},
945 {0x3761, 0x00},
946 {0x3762, 0x00},
947 {0x3763, 0x00},
948 {0x3766, 0xff},
949 {0x376b, 0x00},
950 {0x3772, 0x46},
951 {0x3773, 0x04},
952 {0x3774, 0x2c},
953 {0x3775, 0x13},
954 {0x3776, 0x08},
955 {0x3777, 0x00},
956 {0x3778, 0x17},
957 {0x37a0, 0x88},
958 {0x37a1, 0x7a},
959 {0x37a2, 0x7a},
960 {0x37a3, 0x00},
961 {0x37a4, 0x00},
962 {0x37a5, 0x00},
963 {0x37a6, 0x00},
964 {0x37a7, 0x88},
965 {0x37a8, 0x98},
966 {0x37a9, 0x98},
967 {0x3760, 0x00},
968 {0x376f, 0x01},
969 {0x37aa, 0x88},
970 {0x37ab, 0x5c},
971 {0x37ac, 0x5c},
972 {0x37ad, 0x55},
973 {0x37ae, 0x19},
974 {0x37af, 0x19},
975 {0x37b0, 0x00},
976 {0x37b1, 0x00},
977 {0x37b2, 0x00},
978 {0x37b3, 0x84},
979 {0x37b4, 0x84},
980 {0x37b5, 0x60},
981 {0x37b6, 0x00},
982 {0x37b7, 0x00},
983 {0x37b8, 0x00},
984 {0x37b9, 0xff},
985 {0x3800, 0x00}, /* x start H */
986 {0x3801, 0x0c}, /* x start L */
987 {0x3802, 0x00}, /* y start H */
988 {0x3803, 0x0c}, /* y start L */
989 {0x3804, 0x0c}, /* x end H */
990 {0x3805, 0xd3}, /* x end L */
991 {0x3806, 0x09}, /* y end H */
992 {0x3807, 0xa3}, /* y end L */
993 {0x3808, 0x06}, /* x output size H */
994 {0x3809, 0x60}, /* x output size L */
995 {0x380a, 0x04}, /* y output size H */
996 {0x380b, 0xc8}, /* y output size L */
997 {0x380c, 0x07}, /* HTS H */
998 {0x380d, 0x88}, /* HTS L */
999 {0x380e, 0x04}, /* VTS H */
1000 {0x380f, 0xdc}, /* VTS L */
1001 {0x3810, 0x00}, /* ISP x win H */
1002 {0x3811, 0x04}, /* ISP x win L */
1003 {0x3813, 0x02}, /* ISP y win L */
1004 {0x3814, 0x03}, /* x odd inc */
1005 {0x3815, 0x01}, /* x even inc */
1006 {0x3820, 0x00}, /* vflip off */
1007 {0x3821, 0x67}, /* mirror on, bin o */
1008 {0x382a, 0x03}, /* y odd inc */
1009 {0x382b, 0x01}, /* y even inc */
1010 {0x3830, 0x08},
1011 {0x3836, 0x02},
1012 {0x3837, 0x18},
1013 {0x3841, 0xff}, /* window auto size enable */
1014 {0x3846, 0x48},
1015 {0x3d85, 0x16}, /* OTP power up load data/setting enable */
1016 {0x3d8c, 0x73}, /* OTP setting start High */
1017 {0x3d8d, 0xde}, /* OTP setting start Low */
1018 {0x3f08, 0x10},
1019 {0x3f0a, 0x00},
1020 {0x4000, 0xf1}, /* out_range/format_chg/gain/exp_chg trig enable */
1021 {0x4001, 0x10}, /* total 128 black column */
1022 {0x4005, 0x10}, /* BLC target L */
1023 {0x4002, 0x27}, /* value used to limit BLC offset */
1024 {0x4009, 0x81}, /* final BLC offset limitation enable */
1025 {0x400b, 0x0c}, /* DCBLC on, DCBLC manual mode on */
1026 {0x401b, 0x00}, /* zero line R coefficient */
1027 {0x401d, 0x00}, /* zoro line T coefficient */
1028 {0x4020, 0x00}, /* Anchor left start H */
1029 {0x4021, 0x04}, /* Anchor left start L */
1030 {0x4022, 0x06}, /* Anchor left end H */
1031 {0x4023, 0x00}, /* Anchor left end L */
1032 {0x4024, 0x0f}, /* Anchor right start H */
1033 {0x4025, 0x2a}, /* Anchor right start L */
1034 {0x4026, 0x0f}, /* Anchor right end H */
1035 {0x4027, 0x2b}, /* Anchor right end L */
1036 {0x4028, 0x00}, /* top zero line start */
1037 {0x4029, 0x02}, /* top zero line number */
1038 {0x402a, 0x04}, /* top black line start */
1039 {0x402b, 0x04}, /* top black line number */
1040 {0x402c, 0x00}, /* bottom zero line start */
1041 {0x402d, 0x02}, /* bottom zoro line number */
1042 {0x402e, 0x04}, /* bottom black line start */
1043 {0x402f, 0x04}, /* bottom black line number */
1044 {0x401f, 0x00}, /* interpolation x/y disable, Anchor one disable */
1045 {0x4034, 0x3f},
1046 {0x403d, 0x04}, /* md_precision_en */
1047 {0x4300, 0xff}, /* clip max H */
1048 {0x4301, 0x00}, /* clip min H */
1049 {0x4302, 0x0f}, /* clip min L, clip max L */
1050 {0x4316, 0x00},
1051 {0x4500, 0x58},
1052 {0x4503, 0x18},
1053 {0x4600, 0x00},
1054 {0x4601, 0xcb},
1055 {0x481f, 0x32}, /* clk prepare min */
1056 {0x4837, 0x16}, /* global timing */
1057 {0x4850, 0x10}, /* lane 1 = 1, lane 0 = 0 */
1058 {0x4851, 0x32}, /* lane 3 = 3, lane 2 = 2 */
1059 {0x4b00, 0x2a},
1060 {0x4b0d, 0x00},
1061 {0x4d00, 0x04}, /* temperature sensor */
1062 {0x4d01, 0x18},
1063 {0x4d02, 0xc3},
1064 {0x4d03, 0xff},
1065 {0x4d04, 0xff},
1066 {0x4d05, 0xff}, /* temperature sensor */
1067 {0x5000, 0xfe}, /* lenc on, slave/master AWB gain/statistics enable */
1068 {0x5001, 0x01}, /* BLC on */
1069 {0x5002, 0x08}, /* WBMATCH sensor's gain, H scale/WBMATCH/OTP_DPC off */
1070 {0x5003, 0x20}, /* DPC_DBC buffer control enable, WB */
1071 {0x501e, 0x93}, /* enable digital gain */
1072 {0x5046, 0x12},
1073 {0x5780, 0x3e}, /* DPC */
1074 {0x5781, 0x0f},
1075 {0x5782, 0x44},
1076 {0x5783, 0x02},
1077 {0x5784, 0x01},
1078 {0x5785, 0x00},
1079 {0x5786, 0x00},
1080 {0x5787, 0x04},
1081 {0x5788, 0x02},
1082 {0x5789, 0x0f},
1083 {0x578a, 0xfd},
1084 {0x578b, 0xf5},
1085 {0x578c, 0xf5},
1086 {0x578d, 0x03},
1087 {0x578e, 0x08},
1088 {0x578f, 0x0c},
1089 {0x5790, 0x08},
1090 {0x5791, 0x04},
1091 {0x5792, 0x00},
1092 {0x5793, 0x52},
1093 {0x5794, 0xa3}, /* DPC */
1094 {0x5871, 0x0d}, /* Lenc */
1095 {0x5870, 0x18},
1096 {0x586e, 0x10},
1097 {0x586f, 0x08},
1098 {0x58f7, 0x01},
1099 {0x58f8, 0x3d}, /* Lenc */
1100 {0x5901, 0x00}, /* H skip off, V skip off */
1101 {0x5b00, 0x02}, /* OTP DPC start address */
1102 {0x5b01, 0x10}, /* OTP DPC start address */
1103 {0x5b02, 0x03}, /* OTP DPC end address */
1104 {0x5b03, 0xcf}, /* OTP DPC end address */
1105 {0x5b05, 0x6c}, /* recover method = 2b11 */
1106 {0x5e00, 0x00}, /* use 0x3ff to test pattern off */
1107 {0x5e01, 0x41}, /* window cut enable */
1108 {0x382d, 0x7f},
1109 {0x4825, 0x3a}, /* lpx_p_min */
1110 {0x4826, 0x40}, /* hs_prepare_min */
1111 {0x4808, 0x25}, /* wake up delay in 1/1024 s */
1112 {0x3763, 0x18},
1113 {0x3768, 0xcc},
1114 {0x470b, 0x28},
1115 {0x4202, 0x00},
1116 {0x400d, 0x10}, /* BLC offset trigger L */
1117 {0x4040, 0x04}, /* BLC gain th2 */
1118 {0x403e, 0x04}, /* BLC gain th1 */
1119 {0x4041, 0xc6}, /* BLC */
1120 {0x3007, 0x80},
1121 {0x400a, 0x01},
1122 {REG_NULL, 0x00},
1131 {0x0100, 0x00},
1132 {0x3501, 0x4d}, /* exposure M */
1133 {0x3502, 0x40}, /* exposure L */
1134 {0x3808, 0x06}, /* x output size H */
1135 {0x3809, 0x60}, /* x output size L */
1136 {0x380a, 0x04}, /* y output size H */
1137 {0x380b, 0xc8}, /* y output size L */
1138 {0x380c, 0x07}, /* HTS H */
1139 {0x380d, 0x88}, /* HTS L */
1140 {0x380e, 0x04}, /* VTS H */
1141 {0x380f, 0xdc}, /* VTS L */
1142 {0x3814, 0x03}, /* x odd inc */
1143 {0x3821, 0x67}, /* mirror on, bin on */
1144 {0x382a, 0x03}, /* y odd inc */
1145 {0x3830, 0x08},
1146 {0x3836, 0x02},
1147 {0x3f0a, 0x00},
1148 {0x4001, 0x10}, /* total 128 black column */
1149 {0x4022, 0x06}, /* Anchor left end H */
1150 {0x4023, 0x00}, /* Anchor left end L */
1151 {0x4025, 0x2a}, /* Anchor right start L */
1152 {0x4027, 0x2b}, /* Anchor right end L */
1153 {0x402b, 0x04}, /* top black line number */
1154 {0x402f, 0x04}, /* bottom black line number */
1155 {0x4500, 0x58},
1156 {0x4600, 0x00},
1157 {0x4601, 0xcb},
1158 {0x382d, 0x7f},
1159 {0x0100, 0x01},
1160 {REG_NULL, 0x00},
1169 {0x0100, 0x00},
1170 {0x3501, 0x9a}, /* exposure M */
1171 {0x3502, 0x20}, /* exposure L */
1172 {0x3808, 0x0c}, /* x output size H */
1173 {0x3809, 0xc0}, /* x output size L */
1174 {0x380a, 0x09}, /* y output size H */
1175 {0x380b, 0x90}, /* y output size L */
1176 {0x380c, 0x07}, /* HTS H */
1177 {0x380d, 0x94}, /* HTS L */
1178 {0x380e, 0x09}, /* VTS H */
1179 {0x380f, 0xaa}, /* VTS L */
1180 {0x3814, 0x01}, /* x odd inc */
1181 {0x3821, 0x46}, /* mirror on, bin off */
1182 {0x382a, 0x01}, /* y odd inc */
1183 {0x3830, 0x06},
1184 {0x3836, 0x01},
1185 {0x3f0a, 0x00},
1186 {0x4001, 0x00}, /* total 256 black column */
1187 {0x4022, 0x0c}, /* Anchor left end H */
1188 {0x4023, 0x60}, /* Anchor left end L */
1189 {0x4025, 0x36}, /* Anchor right start L */
1190 {0x4027, 0x37}, /* Anchor right end L */
1191 {0x402b, 0x08}, /* top black line number */
1192 {0x402f, 0x08}, /* interpolation x/y disable, Anchor one disable */
1193 {0x4500, 0x58},
1194 {0x4600, 0x01},
1195 {0x4601, 0x97},
1196 {0x382d, 0xff},
1197 {REG_NULL, 0x00},
1257 ret = ret < 0 ? ret : -EIO; in ov8858_write()
1266 return 0; in ov8858_write()
1272 int ret = 0; in ov8858_write_array()
1274 for (i = 0; ret == 0 && regs[i].addr != REG_NULL; ++i) { in ov8858_write_array()
1288 __be32 data_be = 0; in ov8858_read()
1295 msgs[0].addr = client->addr; in ov8858_read()
1296 msgs[0].flags = 0; in ov8858_read()
1297 msgs[0].len = 2; in ov8858_read()
1298 msgs[0].buf = (u8 *)®_addr_be; in ov8858_read()
1308 ret = ret < 0 ? ret : -EIO; in ov8858_read()
1316 return 0; in ov8858_read()
1335 format = v4l2_subdev_state_get_format(state, 0); in ov8858_start_stream()
1363 return 0; in ov8858_start_stream()
1377 int ret = 0; in ov8858_s_stream()
1383 if (ret < 0) in ov8858_s_stream()
1430 *v4l2_subdev_state_get_format(state, 0) = fmt->format; in ov8858_set_fmt()
1433 return 0; in ov8858_set_fmt()
1445 return 0; in ov8858_set_fmt()
1463 return 0; in ov8858_enum_frame_sizes()
1470 if (code->index != 0) in ov8858_enum_mbus_code()
1475 return 0; in ov8858_enum_mbus_code()
1481 const struct ov8858_mode *def_mode = &ov8858_modes[0]; in ov8858_init_state()
1492 return 0; in ov8858_init_state()
1546 format = v4l2_subdev_state_get_format(state, 0); in ov8858_set_ctrl()
1561 return 0; in ov8858_set_ctrl()
1576 * 0x350a[7:0] = dgain[13:6] in ov8858_set_ctrl()
1577 * 0x350b[5:0] = dgain[5:0] in ov8858_set_ctrl()
1595 dev_warn(&client->dev, "%s Unhandled id: 0x%x\n", in ov8858_set_ctrl()
1624 if (ret < 0) { in ov8858_power_on()
1631 if (ret < 0) { in ov8858_power_on()
1643 gpiod_set_value_cansleep(ov8858->reset_gpio, 0); in ov8858_power_on()
1645 gpiod_set_value_cansleep(ov8858->pwdn_gpio, 0); in ov8858_power_on()
1648 return 0; in ov8858_power_on()
1683 return 0; in ov8858_runtime_suspend()
1699 const struct ov8858_mode *mode = &ov8858_modes[0]; in ov8858_init_ctrls()
1712 0, 0, link_freq_menu_items); in ov8858_init_ctrls()
1719 0, pixel_rate, 1, pixel_rate); in ov8858_init_ctrls()
1752 0, 0, ov8858_test_pattern_menu); in ov8858_init_ctrls()
1770 return 0; in ov8858_init_ctrls()
1782 u32 id = 0; in ov8858_check_sensor_id()
1790 dev_err(&client->dev, "Unexpected sensor id 0x%x\n", id); in ov8858_check_sensor_id()
1798 dev_info(&client->dev, "Detected OV8858 sensor, revision 0x%x\n", id); in ov8858_check_sensor_id()
1818 return 0; in ov8858_check_sensor_id()
1826 for (i = 0; i < ARRAY_SIZE(ov8858_supply_names); i++) in ov8858_configure_regulators()
1866 return 0; in ov8858_parse_of()
1917 if (ret < 0) in ov8858_probe()
1922 if (ret < 0) { in ov8858_probe()
1951 return 0; in ov8858_probe()