Lines Matching +full:no +full:- +full:sd
1 // SPDX-License-Identifier: GPL-2.0-only
3 * adv7604 - Analog Devices ADV7604 video decoder driver
11 * REF_01 - Analog devices, ADV7604, Register Settings Recommendations,
13 * REF_02 - Analog devices, Register map documentation, Documentation of
15 * REF_03 - Analog devices, ADV7604, Hardware Manual, Rev. F, August 2010
26 #include <linux/v4l2-dv-timings.h>
34 #include <media/v4l2-ctrls.h>
35 #include <media/v4l2-device.h>
36 #include <media/v4l2-event.h>
37 #include <media/v4l2-dv-timings.h>
38 #include <media/v4l2-fwnode.h>
42 MODULE_PARM_DESC(debug, "debug level (0-2)");
133 void (*set_termination)(struct v4l2_subdev *sd, bool enable);
134 void (*setup_irqs)(struct v4l2_subdev *sd);
135 unsigned int (*read_hdmi_pixelclock)(struct v4l2_subdev *sd);
136 unsigned int (*read_cable_det)(struct v4l2_subdev *sd);
174 struct v4l2_subdev sd; member
221 return state->info->has_afe; in adv76xx_has_afe()
328 /* ----------------------------------------------------------------------- */
330 static inline struct adv76xx_state *to_state(struct v4l2_subdev *sd) in to_state() argument
332 return container_of(sd, struct adv76xx_state, sd); in to_state()
345 /* ----------------------------------------------------------------------- */
350 struct i2c_client *client = state->i2c_clients[client_page]; in adv76xx_read_check()
354 err = regmap_read(state->regmap[client_page], reg, &val); in adv76xx_read_check()
358 client->addr, reg); in adv76xx_read_check()
374 struct regmap *regmap = state->regmap[client_page]; in adv76xx_write_block()
382 /* ----------------------------------------------------------------------- */
384 static inline int io_read(struct v4l2_subdev *sd, u8 reg) in io_read() argument
386 struct adv76xx_state *state = to_state(sd); in io_read()
391 static inline int io_write(struct v4l2_subdev *sd, u8 reg, u8 val) in io_write() argument
393 struct adv76xx_state *state = to_state(sd); in io_write()
395 return regmap_write(state->regmap[ADV76XX_PAGE_IO], reg, val); in io_write()
398 static inline int io_write_clr_set(struct v4l2_subdev *sd, u8 reg, u8 mask, in io_write_clr_set() argument
401 return io_write(sd, reg, (io_read(sd, reg) & ~mask) | val); in io_write_clr_set()
404 static inline int __always_unused avlink_read(struct v4l2_subdev *sd, u8 reg) in avlink_read() argument
406 struct adv76xx_state *state = to_state(sd); in avlink_read()
411 static inline int __always_unused avlink_write(struct v4l2_subdev *sd, u8 reg, u8 val) in avlink_write() argument
413 struct adv76xx_state *state = to_state(sd); in avlink_write()
415 return regmap_write(state->regmap[ADV7604_PAGE_AVLINK], reg, val); in avlink_write()
418 static inline int cec_read(struct v4l2_subdev *sd, u8 reg) in cec_read() argument
420 struct adv76xx_state *state = to_state(sd); in cec_read()
425 static inline int cec_write(struct v4l2_subdev *sd, u8 reg, u8 val) in cec_write() argument
427 struct adv76xx_state *state = to_state(sd); in cec_write()
429 return regmap_write(state->regmap[ADV76XX_PAGE_CEC], reg, val); in cec_write()
432 static inline int cec_write_clr_set(struct v4l2_subdev *sd, u8 reg, u8 mask, in cec_write_clr_set() argument
435 return cec_write(sd, reg, (cec_read(sd, reg) & ~mask) | val); in cec_write_clr_set()
438 static inline int infoframe_read(struct v4l2_subdev *sd, u8 reg) in infoframe_read() argument
440 struct adv76xx_state *state = to_state(sd); in infoframe_read()
445 static inline int __always_unused infoframe_write(struct v4l2_subdev *sd, u8 reg, u8 val) in infoframe_write() argument
447 struct adv76xx_state *state = to_state(sd); in infoframe_write()
449 return regmap_write(state->regmap[ADV76XX_PAGE_INFOFRAME], reg, val); in infoframe_write()
452 static inline int __always_unused afe_read(struct v4l2_subdev *sd, u8 reg) in afe_read() argument
454 struct adv76xx_state *state = to_state(sd); in afe_read()
459 static inline int afe_write(struct v4l2_subdev *sd, u8 reg, u8 val) in afe_write() argument
461 struct adv76xx_state *state = to_state(sd); in afe_write()
463 return regmap_write(state->regmap[ADV76XX_PAGE_AFE], reg, val); in afe_write()
466 static inline int rep_read(struct v4l2_subdev *sd, u8 reg) in rep_read() argument
468 struct adv76xx_state *state = to_state(sd); in rep_read()
473 static inline int rep_write(struct v4l2_subdev *sd, u8 reg, u8 val) in rep_write() argument
475 struct adv76xx_state *state = to_state(sd); in rep_write()
477 return regmap_write(state->regmap[ADV76XX_PAGE_REP], reg, val); in rep_write()
480 static inline int rep_write_clr_set(struct v4l2_subdev *sd, u8 reg, u8 mask, u8 val) in rep_write_clr_set() argument
482 return rep_write(sd, reg, (rep_read(sd, reg) & ~mask) | val); in rep_write_clr_set()
485 static inline int __always_unused edid_read(struct v4l2_subdev *sd, u8 reg) in edid_read() argument
487 struct adv76xx_state *state = to_state(sd); in edid_read()
492 static inline int __always_unused edid_write(struct v4l2_subdev *sd, u8 reg, u8 val) in edid_write() argument
494 struct adv76xx_state *state = to_state(sd); in edid_write()
496 return regmap_write(state->regmap[ADV76XX_PAGE_EDID], reg, val); in edid_write()
499 static inline int edid_write_block(struct v4l2_subdev *sd, in edid_write_block() argument
502 struct adv76xx_state *state = to_state(sd); in edid_write_block()
507 v4l2_dbg(2, debug, sd, "%s: write EDID block (%d byte)\n", in edid_write_block()
511 len = (total_len - i) > I2C_SMBUS_BLOCK_MAX ? in edid_write_block()
513 (total_len - i); in edid_write_block()
525 const struct adv76xx_chip_info *info = state->info; in adv76xx_set_hpd()
528 if (info->type == ADV7604) { in adv76xx_set_hpd()
529 for (i = 0; i < state->info->num_dv_ports; ++i) in adv76xx_set_hpd()
530 gpiod_set_value_cansleep(state->hpd_gpio[i], hpd & BIT(i)); in adv76xx_set_hpd()
532 for (i = 0; i < state->info->num_dv_ports; ++i) in adv76xx_set_hpd()
533 io_write_clr_set(&state->sd, 0x20, 0x80 >> i, in adv76xx_set_hpd()
534 (!!(hpd & BIT(i))) << (7 - i)); in adv76xx_set_hpd()
537 v4l2_subdev_notify(&state->sd, ADV76XX_HOTPLUG, &hpd); in adv76xx_set_hpd()
545 struct v4l2_subdev *sd = &state->sd; in adv76xx_delayed_work_enable_hotplug() local
547 v4l2_dbg(2, debug, sd, "%s: enable hotplug\n", __func__); in adv76xx_delayed_work_enable_hotplug()
549 adv76xx_set_hpd(state, state->edid.present); in adv76xx_delayed_work_enable_hotplug()
552 static inline int hdmi_read(struct v4l2_subdev *sd, u8 reg) in hdmi_read() argument
554 struct adv76xx_state *state = to_state(sd); in hdmi_read()
559 static u16 hdmi_read16(struct v4l2_subdev *sd, u8 reg, u16 mask) in hdmi_read16() argument
561 return ((hdmi_read(sd, reg) << 8) | hdmi_read(sd, reg + 1)) & mask; in hdmi_read16()
564 static inline int hdmi_write(struct v4l2_subdev *sd, u8 reg, u8 val) in hdmi_write() argument
566 struct adv76xx_state *state = to_state(sd); in hdmi_write()
568 return regmap_write(state->regmap[ADV76XX_PAGE_HDMI], reg, val); in hdmi_write()
571 static inline int hdmi_write_clr_set(struct v4l2_subdev *sd, u8 reg, u8 mask, u8 val) in hdmi_write_clr_set() argument
573 return hdmi_write(sd, reg, (hdmi_read(sd, reg) & ~mask) | val); in hdmi_write_clr_set()
576 static inline int __always_unused test_write(struct v4l2_subdev *sd, u8 reg, u8 val) in test_write() argument
578 struct adv76xx_state *state = to_state(sd); in test_write()
580 return regmap_write(state->regmap[ADV76XX_PAGE_TEST], reg, val); in test_write()
583 static inline int cp_read(struct v4l2_subdev *sd, u8 reg) in cp_read() argument
585 struct adv76xx_state *state = to_state(sd); in cp_read()
590 static u16 cp_read16(struct v4l2_subdev *sd, u8 reg, u16 mask) in cp_read16() argument
592 return ((cp_read(sd, reg) << 8) | cp_read(sd, reg + 1)) & mask; in cp_read16()
595 static inline int cp_write(struct v4l2_subdev *sd, u8 reg, u8 val) in cp_write() argument
597 struct adv76xx_state *state = to_state(sd); in cp_write()
599 return regmap_write(state->regmap[ADV76XX_PAGE_CP], reg, val); in cp_write()
602 static inline int cp_write_clr_set(struct v4l2_subdev *sd, u8 reg, u8 mask, u8 val) in cp_write_clr_set() argument
604 return cp_write(sd, reg, (cp_read(sd, reg) & ~mask) | val); in cp_write_clr_set()
607 static inline int __always_unused vdp_read(struct v4l2_subdev *sd, u8 reg) in vdp_read() argument
609 struct adv76xx_state *state = to_state(sd); in vdp_read()
614 static inline int __always_unused vdp_write(struct v4l2_subdev *sd, u8 reg, u8 val) in vdp_write() argument
616 struct adv76xx_state *state = to_state(sd); in vdp_write()
618 return regmap_write(state->regmap[ADV7604_PAGE_VDP], reg, val); in vdp_write()
625 static int adv76xx_read_reg(struct v4l2_subdev *sd, unsigned int reg) in adv76xx_read_reg() argument
627 struct adv76xx_state *state = to_state(sd); in adv76xx_read_reg()
632 if (page >= ADV76XX_PAGE_MAX || !(BIT(page) & state->info->page_mask)) in adv76xx_read_reg()
633 return -EINVAL; in adv76xx_read_reg()
636 err = regmap_read(state->regmap[page], reg, &val); in adv76xx_read_reg()
642 static int adv76xx_write_reg(struct v4l2_subdev *sd, unsigned int reg, u8 val) in adv76xx_write_reg() argument
644 struct adv76xx_state *state = to_state(sd); in adv76xx_write_reg()
647 if (page >= ADV76XX_PAGE_MAX || !(BIT(page) & state->info->page_mask)) in adv76xx_write_reg()
648 return -EINVAL; in adv76xx_write_reg()
652 return regmap_write(state->regmap[page], reg, val); in adv76xx_write_reg()
655 static void adv76xx_write_reg_seq(struct v4l2_subdev *sd, in adv76xx_write_reg_seq() argument
661 adv76xx_write_reg(sd, reg_seq[i].reg, reg_seq[i].val); in adv76xx_write_reg_seq()
664 /* -----------------------------------------------------------------------------
760 for (i = 0; i < state->info->nformats; ++i) { in adv76xx_format_info()
761 if (state->info->formats[i].code == code) in adv76xx_format_info()
762 return &state->info->formats[i]; in adv76xx_format_info()
768 /* ----------------------------------------------------------------------- */
770 static inline bool is_analog_input(struct v4l2_subdev *sd) in is_analog_input() argument
772 struct adv76xx_state *state = to_state(sd); in is_analog_input()
774 return state->selected_input == ADV7604_PAD_VGA_RGB || in is_analog_input()
775 state->selected_input == ADV7604_PAD_VGA_COMP; in is_analog_input()
778 static inline bool is_digital_input(struct v4l2_subdev *sd) in is_digital_input() argument
780 struct adv76xx_state *state = to_state(sd); in is_digital_input()
782 return state->selected_input == ADV76XX_PAD_HDMI_PORT_A || in is_digital_input()
783 state->selected_input == ADV7604_PAD_HDMI_PORT_B || in is_digital_input()
784 state->selected_input == ADV7604_PAD_HDMI_PORT_C || in is_digital_input()
785 state->selected_input == ADV7604_PAD_HDMI_PORT_D; in is_digital_input()
812 * case, pad value -1 returns the capabilities for the currently selected input.
815 adv76xx_get_dv_timings_cap(struct v4l2_subdev *sd, int pad) in adv76xx_get_dv_timings_cap() argument
817 if (pad == -1) { in adv76xx_get_dv_timings_cap()
818 struct adv76xx_state *state = to_state(sd); in adv76xx_get_dv_timings_cap()
820 pad = state->selected_input; in adv76xx_get_dv_timings_cap()
838 /* ----------------------------------------------------------------------- */
841 static void adv76xx_inv_register(struct v4l2_subdev *sd) in adv76xx_inv_register() argument
843 v4l2_info(sd, "0x000-0x0ff: IO Map\n"); in adv76xx_inv_register()
844 v4l2_info(sd, "0x100-0x1ff: AVLink Map\n"); in adv76xx_inv_register()
845 v4l2_info(sd, "0x200-0x2ff: CEC Map\n"); in adv76xx_inv_register()
846 v4l2_info(sd, "0x300-0x3ff: InfoFrame Map\n"); in adv76xx_inv_register()
847 v4l2_info(sd, "0x400-0x4ff: ESDP Map\n"); in adv76xx_inv_register()
848 v4l2_info(sd, "0x500-0x5ff: DPP Map\n"); in adv76xx_inv_register()
849 v4l2_info(sd, "0x600-0x6ff: AFE Map\n"); in adv76xx_inv_register()
850 v4l2_info(sd, "0x700-0x7ff: Repeater Map\n"); in adv76xx_inv_register()
851 v4l2_info(sd, "0x800-0x8ff: EDID Map\n"); in adv76xx_inv_register()
852 v4l2_info(sd, "0x900-0x9ff: HDMI Map\n"); in adv76xx_inv_register()
853 v4l2_info(sd, "0xa00-0xaff: Test Map\n"); in adv76xx_inv_register()
854 v4l2_info(sd, "0xb00-0xbff: CP Map\n"); in adv76xx_inv_register()
855 v4l2_info(sd, "0xc00-0xcff: VDP Map\n"); in adv76xx_inv_register()
858 static int adv76xx_g_register(struct v4l2_subdev *sd, in adv76xx_g_register() argument
863 ret = adv76xx_read_reg(sd, reg->reg); in adv76xx_g_register()
865 v4l2_info(sd, "Register %03llx not supported\n", reg->reg); in adv76xx_g_register()
866 adv76xx_inv_register(sd); in adv76xx_g_register()
870 reg->size = 1; in adv76xx_g_register()
871 reg->val = ret; in adv76xx_g_register()
876 static int adv76xx_s_register(struct v4l2_subdev *sd, in adv76xx_s_register() argument
881 ret = adv76xx_write_reg(sd, reg->reg, reg->val); in adv76xx_s_register()
883 v4l2_info(sd, "Register %03llx not supported\n", reg->reg); in adv76xx_s_register()
884 adv76xx_inv_register(sd); in adv76xx_s_register()
892 static unsigned int adv7604_read_cable_det(struct v4l2_subdev *sd) in adv7604_read_cable_det() argument
894 u8 value = io_read(sd, 0x6f); in adv7604_read_cable_det()
902 static unsigned int adv7611_read_cable_det(struct v4l2_subdev *sd) in adv7611_read_cable_det() argument
904 u8 value = io_read(sd, 0x6f); in adv7611_read_cable_det()
909 static unsigned int adv7612_read_cable_det(struct v4l2_subdev *sd) in adv7612_read_cable_det() argument
914 u8 value = io_read(sd, 0x6f); in adv7612_read_cable_det()
919 static int adv76xx_s_detect_tx_5v_ctrl(struct v4l2_subdev *sd) in adv76xx_s_detect_tx_5v_ctrl() argument
921 struct adv76xx_state *state = to_state(sd); in adv76xx_s_detect_tx_5v_ctrl()
922 const struct adv76xx_chip_info *info = state->info; in adv76xx_s_detect_tx_5v_ctrl()
923 u16 cable_det = info->read_cable_det(sd); in adv76xx_s_detect_tx_5v_ctrl()
925 return v4l2_ctrl_s_ctrl(state->detect_tx_5v_ctrl, cable_det); in adv76xx_s_detect_tx_5v_ctrl()
928 static int find_and_set_predefined_video_timings(struct v4l2_subdev *sd, in find_and_set_predefined_video_timings() argument
937 is_digital_input(sd) ? 250000 : 1000000, false)) in find_and_set_predefined_video_timings()
939 io_write(sd, 0x00, predef_vid_timings[i].vid_std); /* video std */ in find_and_set_predefined_video_timings()
940 io_write(sd, 0x01, (predef_vid_timings[i].v_freq << 4) + in find_and_set_predefined_video_timings()
945 return -1; in find_and_set_predefined_video_timings()
948 static int configure_predefined_video_timings(struct v4l2_subdev *sd, in configure_predefined_video_timings() argument
951 struct adv76xx_state *state = to_state(sd); in configure_predefined_video_timings()
954 v4l2_dbg(1, debug, sd, "%s", __func__); in configure_predefined_video_timings()
958 io_write(sd, 0x16, 0x43); in configure_predefined_video_timings()
959 io_write(sd, 0x17, 0x5a); in configure_predefined_video_timings()
962 cp_write_clr_set(sd, 0x81, 0x10, 0x00); in configure_predefined_video_timings()
963 cp_write(sd, 0x8f, 0x00); in configure_predefined_video_timings()
964 cp_write(sd, 0x90, 0x00); in configure_predefined_video_timings()
965 cp_write(sd, 0xa2, 0x00); in configure_predefined_video_timings()
966 cp_write(sd, 0xa3, 0x00); in configure_predefined_video_timings()
967 cp_write(sd, 0xa4, 0x00); in configure_predefined_video_timings()
968 cp_write(sd, 0xa5, 0x00); in configure_predefined_video_timings()
969 cp_write(sd, 0xa6, 0x00); in configure_predefined_video_timings()
970 cp_write(sd, 0xa7, 0x00); in configure_predefined_video_timings()
971 cp_write(sd, 0xab, 0x00); in configure_predefined_video_timings()
972 cp_write(sd, 0xac, 0x00); in configure_predefined_video_timings()
974 if (is_analog_input(sd)) { in configure_predefined_video_timings()
975 err = find_and_set_predefined_video_timings(sd, in configure_predefined_video_timings()
978 err = find_and_set_predefined_video_timings(sd, in configure_predefined_video_timings()
980 } else if (is_digital_input(sd)) { in configure_predefined_video_timings()
981 err = find_and_set_predefined_video_timings(sd, in configure_predefined_video_timings()
984 err = find_and_set_predefined_video_timings(sd, in configure_predefined_video_timings()
987 v4l2_dbg(2, debug, sd, "%s: Unknown port %d selected\n", in configure_predefined_video_timings()
988 __func__, state->selected_input); in configure_predefined_video_timings()
989 err = -1; in configure_predefined_video_timings()
996 static void configure_custom_video_timings(struct v4l2_subdev *sd, in configure_custom_video_timings() argument
999 struct adv76xx_state *state = to_state(sd); in configure_custom_video_timings()
1002 u16 cp_start_sav = bt->hsync + bt->hbackporch - 4; in configure_custom_video_timings()
1003 u16 cp_start_eav = width - bt->hfrontporch; in configure_custom_video_timings()
1004 u16 cp_start_vbi = height - bt->vfrontporch; in configure_custom_video_timings()
1005 u16 cp_end_vbi = bt->vsync + bt->vbackporch; in configure_custom_video_timings()
1006 u16 ch1_fr_ll = (((u32)bt->pixelclock / 100) > 0) ? in configure_custom_video_timings()
1007 ((width * (ADV76XX_FSC / 100)) / ((u32)bt->pixelclock / 100)) : 0; in configure_custom_video_timings()
1013 v4l2_dbg(2, debug, sd, "%s\n", __func__); in configure_custom_video_timings()
1015 if (is_analog_input(sd)) { in configure_custom_video_timings()
1017 io_write(sd, 0x00, 0x07); /* video std */ in configure_custom_video_timings()
1018 io_write(sd, 0x01, 0x02); /* prim mode */ in configure_custom_video_timings()
1020 cp_write_clr_set(sd, 0x81, 0x10, 0x10); in configure_custom_video_timings()
1022 /* Should only be set in auto-graphics mode [REF_02, p. 91-92] */ in configure_custom_video_timings()
1024 /* IO-map reg. 0x16 and 0x17 should be written in sequence */ in configure_custom_video_timings()
1025 if (regmap_raw_write(state->regmap[ADV76XX_PAGE_IO], in configure_custom_video_timings()
1027 v4l2_err(sd, "writing to reg 0x16 and 0x17 failed\n"); in configure_custom_video_timings()
1029 /* active video - horizontal timing */ in configure_custom_video_timings()
1030 cp_write(sd, 0xa2, (cp_start_sav >> 4) & 0xff); in configure_custom_video_timings()
1031 cp_write(sd, 0xa3, ((cp_start_sav & 0x0f) << 4) | in configure_custom_video_timings()
1033 cp_write(sd, 0xa4, cp_start_eav & 0xff); in configure_custom_video_timings()
1035 /* active video - vertical timing */ in configure_custom_video_timings()
1036 cp_write(sd, 0xa5, (cp_start_vbi >> 4) & 0xff); in configure_custom_video_timings()
1037 cp_write(sd, 0xa6, ((cp_start_vbi & 0xf) << 4) | in configure_custom_video_timings()
1039 cp_write(sd, 0xa7, cp_end_vbi & 0xff); in configure_custom_video_timings()
1040 } else if (is_digital_input(sd)) { in configure_custom_video_timings()
1043 io_write(sd, 0x00, 0x02); /* video std */ in configure_custom_video_timings()
1044 io_write(sd, 0x01, 0x06); /* prim mode */ in configure_custom_video_timings()
1046 v4l2_dbg(2, debug, sd, "%s: Unknown port %d selected\n", in configure_custom_video_timings()
1047 __func__, state->selected_input); in configure_custom_video_timings()
1050 cp_write(sd, 0x8f, (ch1_fr_ll >> 8) & 0x7); in configure_custom_video_timings()
1051 cp_write(sd, 0x90, ch1_fr_ll & 0xff); in configure_custom_video_timings()
1052 cp_write(sd, 0xab, (height >> 4) & 0xff); in configure_custom_video_timings()
1053 cp_write(sd, 0xac, (height & 0x0f) << 4); in configure_custom_video_timings()
1056 static void adv76xx_set_offset(struct v4l2_subdev *sd, bool auto_offset, u16 offset_a, u16 offset_b… in adv76xx_set_offset() argument
1058 struct adv76xx_state *state = to_state(sd); in adv76xx_set_offset()
1067 v4l2_dbg(2, debug, sd, "%s: %s offset: a = 0x%x, b = 0x%x, c = 0x%x\n", in adv76xx_set_offset()
1071 offset_buf[0] = (cp_read(sd, 0x77) & 0xc0) | ((offset_a & 0x3f0) >> 4); in adv76xx_set_offset()
1076 /* Registers must be written in this order with no i2c access in between */ in adv76xx_set_offset()
1077 if (regmap_raw_write(state->regmap[ADV76XX_PAGE_CP], in adv76xx_set_offset()
1079 v4l2_err(sd, "%s: i2c error writing to CP reg 0x77, 0x78, 0x79, 0x7a\n", __func__); in adv76xx_set_offset()
1082 static void adv76xx_set_gain(struct v4l2_subdev *sd, bool auto_gain, u16 gain_a, u16 gain_b, u16 ga… in adv76xx_set_gain() argument
1084 struct adv76xx_state *state = to_state(sd); in adv76xx_set_gain()
1097 v4l2_dbg(2, debug, sd, "%s: %s gain: a = 0x%x, b = 0x%x, c = 0x%x\n", in adv76xx_set_gain()
1106 /* Registers must be written in this order with no i2c access in between */ in adv76xx_set_gain()
1107 if (regmap_raw_write(state->regmap[ADV76XX_PAGE_CP], in adv76xx_set_gain()
1109 v4l2_err(sd, "%s: i2c error writing to CP reg 0x73, 0x74, 0x75, 0x76\n", __func__); in adv76xx_set_gain()
1112 static void set_rgb_quantization_range(struct v4l2_subdev *sd) in set_rgb_quantization_range() argument
1114 struct adv76xx_state *state = to_state(sd); in set_rgb_quantization_range()
1115 bool rgb_output = io_read(sd, 0x02) & 0x02; in set_rgb_quantization_range()
1116 bool hdmi_signal = hdmi_read(sd, 0x05) & 0x80; in set_rgb_quantization_range()
1119 if (hdmi_signal && (io_read(sd, 0x60) & 1)) in set_rgb_quantization_range()
1120 y = infoframe_read(sd, 0x01) >> 5; in set_rgb_quantization_range()
1122 v4l2_dbg(2, debug, sd, "%s: RGB quantization range: %d, RGB out: %d, HDMI: %d\n", in set_rgb_quantization_range()
1123 __func__, state->rgb_quantization_range, in set_rgb_quantization_range()
1126 adv76xx_set_gain(sd, true, 0x0, 0x0, 0x0); in set_rgb_quantization_range()
1127 adv76xx_set_offset(sd, true, 0x0, 0x0, 0x0); in set_rgb_quantization_range()
1128 io_write_clr_set(sd, 0x02, 0x04, rgb_output ? 0 : 4); in set_rgb_quantization_range()
1130 switch (state->rgb_quantization_range) { in set_rgb_quantization_range()
1132 if (state->selected_input == ADV7604_PAD_VGA_RGB) { in set_rgb_quantization_range()
1134 * Set RGB full range (0-255) */ in set_rgb_quantization_range()
1135 io_write_clr_set(sd, 0x02, 0xf0, 0x10); in set_rgb_quantization_range()
1139 if (state->selected_input == ADV7604_PAD_VGA_COMP) { in set_rgb_quantization_range()
1142 io_write_clr_set(sd, 0x02, 0xf0, 0xf0); in set_rgb_quantization_range()
1149 io_write_clr_set(sd, 0x02, 0xf0, 0xf0); in set_rgb_quantization_range()
1153 /* Receiving DVI-D signal in set_rgb_quantization_range()
1156 if (state->timings.bt.flags & V4L2_DV_FL_IS_CE_VIDEO) { in set_rgb_quantization_range()
1157 /* RGB limited range (16-235) */ in set_rgb_quantization_range()
1158 io_write_clr_set(sd, 0x02, 0xf0, 0x00); in set_rgb_quantization_range()
1160 /* RGB full range (0-255) */ in set_rgb_quantization_range()
1161 io_write_clr_set(sd, 0x02, 0xf0, 0x10); in set_rgb_quantization_range()
1163 if (is_digital_input(sd) && rgb_output) { in set_rgb_quantization_range()
1164 adv76xx_set_offset(sd, false, 0x40, 0x40, 0x40); in set_rgb_quantization_range()
1166 adv76xx_set_gain(sd, false, 0xe0, 0xe0, 0xe0); in set_rgb_quantization_range()
1167 adv76xx_set_offset(sd, false, 0x70, 0x70, 0x70); in set_rgb_quantization_range()
1172 if (state->selected_input == ADV7604_PAD_VGA_COMP) { in set_rgb_quantization_range()
1173 /* YCrCb limited range (16-235) */ in set_rgb_quantization_range()
1174 io_write_clr_set(sd, 0x02, 0xf0, 0x20); in set_rgb_quantization_range()
1181 /* RGB limited range (16-235) */ in set_rgb_quantization_range()
1182 io_write_clr_set(sd, 0x02, 0xf0, 0x00); in set_rgb_quantization_range()
1186 if (state->selected_input == ADV7604_PAD_VGA_COMP) { in set_rgb_quantization_range()
1187 /* YCrCb full range (0-255) */ in set_rgb_quantization_range()
1188 io_write_clr_set(sd, 0x02, 0xf0, 0x60); in set_rgb_quantization_range()
1195 /* RGB full range (0-255) */ in set_rgb_quantization_range()
1196 io_write_clr_set(sd, 0x02, 0xf0, 0x10); in set_rgb_quantization_range()
1198 if (is_analog_input(sd) || hdmi_signal) in set_rgb_quantization_range()
1201 /* Adjust gain/offset for DVI-D signals only */ in set_rgb_quantization_range()
1203 adv76xx_set_offset(sd, false, 0x40, 0x40, 0x40); in set_rgb_quantization_range()
1205 adv76xx_set_gain(sd, false, 0xe0, 0xe0, 0xe0); in set_rgb_quantization_range()
1206 adv76xx_set_offset(sd, false, 0x70, 0x70, 0x70); in set_rgb_quantization_range()
1214 struct v4l2_subdev *sd = in adv76xx_s_ctrl() local
1215 &container_of(ctrl->handler, struct adv76xx_state, hdl)->sd; in adv76xx_s_ctrl()
1217 struct adv76xx_state *state = to_state(sd); in adv76xx_s_ctrl()
1219 switch (ctrl->id) { in adv76xx_s_ctrl()
1221 cp_write(sd, 0x3c, ctrl->val); in adv76xx_s_ctrl()
1224 cp_write(sd, 0x3a, ctrl->val); in adv76xx_s_ctrl()
1227 cp_write(sd, 0x3b, ctrl->val); in adv76xx_s_ctrl()
1230 cp_write(sd, 0x3d, ctrl->val); in adv76xx_s_ctrl()
1233 state->rgb_quantization_range = ctrl->val; in adv76xx_s_ctrl()
1234 set_rgb_quantization_range(sd); in adv76xx_s_ctrl()
1238 return -EINVAL; in adv76xx_s_ctrl()
1243 afe_write(sd, 0xc8, ctrl->val); in adv76xx_s_ctrl()
1248 cp_write_clr_set(sd, 0xbf, 0x04, ctrl->val << 2); in adv76xx_s_ctrl()
1251 cp_write(sd, 0xc0, (ctrl->val & 0xff0000) >> 16); in adv76xx_s_ctrl()
1252 cp_write(sd, 0xc1, (ctrl->val & 0x00ff00) >> 8); in adv76xx_s_ctrl()
1253 cp_write(sd, 0xc2, (u8)(ctrl->val & 0x0000ff)); in adv76xx_s_ctrl()
1256 return -EINVAL; in adv76xx_s_ctrl()
1261 struct v4l2_subdev *sd = in adv76xx_g_volatile_ctrl() local
1262 &container_of(ctrl->handler, struct adv76xx_state, hdl)->sd; in adv76xx_g_volatile_ctrl()
1264 if (ctrl->id == V4L2_CID_DV_RX_IT_CONTENT_TYPE) { in adv76xx_g_volatile_ctrl()
1265 ctrl->val = V4L2_DV_IT_CONTENT_TYPE_NO_ITC; in adv76xx_g_volatile_ctrl()
1266 if ((io_read(sd, 0x60) & 1) && (infoframe_read(sd, 0x03) & 0x80)) in adv76xx_g_volatile_ctrl()
1267 ctrl->val = (infoframe_read(sd, 0x05) >> 4) & 3; in adv76xx_g_volatile_ctrl()
1270 return -EINVAL; in adv76xx_g_volatile_ctrl()
1273 /* ----------------------------------------------------------------------- */
1275 static inline bool no_power(struct v4l2_subdev *sd) in no_power() argument
1278 return io_read(sd, 0x0c) & 0x24; in no_power()
1281 static inline bool no_signal_tmds(struct v4l2_subdev *sd) in no_signal_tmds() argument
1283 struct adv76xx_state *state = to_state(sd); in no_signal_tmds()
1285 return !(io_read(sd, 0x6a) & (0x10 >> state->selected_input)); in no_signal_tmds()
1288 static inline bool no_lock_tmds(struct v4l2_subdev *sd) in no_lock_tmds() argument
1290 struct adv76xx_state *state = to_state(sd); in no_lock_tmds()
1291 const struct adv76xx_chip_info *info = state->info; in no_lock_tmds()
1293 return (io_read(sd, 0x6a) & info->tdms_lock_mask) != info->tdms_lock_mask; in no_lock_tmds()
1296 static inline bool is_hdmi(struct v4l2_subdev *sd) in is_hdmi() argument
1298 return hdmi_read(sd, 0x05) & 0x80; in is_hdmi()
1301 static inline bool no_lock_sspd(struct v4l2_subdev *sd) in no_lock_sspd() argument
1303 struct adv76xx_state *state = to_state(sd); in no_lock_sspd()
1313 return ((cp_read(sd, 0xb5) & 0xd0) != 0xd0); in no_lock_sspd()
1316 static inline bool no_lock_stdi(struct v4l2_subdev *sd) in no_lock_stdi() argument
1319 return !(cp_read(sd, 0xb1) & 0x80); in no_lock_stdi()
1322 static inline bool no_signal(struct v4l2_subdev *sd) in no_signal() argument
1326 ret = no_power(sd); in no_signal()
1328 ret |= no_lock_stdi(sd); in no_signal()
1329 ret |= no_lock_sspd(sd); in no_signal()
1331 if (is_digital_input(sd)) { in no_signal()
1332 ret |= no_lock_tmds(sd); in no_signal()
1333 ret |= no_signal_tmds(sd); in no_signal()
1339 static inline bool no_lock_cp(struct v4l2_subdev *sd) in no_lock_cp() argument
1341 struct adv76xx_state *state = to_state(sd); in no_lock_cp()
1348 return io_read(sd, 0x12) & 0x01; in no_lock_cp()
1351 static inline bool in_free_run(struct v4l2_subdev *sd) in in_free_run() argument
1353 return cp_read(sd, 0xff) & 0x10; in in_free_run()
1356 static int adv76xx_g_input_status(struct v4l2_subdev *sd, u32 *status) in adv76xx_g_input_status() argument
1359 *status |= no_power(sd) ? V4L2_IN_ST_NO_POWER : 0; in adv76xx_g_input_status()
1360 *status |= no_signal(sd) ? V4L2_IN_ST_NO_SIGNAL : 0; in adv76xx_g_input_status()
1361 if (!in_free_run(sd) && no_lock_cp(sd)) in adv76xx_g_input_status()
1362 *status |= is_digital_input(sd) ? in adv76xx_g_input_status()
1365 v4l2_dbg(1, debug, sd, "%s: status = 0x%x\n", __func__, *status); in adv76xx_g_input_status()
1370 /* ----------------------------------------------------------------------- */
1378 static int stdi2dv_timings(struct v4l2_subdev *sd, in stdi2dv_timings() argument
1382 struct adv76xx_state *state = to_state(sd); in stdi2dv_timings()
1383 u32 hfreq = (ADV76XX_FSC * 8) / stdi->bl; in stdi2dv_timings()
1391 adv76xx_get_dv_timings_cap(sd, -1), in stdi2dv_timings()
1394 if (vtotal(bt) != stdi->lcf + 1) in stdi2dv_timings()
1396 if (bt->vsync != stdi->lcvs) in stdi2dv_timings()
1401 if ((pix_clk < bt->pixelclock + 1000000) && in stdi2dv_timings()
1402 (pix_clk > bt->pixelclock - 1000000)) { in stdi2dv_timings()
1408 if (v4l2_detect_cvt(stdi->lcf + 1, hfreq, stdi->lcvs, 0, in stdi2dv_timings()
1409 (stdi->hs_pol == '+' ? V4L2_DV_HSYNC_POS_POL : 0) | in stdi2dv_timings()
1410 (stdi->vs_pol == '+' ? V4L2_DV_VSYNC_POS_POL : 0), in stdi2dv_timings()
1411 false, adv76xx_get_dv_timings_cap(sd, -1), timings)) in stdi2dv_timings()
1413 if (v4l2_detect_gtf(stdi->lcf + 1, hfreq, stdi->lcvs, in stdi2dv_timings()
1414 (stdi->hs_pol == '+' ? V4L2_DV_HSYNC_POS_POL : 0) | in stdi2dv_timings()
1415 (stdi->vs_pol == '+' ? V4L2_DV_VSYNC_POS_POL : 0), in stdi2dv_timings()
1416 false, state->aspect_ratio, in stdi2dv_timings()
1417 adv76xx_get_dv_timings_cap(sd, -1), timings)) in stdi2dv_timings()
1420 v4l2_dbg(2, debug, sd, in stdi2dv_timings()
1421 "%s: No format candidate found for lcvs = %d, lcf=%d, bl = %d, %chsync, %cvsync\n", in stdi2dv_timings()
1422 __func__, stdi->lcvs, stdi->lcf, stdi->bl, in stdi2dv_timings()
1423 stdi->hs_pol, stdi->vs_pol); in stdi2dv_timings()
1424 return -1; in stdi2dv_timings()
1428 static int read_stdi(struct v4l2_subdev *sd, struct stdi_readback *stdi) in read_stdi() argument
1430 struct adv76xx_state *state = to_state(sd); in read_stdi()
1431 const struct adv76xx_chip_info *info = state->info; in read_stdi()
1434 if (no_lock_stdi(sd) || no_lock_sspd(sd)) { in read_stdi()
1435 v4l2_dbg(2, debug, sd, "%s: STDI and/or SSPD not locked\n", __func__); in read_stdi()
1436 return -1; in read_stdi()
1440 stdi->bl = cp_read16(sd, 0xb1, 0x3fff); in read_stdi()
1441 stdi->lcf = cp_read16(sd, info->lcf_reg, 0x7ff); in read_stdi()
1442 stdi->lcvs = cp_read(sd, 0xb3) >> 3; in read_stdi()
1443 stdi->interlaced = io_read(sd, 0x12) & 0x10; in read_stdi()
1447 polarity = cp_read(sd, 0xb5); in read_stdi()
1449 stdi->hs_pol = polarity & 0x10 in read_stdi()
1450 ? (polarity & 0x08 ? '+' : '-') : 'x'; in read_stdi()
1451 stdi->vs_pol = polarity & 0x40 in read_stdi()
1452 ? (polarity & 0x20 ? '+' : '-') : 'x'; in read_stdi()
1454 stdi->hs_pol = 'x'; in read_stdi()
1455 stdi->vs_pol = 'x'; in read_stdi()
1458 polarity = hdmi_read(sd, 0x05); in read_stdi()
1459 stdi->hs_pol = polarity & 0x20 ? '+' : '-'; in read_stdi()
1460 stdi->vs_pol = polarity & 0x10 ? '+' : '-'; in read_stdi()
1463 if (no_lock_stdi(sd) || no_lock_sspd(sd)) { in read_stdi()
1464 v4l2_dbg(2, debug, sd, in read_stdi()
1466 return -1; in read_stdi()
1469 if (stdi->lcf < 239 || stdi->bl < 8 || stdi->bl == 0x3fff) { in read_stdi()
1470 v4l2_dbg(2, debug, sd, "%s: invalid signal\n", __func__); in read_stdi()
1472 return -1; in read_stdi()
1475 v4l2_dbg(2, debug, sd, in read_stdi()
1476 "%s: lcf (frame height - 1) = %d, bl = %d, lcvs (vsync) = %d, %chsync, %cvsync, %s\n", in read_stdi()
1477 __func__, stdi->lcf, stdi->bl, stdi->lcvs, in read_stdi()
1478 stdi->hs_pol, stdi->vs_pol, in read_stdi()
1479 stdi->interlaced ? "interlaced" : "progressive"); in read_stdi()
1484 static int adv76xx_enum_dv_timings(struct v4l2_subdev *sd, in adv76xx_enum_dv_timings() argument
1487 struct adv76xx_state *state = to_state(sd); in adv76xx_enum_dv_timings()
1489 if (timings->pad >= state->source_pad) in adv76xx_enum_dv_timings()
1490 return -EINVAL; in adv76xx_enum_dv_timings()
1493 adv76xx_get_dv_timings_cap(sd, timings->pad), in adv76xx_enum_dv_timings()
1497 static int adv76xx_dv_timings_cap(struct v4l2_subdev *sd, in adv76xx_dv_timings_cap() argument
1500 struct adv76xx_state *state = to_state(sd); in adv76xx_dv_timings_cap()
1501 unsigned int pad = cap->pad; in adv76xx_dv_timings_cap()
1503 if (cap->pad >= state->source_pad) in adv76xx_dv_timings_cap()
1504 return -EINVAL; in adv76xx_dv_timings_cap()
1506 *cap = *adv76xx_get_dv_timings_cap(sd, pad); in adv76xx_dv_timings_cap()
1507 cap->pad = pad; in adv76xx_dv_timings_cap()
1514 static void adv76xx_fill_optional_dv_timings_fields(struct v4l2_subdev *sd, in adv76xx_fill_optional_dv_timings_fields() argument
1517 v4l2_find_dv_timings_cap(timings, adv76xx_get_dv_timings_cap(sd, -1), in adv76xx_fill_optional_dv_timings_fields()
1518 is_digital_input(sd) ? 250000 : 1000000, in adv76xx_fill_optional_dv_timings_fields()
1522 static unsigned int adv7604_read_hdmi_pixelclock(struct v4l2_subdev *sd) in adv7604_read_hdmi_pixelclock() argument
1526 a = hdmi_read(sd, 0x06); in adv7604_read_hdmi_pixelclock()
1527 b = hdmi_read(sd, 0x3b); in adv7604_read_hdmi_pixelclock()
1534 static unsigned int adv7611_read_hdmi_pixelclock(struct v4l2_subdev *sd) in adv7611_read_hdmi_pixelclock() argument
1538 a = hdmi_read(sd, 0x51); in adv7611_read_hdmi_pixelclock()
1539 b = hdmi_read(sd, 0x52); in adv7611_read_hdmi_pixelclock()
1546 static unsigned int adv76xx_read_hdmi_pixelclock(struct v4l2_subdev *sd) in adv76xx_read_hdmi_pixelclock() argument
1548 struct adv76xx_state *state = to_state(sd); in adv76xx_read_hdmi_pixelclock()
1549 const struct adv76xx_chip_info *info = state->info; in adv76xx_read_hdmi_pixelclock()
1552 freq = info->read_hdmi_pixelclock(sd); in adv76xx_read_hdmi_pixelclock()
1553 if (is_hdmi(sd)) { in adv76xx_read_hdmi_pixelclock()
1555 bits_per_channel = ((hdmi_read(sd, 0x0b) & 0x60) >> 4) + 8; in adv76xx_read_hdmi_pixelclock()
1556 pixelrepetition = (hdmi_read(sd, 0x05) & 0x0f) + 1; in adv76xx_read_hdmi_pixelclock()
1564 static int adv76xx_query_dv_timings(struct v4l2_subdev *sd, unsigned int pad, in adv76xx_query_dv_timings() argument
1567 struct adv76xx_state *state = to_state(sd); in adv76xx_query_dv_timings()
1568 const struct adv76xx_chip_info *info = state->info; in adv76xx_query_dv_timings()
1569 struct v4l2_bt_timings *bt = &timings->bt; in adv76xx_query_dv_timings()
1573 return -EINVAL; in adv76xx_query_dv_timings()
1577 if (no_signal(sd)) { in adv76xx_query_dv_timings()
1578 state->restart_stdi_once = true; in adv76xx_query_dv_timings()
1579 v4l2_dbg(1, debug, sd, "%s: no valid signal\n", __func__); in adv76xx_query_dv_timings()
1580 return -ENOLINK; in adv76xx_query_dv_timings()
1584 if (read_stdi(sd, &stdi)) { in adv76xx_query_dv_timings()
1585 v4l2_dbg(1, debug, sd, "%s: STDI/SSPD not locked\n", __func__); in adv76xx_query_dv_timings()
1586 return -ENOLINK; in adv76xx_query_dv_timings()
1588 bt->interlaced = stdi.interlaced ? in adv76xx_query_dv_timings()
1591 if (is_digital_input(sd)) { in adv76xx_query_dv_timings()
1592 bool hdmi_signal = hdmi_read(sd, 0x05) & 0x80; in adv76xx_query_dv_timings()
1596 w = hdmi_read16(sd, 0x07, info->linewidth_mask); in adv76xx_query_dv_timings()
1597 h = hdmi_read16(sd, 0x09, info->field0_height_mask); in adv76xx_query_dv_timings()
1599 if (hdmi_signal && (io_read(sd, 0x60) & 1)) in adv76xx_query_dv_timings()
1600 vic = infoframe_read(sd, 0x04); in adv76xx_query_dv_timings()
1603 bt->width == w && bt->height == h) in adv76xx_query_dv_timings()
1606 timings->type = V4L2_DV_BT_656_1120; in adv76xx_query_dv_timings()
1608 bt->width = w; in adv76xx_query_dv_timings()
1609 bt->height = h; in adv76xx_query_dv_timings()
1610 bt->pixelclock = adv76xx_read_hdmi_pixelclock(sd); in adv76xx_query_dv_timings()
1611 bt->hfrontporch = hdmi_read16(sd, 0x20, info->hfrontporch_mask); in adv76xx_query_dv_timings()
1612 bt->hsync = hdmi_read16(sd, 0x22, info->hsync_mask); in adv76xx_query_dv_timings()
1613 bt->hbackporch = hdmi_read16(sd, 0x24, info->hbackporch_mask); in adv76xx_query_dv_timings()
1614 bt->vfrontporch = hdmi_read16(sd, 0x2a, in adv76xx_query_dv_timings()
1615 info->field0_vfrontporch_mask) / 2; in adv76xx_query_dv_timings()
1616 bt->vsync = hdmi_read16(sd, 0x2e, info->field0_vsync_mask) / 2; in adv76xx_query_dv_timings()
1617 bt->vbackporch = hdmi_read16(sd, 0x32, in adv76xx_query_dv_timings()
1618 info->field0_vbackporch_mask) / 2; in adv76xx_query_dv_timings()
1619 bt->polarities = ((hdmi_read(sd, 0x05) & 0x10) ? V4L2_DV_VSYNC_POS_POL : 0) | in adv76xx_query_dv_timings()
1620 ((hdmi_read(sd, 0x05) & 0x20) ? V4L2_DV_HSYNC_POS_POL : 0); in adv76xx_query_dv_timings()
1621 if (bt->interlaced == V4L2_DV_INTERLACED) { in adv76xx_query_dv_timings()
1622 bt->height += hdmi_read16(sd, 0x0b, in adv76xx_query_dv_timings()
1623 info->field1_height_mask); in adv76xx_query_dv_timings()
1624 bt->il_vfrontporch = hdmi_read16(sd, 0x2c, in adv76xx_query_dv_timings()
1625 info->field1_vfrontporch_mask) / 2; in adv76xx_query_dv_timings()
1626 bt->il_vsync = hdmi_read16(sd, 0x30, in adv76xx_query_dv_timings()
1627 info->field1_vsync_mask) / 2; in adv76xx_query_dv_timings()
1628 bt->il_vbackporch = hdmi_read16(sd, 0x34, in adv76xx_query_dv_timings()
1629 info->field1_vbackporch_mask) / 2; in adv76xx_query_dv_timings()
1631 adv76xx_fill_optional_dv_timings_fields(sd, timings); in adv76xx_query_dv_timings()
1634 * Since LCVS values are inaccurate [REF_03, p. 275-276], in adv76xx_query_dv_timings()
1635 * stdi2dv_timings() is called with lcvs +-1 if the first attempt fails. in adv76xx_query_dv_timings()
1637 if (!stdi2dv_timings(sd, &stdi, timings)) in adv76xx_query_dv_timings()
1640 v4l2_dbg(1, debug, sd, "%s: lcvs + 1 = %d\n", __func__, stdi.lcvs); in adv76xx_query_dv_timings()
1641 if (!stdi2dv_timings(sd, &stdi, timings)) in adv76xx_query_dv_timings()
1643 stdi.lcvs -= 2; in adv76xx_query_dv_timings()
1644 v4l2_dbg(1, debug, sd, "%s: lcvs - 1 = %d\n", __func__, stdi.lcvs); in adv76xx_query_dv_timings()
1645 if (stdi2dv_timings(sd, &stdi, timings)) { in adv76xx_query_dv_timings()
1655 if (state->restart_stdi_once) { in adv76xx_query_dv_timings()
1656 v4l2_dbg(1, debug, sd, "%s: restart STDI\n", __func__); in adv76xx_query_dv_timings()
1658 /* enter one-shot mode */ in adv76xx_query_dv_timings()
1659 cp_write_clr_set(sd, 0x86, 0x06, 0x00); in adv76xx_query_dv_timings()
1661 cp_write_clr_set(sd, 0x86, 0x06, 0x04); in adv76xx_query_dv_timings()
1663 cp_write_clr_set(sd, 0x86, 0x06, 0x02); in adv76xx_query_dv_timings()
1664 state->restart_stdi_once = false; in adv76xx_query_dv_timings()
1665 return -ENOLINK; in adv76xx_query_dv_timings()
1667 v4l2_dbg(1, debug, sd, "%s: format not supported\n", __func__); in adv76xx_query_dv_timings()
1668 return -ERANGE; in adv76xx_query_dv_timings()
1670 state->restart_stdi_once = true; in adv76xx_query_dv_timings()
1674 if (no_signal(sd)) { in adv76xx_query_dv_timings()
1675 v4l2_dbg(1, debug, sd, "%s: signal lost during readout\n", __func__); in adv76xx_query_dv_timings()
1677 return -ENOLINK; in adv76xx_query_dv_timings()
1680 if ((is_analog_input(sd) && bt->pixelclock > 170000000) || in adv76xx_query_dv_timings()
1681 (is_digital_input(sd) && bt->pixelclock > 225000000)) { in adv76xx_query_dv_timings()
1682 v4l2_dbg(1, debug, sd, "%s: pixelclock out of range %d\n", in adv76xx_query_dv_timings()
1683 __func__, (u32)bt->pixelclock); in adv76xx_query_dv_timings()
1684 return -ERANGE; in adv76xx_query_dv_timings()
1688 v4l2_print_dv_timings(sd->name, "adv76xx_query_dv_timings: ", in adv76xx_query_dv_timings()
1694 static int adv76xx_s_dv_timings(struct v4l2_subdev *sd, unsigned int pad, in adv76xx_s_dv_timings() argument
1697 struct adv76xx_state *state = to_state(sd); in adv76xx_s_dv_timings()
1702 return -EINVAL; in adv76xx_s_dv_timings()
1704 if (v4l2_match_dv_timings(&state->timings, timings, 0, false)) { in adv76xx_s_dv_timings()
1705 v4l2_dbg(1, debug, sd, "%s: no change\n", __func__); in adv76xx_s_dv_timings()
1709 bt = &timings->bt; in adv76xx_s_dv_timings()
1711 if (!v4l2_valid_dv_timings(timings, adv76xx_get_dv_timings_cap(sd, -1), in adv76xx_s_dv_timings()
1713 return -ERANGE; in adv76xx_s_dv_timings()
1715 adv76xx_fill_optional_dv_timings_fields(sd, timings); in adv76xx_s_dv_timings()
1717 state->timings = *timings; in adv76xx_s_dv_timings()
1719 cp_write_clr_set(sd, 0x91, 0x40, bt->interlaced ? 0x40 : 0x00); in adv76xx_s_dv_timings()
1722 err = configure_predefined_video_timings(sd, timings); in adv76xx_s_dv_timings()
1726 configure_custom_video_timings(sd, bt); in adv76xx_s_dv_timings()
1729 set_rgb_quantization_range(sd); in adv76xx_s_dv_timings()
1732 v4l2_print_dv_timings(sd->name, "adv76xx_s_dv_timings: ", in adv76xx_s_dv_timings()
1737 static int adv76xx_g_dv_timings(struct v4l2_subdev *sd, unsigned int pad, in adv76xx_g_dv_timings() argument
1740 struct adv76xx_state *state = to_state(sd); in adv76xx_g_dv_timings()
1742 *timings = state->timings; in adv76xx_g_dv_timings()
1746 static void adv7604_set_termination(struct v4l2_subdev *sd, bool enable) in adv7604_set_termination() argument
1748 hdmi_write(sd, 0x01, enable ? 0x00 : 0x78); in adv7604_set_termination()
1751 static void adv7611_set_termination(struct v4l2_subdev *sd, bool enable) in adv7611_set_termination() argument
1753 hdmi_write(sd, 0x83, enable ? 0xfe : 0xff); in adv7611_set_termination()
1756 static void enable_input(struct v4l2_subdev *sd) in enable_input() argument
1758 struct adv76xx_state *state = to_state(sd); in enable_input()
1760 if (is_analog_input(sd)) { in enable_input()
1761 io_write(sd, 0x15, 0xb0); /* Disable Tristate of Pins (no audio) */ in enable_input()
1762 } else if (is_digital_input(sd)) { in enable_input()
1763 hdmi_write_clr_set(sd, 0x00, 0x03, state->selected_input); in enable_input()
1764 state->info->set_termination(sd, true); in enable_input()
1765 io_write(sd, 0x15, 0xa0); /* Disable Tristate of Pins */ in enable_input()
1766 hdmi_write_clr_set(sd, 0x1a, 0x10, 0x00); /* Unmute audio */ in enable_input()
1768 v4l2_dbg(2, debug, sd, "%s: Unknown port %d selected\n", in enable_input()
1769 __func__, state->selected_input); in enable_input()
1773 static void disable_input(struct v4l2_subdev *sd) in disable_input() argument
1775 struct adv76xx_state *state = to_state(sd); in disable_input()
1777 hdmi_write_clr_set(sd, 0x1a, 0x10, 0x10); /* Mute audio */ in disable_input()
1779 io_write(sd, 0x15, 0xbe); /* Tristate all outputs from video core */ in disable_input()
1780 state->info->set_termination(sd, false); in disable_input()
1783 static void select_input(struct v4l2_subdev *sd) in select_input() argument
1785 struct adv76xx_state *state = to_state(sd); in select_input()
1786 const struct adv76xx_chip_info *info = state->info; in select_input()
1788 if (is_analog_input(sd)) { in select_input()
1789 adv76xx_write_reg_seq(sd, info->recommended_settings[0]); in select_input()
1791 afe_write(sd, 0x00, 0x08); /* power up ADC */ in select_input()
1792 afe_write(sd, 0x01, 0x06); /* power up Analog Front End */ in select_input()
1793 afe_write(sd, 0xc8, 0x00); /* phase control */ in select_input()
1794 } else if (is_digital_input(sd)) { in select_input()
1795 hdmi_write(sd, 0x00, state->selected_input & 0x03); in select_input()
1797 adv76xx_write_reg_seq(sd, info->recommended_settings[1]); in select_input()
1800 afe_write(sd, 0x00, 0xff); /* power down ADC */ in select_input()
1801 afe_write(sd, 0x01, 0xfe); /* power down Analog Front End */ in select_input()
1802 afe_write(sd, 0xc8, 0x40); /* phase control */ in select_input()
1805 cp_write(sd, 0x3e, 0x00); /* CP core pre-gain control */ in select_input()
1806 cp_write(sd, 0xc3, 0x39); /* CP coast control. Graphics mode */ in select_input()
1807 cp_write(sd, 0x40, 0x80); /* CP core pre-gain control. Graphics mode */ in select_input()
1809 v4l2_dbg(2, debug, sd, "%s: Unknown port %d selected\n", in select_input()
1810 __func__, state->selected_input); in select_input()
1814 cp_write_clr_set(sd, 0x3e, 0x80, 0x80); in select_input()
1817 static int adv76xx_s_routing(struct v4l2_subdev *sd, in adv76xx_s_routing() argument
1820 struct adv76xx_state *state = to_state(sd); in adv76xx_s_routing()
1822 v4l2_dbg(2, debug, sd, "%s: input %d, selected input %d", in adv76xx_s_routing()
1823 __func__, input, state->selected_input); in adv76xx_s_routing()
1825 if (input == state->selected_input) in adv76xx_s_routing()
1828 if (input > state->info->max_port) in adv76xx_s_routing()
1829 return -EINVAL; in adv76xx_s_routing()
1831 state->selected_input = input; in adv76xx_s_routing()
1833 disable_input(sd); in adv76xx_s_routing()
1834 select_input(sd); in adv76xx_s_routing()
1835 enable_input(sd); in adv76xx_s_routing()
1837 v4l2_subdev_notify_event(sd, &adv76xx_ev_fmt); in adv76xx_s_routing()
1842 static int adv76xx_enum_mbus_code(struct v4l2_subdev *sd, in adv76xx_enum_mbus_code() argument
1846 struct adv76xx_state *state = to_state(sd); in adv76xx_enum_mbus_code()
1848 if (code->index >= state->info->nformats) in adv76xx_enum_mbus_code()
1849 return -EINVAL; in adv76xx_enum_mbus_code()
1851 code->code = state->info->formats[code->index].code; in adv76xx_enum_mbus_code()
1861 format->width = state->timings.bt.width; in adv76xx_fill_format()
1862 format->height = state->timings.bt.height; in adv76xx_fill_format()
1863 format->field = V4L2_FIELD_NONE; in adv76xx_fill_format()
1864 format->colorspace = V4L2_COLORSPACE_SRGB; in adv76xx_fill_format()
1866 if (state->timings.bt.flags & V4L2_DV_FL_IS_CE_VIDEO) in adv76xx_fill_format()
1867 format->colorspace = (state->timings.bt.height <= 576) ? in adv76xx_fill_format()
1881 * ----------+-------------------------------------------------
1883 * GRB (1-2) | BGR RGB GBR GRB RBG BRG
1884 * RBG (2-3) | GRB GBR BRG RBG BGR RGB
1885 * BGR (1-3) | RBG BRG RGB BGR GRB GBR
1898 _BUS(GRB) /* 1-2 */ = _SEL(BGR, RGB, GBR, GRB, RBG, BRG), in adv76xx_op_ch_sel()
1899 _BUS(RBG) /* 2-3 */ = _SEL(GRB, GBR, BRG, RBG, BGR, RGB), in adv76xx_op_ch_sel()
1900 _BUS(BGR) /* 1-3 */ = _SEL(RBG, BRG, RGB, BGR, GRB, GBR), in adv76xx_op_ch_sel()
1905 return op_ch_sel[state->pdata.bus_order][state->format->op_ch_sel >> 5]; in adv76xx_op_ch_sel()
1910 struct v4l2_subdev *sd = &state->sd; in adv76xx_setup_format() local
1912 io_write_clr_set(sd, 0x02, 0x02, in adv76xx_setup_format()
1913 state->format->rgb_out ? ADV76XX_RGB_OUT : 0); in adv76xx_setup_format()
1914 io_write(sd, 0x03, state->format->op_format_sel | in adv76xx_setup_format()
1915 state->pdata.op_format_mode_sel); in adv76xx_setup_format()
1916 io_write_clr_set(sd, 0x04, 0xe0, adv76xx_op_ch_sel(state)); in adv76xx_setup_format()
1917 io_write_clr_set(sd, 0x05, 0x01, in adv76xx_setup_format()
1918 state->format->swap_cb_cr ? ADV76XX_OP_SWAP_CB_CR : 0); in adv76xx_setup_format()
1919 set_rgb_quantization_range(sd); in adv76xx_setup_format()
1922 static int adv76xx_get_format(struct v4l2_subdev *sd, in adv76xx_get_format() argument
1926 struct adv76xx_state *state = to_state(sd); in adv76xx_get_format()
1928 if (format->pad != state->source_pad) in adv76xx_get_format()
1929 return -EINVAL; in adv76xx_get_format()
1931 adv76xx_fill_format(state, &format->format); in adv76xx_get_format()
1933 if (format->which == V4L2_SUBDEV_FORMAT_TRY) { in adv76xx_get_format()
1936 fmt = v4l2_subdev_state_get_format(sd_state, format->pad); in adv76xx_get_format()
1937 format->format.code = fmt->code; in adv76xx_get_format()
1939 format->format.code = state->format->code; in adv76xx_get_format()
1945 static int adv76xx_get_selection(struct v4l2_subdev *sd, in adv76xx_get_selection() argument
1949 struct adv76xx_state *state = to_state(sd); in adv76xx_get_selection()
1951 if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE) in adv76xx_get_selection()
1952 return -EINVAL; in adv76xx_get_selection()
1954 if (sel->target > V4L2_SEL_TGT_CROP_BOUNDS) in adv76xx_get_selection()
1955 return -EINVAL; in adv76xx_get_selection()
1957 sel->r.left = 0; in adv76xx_get_selection()
1958 sel->r.top = 0; in adv76xx_get_selection()
1959 sel->r.width = state->timings.bt.width; in adv76xx_get_selection()
1960 sel->r.height = state->timings.bt.height; in adv76xx_get_selection()
1965 static int adv76xx_set_format(struct v4l2_subdev *sd, in adv76xx_set_format() argument
1969 struct adv76xx_state *state = to_state(sd); in adv76xx_set_format()
1972 if (format->pad != state->source_pad) in adv76xx_set_format()
1973 return -EINVAL; in adv76xx_set_format()
1975 info = adv76xx_format_info(state, format->format.code); in adv76xx_set_format()
1979 adv76xx_fill_format(state, &format->format); in adv76xx_set_format()
1980 format->format.code = info->code; in adv76xx_set_format()
1982 if (format->which == V4L2_SUBDEV_FORMAT_TRY) { in adv76xx_set_format()
1985 fmt = v4l2_subdev_state_get_format(sd_state, format->pad); in adv76xx_set_format()
1986 fmt->code = format->format.code; in adv76xx_set_format()
1988 state->format = info; in adv76xx_set_format()
1996 static void adv76xx_cec_tx_raw_status(struct v4l2_subdev *sd, u8 tx_raw_status) in adv76xx_cec_tx_raw_status() argument
1998 struct adv76xx_state *state = to_state(sd); in adv76xx_cec_tx_raw_status()
2000 if ((cec_read(sd, 0x11) & 0x01) == 0) { in adv76xx_cec_tx_raw_status()
2001 v4l2_dbg(1, debug, sd, "%s: tx raw: tx disabled\n", __func__); in adv76xx_cec_tx_raw_status()
2006 v4l2_dbg(1, debug, sd, "%s: tx raw: arbitration lost\n", in adv76xx_cec_tx_raw_status()
2008 cec_transmit_done(state->cec_adap, CEC_TX_STATUS_ARB_LOST, in adv76xx_cec_tx_raw_status()
2017 v4l2_dbg(1, debug, sd, "%s: tx raw: retry failed\n", __func__); in adv76xx_cec_tx_raw_status()
2023 nack_cnt = cec_read(sd, 0x14) & 0xf; in adv76xx_cec_tx_raw_status()
2026 low_drive_cnt = cec_read(sd, 0x14) >> 4; in adv76xx_cec_tx_raw_status()
2029 cec_transmit_done(state->cec_adap, status, in adv76xx_cec_tx_raw_status()
2034 v4l2_dbg(1, debug, sd, "%s: tx raw: ready ok\n", __func__); in adv76xx_cec_tx_raw_status()
2035 cec_transmit_done(state->cec_adap, CEC_TX_STATUS_OK, 0, 0, 0, 0); in adv76xx_cec_tx_raw_status()
2040 static void adv76xx_cec_isr(struct v4l2_subdev *sd, bool *handled) in adv76xx_cec_isr() argument
2042 struct adv76xx_state *state = to_state(sd); in adv76xx_cec_isr()
2043 const struct adv76xx_chip_info *info = state->info; in adv76xx_cec_isr()
2047 cec_irq = io_read(sd, info->cec_irq_status) & 0x0f; in adv76xx_cec_isr()
2051 v4l2_dbg(1, debug, sd, "%s: cec: irq 0x%x\n", __func__, cec_irq); in adv76xx_cec_isr()
2052 adv76xx_cec_tx_raw_status(sd, cec_irq); in adv76xx_cec_isr()
2056 msg.len = cec_read(sd, 0x25) & 0x1f; in adv76xx_cec_isr()
2064 msg.msg[i] = cec_read(sd, i + 0x15); in adv76xx_cec_isr()
2065 cec_write(sd, info->cec_rx_enable, in adv76xx_cec_isr()
2066 info->cec_rx_enable_mask); /* re-enable rx */ in adv76xx_cec_isr()
2067 cec_received_msg(state->cec_adap, &msg); in adv76xx_cec_isr()
2071 if (info->cec_irq_swap) { in adv76xx_cec_isr()
2079 io_write(sd, info->cec_irq_status + 1, cec_irq); in adv76xx_cec_isr()
2088 const struct adv76xx_chip_info *info = state->info; in adv76xx_cec_adap_enable()
2089 struct v4l2_subdev *sd = &state->sd; in adv76xx_cec_adap_enable() local
2091 if (!state->cec_enabled_adap && enable) { in adv76xx_cec_adap_enable()
2092 cec_write_clr_set(sd, 0x2a, 0x01, 0x01); /* power up cec */ in adv76xx_cec_adap_enable()
2093 cec_write(sd, 0x2c, 0x01); /* cec soft reset */ in adv76xx_cec_adap_enable()
2094 cec_write_clr_set(sd, 0x11, 0x01, 0); /* initially disable tx */ in adv76xx_cec_adap_enable()
2100 io_write_clr_set(sd, info->cec_irq_status + 3, 0x0f, 0x0f); in adv76xx_cec_adap_enable()
2101 cec_write(sd, info->cec_rx_enable, info->cec_rx_enable_mask); in adv76xx_cec_adap_enable()
2102 } else if (state->cec_enabled_adap && !enable) { in adv76xx_cec_adap_enable()
2104 io_write_clr_set(sd, info->cec_irq_status + 3, 0x0f, 0x00); in adv76xx_cec_adap_enable()
2105 /* disable address mask 1-3 */ in adv76xx_cec_adap_enable()
2106 cec_write_clr_set(sd, 0x27, 0x70, 0x00); in adv76xx_cec_adap_enable()
2108 cec_write_clr_set(sd, 0x2a, 0x01, 0x00); in adv76xx_cec_adap_enable()
2109 state->cec_valid_addrs = 0; in adv76xx_cec_adap_enable()
2111 state->cec_enabled_adap = enable; in adv76xx_cec_adap_enable()
2112 adv76xx_s_detect_tx_5v_ctrl(sd); in adv76xx_cec_adap_enable()
2119 struct v4l2_subdev *sd = &state->sd; in adv76xx_cec_adap_log_addr() local
2122 if (!state->cec_enabled_adap) in adv76xx_cec_adap_log_addr()
2123 return addr == CEC_LOG_ADDR_INVALID ? 0 : -EIO; in adv76xx_cec_adap_log_addr()
2126 cec_write_clr_set(sd, 0x27, 0x70, 0); in adv76xx_cec_adap_log_addr()
2127 state->cec_valid_addrs = 0; in adv76xx_cec_adap_log_addr()
2132 bool is_valid = state->cec_valid_addrs & (1 << i); in adv76xx_cec_adap_log_addr()
2136 if (is_valid && state->cec_addr[i] == addr) in adv76xx_cec_adap_log_addr()
2142 return -ENXIO; in adv76xx_cec_adap_log_addr()
2144 state->cec_addr[i] = addr; in adv76xx_cec_adap_log_addr()
2145 state->cec_valid_addrs |= 1 << i; in adv76xx_cec_adap_log_addr()
2150 cec_write_clr_set(sd, 0x27, 0x10, 0x10); in adv76xx_cec_adap_log_addr()
2152 cec_write_clr_set(sd, 0x28, 0x0f, addr); in adv76xx_cec_adap_log_addr()
2156 cec_write_clr_set(sd, 0x27, 0x20, 0x20); in adv76xx_cec_adap_log_addr()
2158 cec_write_clr_set(sd, 0x28, 0xf0, addr << 4); in adv76xx_cec_adap_log_addr()
2162 cec_write_clr_set(sd, 0x27, 0x40, 0x40); in adv76xx_cec_adap_log_addr()
2164 cec_write_clr_set(sd, 0x29, 0x0f, addr); in adv76xx_cec_adap_log_addr()
2174 struct v4l2_subdev *sd = &state->sd; in adv76xx_cec_adap_transmit() local
2175 u8 len = msg->len; in adv76xx_cec_adap_transmit()
2179 * The number of retries is the number of attempts - 1, but retry in adv76xx_cec_adap_transmit()
2183 cec_write_clr_set(sd, 0x12, 0x70, max(1, attempts - 1) << 4); in adv76xx_cec_adap_transmit()
2186 v4l2_err(sd, "%s: len exceeded 16 (%d)\n", __func__, len); in adv76xx_cec_adap_transmit()
2187 return -EINVAL; in adv76xx_cec_adap_transmit()
2192 cec_write(sd, i, msg->msg[i]); in adv76xx_cec_adap_transmit()
2195 cec_write(sd, 0x10, len); in adv76xx_cec_adap_transmit()
2197 cec_write(sd, 0x11, 0x01); in adv76xx_cec_adap_transmit()
2208 static int adv76xx_isr(struct v4l2_subdev *sd, u32 status, bool *handled) in adv76xx_isr() argument
2210 struct adv76xx_state *state = to_state(sd); in adv76xx_isr()
2211 const struct adv76xx_chip_info *info = state->info; in adv76xx_isr()
2212 const u8 irq_reg_0x43 = io_read(sd, 0x43); in adv76xx_isr()
2213 const u8 irq_reg_0x6b = io_read(sd, 0x6b); in adv76xx_isr()
2214 const u8 irq_reg_0x70 = io_read(sd, 0x70); in adv76xx_isr()
2220 io_write(sd, 0x44, irq_reg_0x43); in adv76xx_isr()
2222 io_write(sd, 0x71, irq_reg_0x70); in adv76xx_isr()
2224 io_write(sd, 0x6c, irq_reg_0x6b); in adv76xx_isr()
2226 v4l2_dbg(2, debug, sd, "%s: ", __func__); in adv76xx_isr()
2230 fmt_change_digital = is_digital_input(sd) in adv76xx_isr()
2231 ? irq_reg_0x6b & info->fmt_change_digital_mask in adv76xx_isr()
2235 v4l2_dbg(1, debug, sd, in adv76xx_isr()
2239 v4l2_subdev_notify_event(sd, &adv76xx_ev_fmt); in adv76xx_isr()
2246 v4l2_dbg(1, debug, sd, "%s: irq %s mode\n", __func__, in adv76xx_isr()
2247 (io_read(sd, 0x6a) & 0x01) ? "HDMI" : "DVI"); in adv76xx_isr()
2248 set_rgb_quantization_range(sd); in adv76xx_isr()
2255 adv76xx_cec_isr(sd, handled); in adv76xx_isr()
2259 tx_5v = irq_reg_0x70 & info->cable_det_mask; in adv76xx_isr()
2261 v4l2_dbg(1, debug, sd, "%s: tx_5v: 0x%x\n", __func__, tx_5v); in adv76xx_isr()
2262 adv76xx_s_detect_tx_5v_ctrl(sd); in adv76xx_isr()
2274 adv76xx_isr(&state->sd, 0, &handled); in adv76xx_irq_handler()
2279 static int adv76xx_get_edid(struct v4l2_subdev *sd, struct v4l2_edid *edid) in adv76xx_get_edid() argument
2281 struct adv76xx_state *state = to_state(sd); in adv76xx_get_edid()
2284 memset(edid->reserved, 0, sizeof(edid->reserved)); in adv76xx_get_edid()
2286 switch (edid->pad) { in adv76xx_get_edid()
2291 if (state->edid.present & (1 << edid->pad)) in adv76xx_get_edid()
2292 data = state->edid.edid; in adv76xx_get_edid()
2295 return -EINVAL; in adv76xx_get_edid()
2298 if (edid->start_block == 0 && edid->blocks == 0) { in adv76xx_get_edid()
2299 edid->blocks = data ? state->edid.blocks : 0; in adv76xx_get_edid()
2304 return -ENODATA; in adv76xx_get_edid()
2306 if (edid->start_block >= state->edid.blocks) in adv76xx_get_edid()
2307 return -EINVAL; in adv76xx_get_edid()
2309 if (edid->start_block + edid->blocks > state->edid.blocks) in adv76xx_get_edid()
2310 edid->blocks = state->edid.blocks - edid->start_block; in adv76xx_get_edid()
2312 memcpy(edid->edid, data + edid->start_block * 128, edid->blocks * 128); in adv76xx_get_edid()
2317 static int adv76xx_set_edid(struct v4l2_subdev *sd, struct v4l2_edid *edid) in adv76xx_set_edid() argument
2319 struct adv76xx_state *state = to_state(sd); in adv76xx_set_edid()
2320 const struct adv76xx_chip_info *info = state->info; in adv76xx_set_edid()
2326 memset(edid->reserved, 0, sizeof(edid->reserved)); in adv76xx_set_edid()
2328 if (edid->pad > ADV7604_PAD_HDMI_PORT_D) in adv76xx_set_edid()
2329 return -EINVAL; in adv76xx_set_edid()
2330 if (edid->start_block != 0) in adv76xx_set_edid()
2331 return -EINVAL; in adv76xx_set_edid()
2332 if (edid->blocks == 0) { in adv76xx_set_edid()
2334 state->edid.present &= ~(1 << edid->pad); in adv76xx_set_edid()
2335 adv76xx_set_hpd(state, state->edid.present); in adv76xx_set_edid()
2336 rep_write_clr_set(sd, info->edid_enable_reg, 0x0f, state->edid.present); in adv76xx_set_edid()
2339 state->aspect_ratio.numerator = 16; in adv76xx_set_edid()
2340 state->aspect_ratio.denominator = 9; in adv76xx_set_edid()
2342 if (!state->edid.present) { in adv76xx_set_edid()
2343 state->edid.blocks = 0; in adv76xx_set_edid()
2344 cec_phys_addr_invalidate(state->cec_adap); in adv76xx_set_edid()
2347 v4l2_dbg(2, debug, sd, "%s: clear EDID pad %d, edid.present = 0x%x\n", in adv76xx_set_edid()
2348 __func__, edid->pad, state->edid.present); in adv76xx_set_edid()
2351 if (edid->blocks > ADV76XX_MAX_EDID_BLOCKS) { in adv76xx_set_edid()
2352 edid->blocks = ADV76XX_MAX_EDID_BLOCKS; in adv76xx_set_edid()
2353 return -E2BIG; in adv76xx_set_edid()
2356 pa = v4l2_get_edid_phys_addr(edid->edid, edid->blocks * 128, &spa_loc); in adv76xx_set_edid()
2363 * There is no SPA, so just set spa_loc to 128 and pa to whatever in adv76xx_set_edid()
2367 pa = (edid->edid[spa_loc] << 8) | edid->edid[spa_loc + 1]; in adv76xx_set_edid()
2370 v4l2_dbg(2, debug, sd, "%s: write EDID pad %d, edid.present = 0x%x\n", in adv76xx_set_edid()
2371 __func__, edid->pad, state->edid.present); in adv76xx_set_edid()
2374 cancel_delayed_work_sync(&state->delayed_work_enable_hotplug); in adv76xx_set_edid()
2376 rep_write_clr_set(sd, info->edid_enable_reg, 0x0f, 0x00); in adv76xx_set_edid()
2378 switch (edid->pad) { in adv76xx_set_edid()
2380 state->spa_port_a[0] = pa >> 8; in adv76xx_set_edid()
2381 state->spa_port_a[1] = pa & 0xff; in adv76xx_set_edid()
2384 rep_write(sd, info->edid_spa_port_b_reg, pa >> 8); in adv76xx_set_edid()
2385 rep_write(sd, info->edid_spa_port_b_reg + 1, pa & 0xff); in adv76xx_set_edid()
2388 rep_write(sd, info->edid_spa_port_b_reg + 2, pa >> 8); in adv76xx_set_edid()
2389 rep_write(sd, info->edid_spa_port_b_reg + 3, pa & 0xff); in adv76xx_set_edid()
2392 rep_write(sd, info->edid_spa_port_b_reg + 4, pa >> 8); in adv76xx_set_edid()
2393 rep_write(sd, info->edid_spa_port_b_reg + 5, pa & 0xff); in adv76xx_set_edid()
2396 return -EINVAL; in adv76xx_set_edid()
2399 if (info->edid_spa_loc_reg) { in adv76xx_set_edid()
2400 u8 mask = info->edid_spa_loc_msb_mask; in adv76xx_set_edid()
2402 rep_write(sd, info->edid_spa_loc_reg, spa_loc & 0xff); in adv76xx_set_edid()
2403 rep_write_clr_set(sd, info->edid_spa_loc_reg + 1, in adv76xx_set_edid()
2407 edid->edid[spa_loc] = state->spa_port_a[0]; in adv76xx_set_edid()
2408 edid->edid[spa_loc + 1] = state->spa_port_a[1]; in adv76xx_set_edid()
2410 memcpy(state->edid.edid, edid->edid, 128 * edid->blocks); in adv76xx_set_edid()
2411 state->edid.blocks = edid->blocks; in adv76xx_set_edid()
2412 state->aspect_ratio = v4l2_calc_aspect_ratio(edid->edid[0x15], in adv76xx_set_edid()
2413 edid->edid[0x16]); in adv76xx_set_edid()
2414 state->edid.present |= 1 << edid->pad; in adv76xx_set_edid()
2416 rep_write_clr_set(sd, info->edid_segment_reg, in adv76xx_set_edid()
2417 info->edid_segment_mask, 0); in adv76xx_set_edid()
2418 err = edid_write_block(sd, 128 * min(edid->blocks, 2U), state->edid.edid); in adv76xx_set_edid()
2420 v4l2_err(sd, "error %d writing edid pad %d\n", err, edid->pad); in adv76xx_set_edid()
2423 if (edid->blocks > 2) { in adv76xx_set_edid()
2424 rep_write_clr_set(sd, info->edid_segment_reg, in adv76xx_set_edid()
2425 info->edid_segment_mask, in adv76xx_set_edid()
2426 info->edid_segment_mask); in adv76xx_set_edid()
2427 err = edid_write_block(sd, 128 * (edid->blocks - 2), in adv76xx_set_edid()
2428 state->edid.edid + 256); in adv76xx_set_edid()
2430 v4l2_err(sd, "error %d writing edid pad %d\n", in adv76xx_set_edid()
2431 err, edid->pad); in adv76xx_set_edid()
2438 rep_write_clr_set(sd, info->edid_enable_reg, 0x0f, state->edid.present); in adv76xx_set_edid()
2441 if (rep_read(sd, info->edid_status_reg) & state->edid.present) in adv76xx_set_edid()
2446 v4l2_err(sd, "error enabling edid (0x%x)\n", state->edid.present); in adv76xx_set_edid()
2447 return -EIO; in adv76xx_set_edid()
2449 cec_s_phys_addr(state->cec_adap, parent_pa, false); in adv76xx_set_edid()
2452 schedule_delayed_work(&state->delayed_work_enable_hotplug, HZ / 10); in adv76xx_set_edid()
2456 /*********** avi info frame CEA-861-E **************/
2465 static int adv76xx_read_infoframe_buf(struct v4l2_subdev *sd, int index, in adv76xx_read_infoframe_buf() argument
2471 if (!(io_read(sd, 0x60) & adv76xx_cri[index].present_mask)) { in adv76xx_read_infoframe_buf()
2472 v4l2_info(sd, "%s infoframe not received\n", in adv76xx_read_infoframe_buf()
2474 return -ENOENT; in adv76xx_read_infoframe_buf()
2478 buf[i] = infoframe_read(sd, adv76xx_cri[index].head_addr + i); in adv76xx_read_infoframe_buf()
2483 v4l2_err(sd, "%s: invalid %s infoframe length %d\n", __func__, in adv76xx_read_infoframe_buf()
2485 return -ENOENT; in adv76xx_read_infoframe_buf()
2489 buf[i + 3] = infoframe_read(sd, in adv76xx_read_infoframe_buf()
2494 static void adv76xx_log_infoframes(struct v4l2_subdev *sd) in adv76xx_log_infoframes() argument
2498 if (!is_hdmi(sd)) { in adv76xx_log_infoframes()
2499 v4l2_info(sd, "receive DVI-D signal, no infoframes\n"); in adv76xx_log_infoframes()
2504 struct i2c_client *client = v4l2_get_subdevdata(sd); in adv76xx_log_infoframes()
2509 len = adv76xx_read_infoframe_buf(sd, i, buffer); in adv76xx_log_infoframes()
2514 v4l2_err(sd, "%s: unpack of %s infoframe failed\n", in adv76xx_log_infoframes()
2517 hdmi_infoframe_log(KERN_INFO, &client->dev, &frame); in adv76xx_log_infoframes()
2521 static int adv76xx_log_status(struct v4l2_subdev *sd) in adv76xx_log_status() argument
2523 struct adv76xx_state *state = to_state(sd); in adv76xx_log_status()
2524 const struct adv76xx_chip_info *info = state->info; in adv76xx_log_status()
2532 "bypassed", "YPbPr601 -> RGB", "reserved", "YPbPr709 -> RGB", in adv76xx_log_status()
2533 "reserved", "RGB -> YPbPr601", "reserved", "RGB -> YPbPr709", in adv76xx_log_status()
2534 "reserved", "YPbPr709 -> YPbPr601", "YPbPr601 -> YPbPr709", in adv76xx_log_status()
2538 "RGB limited range (16-235)", "RGB full range (0-255)", in adv76xx_log_status()
2539 "YCbCr Bt.601 (16-235)", "YCbCr Bt.709 (16-235)", in adv76xx_log_status()
2541 "YCbCr Bt.601 (0-255)", "YCbCr Bt.709 (0-255)", in adv76xx_log_status()
2546 "RGB limited range (16-235)", "RGB full range (0-255)", in adv76xx_log_status()
2547 "YCbCr Bt.601 (16-235)", "YCbCr Bt.709 (16-235)", in adv76xx_log_status()
2549 "YCbCr Bt.601 (0-255)", "YCbCr Bt.709 (0-255)", in adv76xx_log_status()
2555 "RGB limited range (16-235)", in adv76xx_log_status()
2556 "RGB full range (0-255)", in adv76xx_log_status()
2559 "8-bits per channel", in adv76xx_log_status()
2560 "10-bits per channel", in adv76xx_log_status()
2561 "12-bits per channel", in adv76xx_log_status()
2562 "16-bits per channel (not supported)" in adv76xx_log_status()
2565 v4l2_info(sd, "-----Chip status-----\n"); in adv76xx_log_status()
2566 v4l2_info(sd, "Chip power: %s\n", no_power(sd) ? "off" : "on"); in adv76xx_log_status()
2567 edid_enabled = rep_read(sd, info->edid_status_reg); in adv76xx_log_status()
2568 v4l2_info(sd, "EDID enabled port A: %s, B: %s, C: %s, D: %s\n", in adv76xx_log_status()
2569 ((edid_enabled & 0x01) ? "Yes" : "No"), in adv76xx_log_status()
2570 ((edid_enabled & 0x02) ? "Yes" : "No"), in adv76xx_log_status()
2571 ((edid_enabled & 0x04) ? "Yes" : "No"), in adv76xx_log_status()
2572 ((edid_enabled & 0x08) ? "Yes" : "No")); in adv76xx_log_status()
2573 v4l2_info(sd, "CEC: %s\n", state->cec_enabled_adap ? in adv76xx_log_status()
2575 if (state->cec_enabled_adap) { in adv76xx_log_status()
2579 bool is_valid = state->cec_valid_addrs & (1 << i); in adv76xx_log_status()
2582 v4l2_info(sd, "CEC Logical Address: 0x%x\n", in adv76xx_log_status()
2583 state->cec_addr[i]); in adv76xx_log_status()
2587 v4l2_info(sd, "-----Signal status-----\n"); in adv76xx_log_status()
2588 cable_det = info->read_cable_det(sd); in adv76xx_log_status()
2589 v4l2_info(sd, "Cable detected (+5V power) port A: %s, B: %s, C: %s, D: %s\n", in adv76xx_log_status()
2590 ((cable_det & 0x01) ? "Yes" : "No"), in adv76xx_log_status()
2591 ((cable_det & 0x02) ? "Yes" : "No"), in adv76xx_log_status()
2592 ((cable_det & 0x04) ? "Yes" : "No"), in adv76xx_log_status()
2593 ((cable_det & 0x08) ? "Yes" : "No")); in adv76xx_log_status()
2594 v4l2_info(sd, "TMDS signal detected: %s\n", in adv76xx_log_status()
2595 no_signal_tmds(sd) ? "false" : "true"); in adv76xx_log_status()
2596 v4l2_info(sd, "TMDS signal locked: %s\n", in adv76xx_log_status()
2597 no_lock_tmds(sd) ? "false" : "true"); in adv76xx_log_status()
2598 v4l2_info(sd, "SSPD locked: %s\n", no_lock_sspd(sd) ? "false" : "true"); in adv76xx_log_status()
2599 v4l2_info(sd, "STDI locked: %s\n", no_lock_stdi(sd) ? "false" : "true"); in adv76xx_log_status()
2600 v4l2_info(sd, "CP locked: %s\n", no_lock_cp(sd) ? "false" : "true"); in adv76xx_log_status()
2601 v4l2_info(sd, "CP free run: %s\n", in adv76xx_log_status()
2602 (in_free_run(sd)) ? "on" : "off"); in adv76xx_log_status()
2603 v4l2_info(sd, "Prim-mode = 0x%x, video std = 0x%x, v_freq = 0x%x\n", in adv76xx_log_status()
2604 io_read(sd, 0x01) & 0x0f, io_read(sd, 0x00) & 0x3f, in adv76xx_log_status()
2605 (io_read(sd, 0x01) & 0x70) >> 4); in adv76xx_log_status()
2607 v4l2_info(sd, "-----Video Timings-----\n"); in adv76xx_log_status()
2608 if (read_stdi(sd, &stdi)) in adv76xx_log_status()
2609 v4l2_info(sd, "STDI: not locked\n"); in adv76xx_log_status()
2611 …v4l2_info(sd, "STDI: lcf (frame height - 1) = %d, bl = %d, lcvs (vsync) = %d, %s, %chsync, %cvsync… in adv76xx_log_status()
2615 if (adv76xx_query_dv_timings(sd, 0, &timings)) in adv76xx_log_status()
2616 v4l2_info(sd, "No video detected\n"); in adv76xx_log_status()
2618 v4l2_print_dv_timings(sd->name, "Detected format: ", in adv76xx_log_status()
2620 v4l2_print_dv_timings(sd->name, "Configured format: ", in adv76xx_log_status()
2621 &state->timings, true); in adv76xx_log_status()
2623 if (no_signal(sd)) in adv76xx_log_status()
2626 v4l2_info(sd, "-----Color space-----\n"); in adv76xx_log_status()
2627 v4l2_info(sd, "RGB quantization range ctrl: %s\n", in adv76xx_log_status()
2628 rgb_quantization_range_txt[state->rgb_quantization_range]); in adv76xx_log_status()
2630 ret = io_read(sd, 0x02); in adv76xx_log_status()
2632 v4l2_info(sd, "Can't read Input/Output color space\n"); in adv76xx_log_status()
2636 v4l2_info(sd, "Input color space: %s\n", in adv76xx_log_status()
2638 v4l2_info(sd, "Output color space: %s %s, alt-gamma %s\n", in adv76xx_log_status()
2641 "(16-235)" : "(0-255)", in adv76xx_log_status()
2644 v4l2_info(sd, "Color space conversion: %s\n", in adv76xx_log_status()
2645 csc_coeff_sel_rb[cp_read(sd, info->cp_csc) >> 4]); in adv76xx_log_status()
2647 if (!is_digital_input(sd)) in adv76xx_log_status()
2650 v4l2_info(sd, "-----%s status-----\n", is_hdmi(sd) ? "HDMI" : "DVI-D"); in adv76xx_log_status()
2651 v4l2_info(sd, "Digital video port selected: %c\n", in adv76xx_log_status()
2652 (hdmi_read(sd, 0x00) & 0x03) + 'A'); in adv76xx_log_status()
2653 v4l2_info(sd, "HDCP encrypted content: %s\n", in adv76xx_log_status()
2654 (hdmi_read(sd, 0x05) & 0x40) ? "true" : "false"); in adv76xx_log_status()
2655 v4l2_info(sd, "HDCP keys read: %s%s\n", in adv76xx_log_status()
2656 (hdmi_read(sd, 0x04) & 0x20) ? "yes" : "no", in adv76xx_log_status()
2657 (hdmi_read(sd, 0x04) & 0x10) ? "ERROR" : ""); in adv76xx_log_status()
2658 if (is_hdmi(sd)) { in adv76xx_log_status()
2659 bool audio_pll_locked = hdmi_read(sd, 0x04) & 0x01; in adv76xx_log_status()
2660 bool audio_sample_packet_detect = hdmi_read(sd, 0x18) & 0x01; in adv76xx_log_status()
2661 bool audio_mute = io_read(sd, 0x65) & 0x40; in adv76xx_log_status()
2663 v4l2_info(sd, "Audio: pll %s, samples %s, %s\n", in adv76xx_log_status()
2668 v4l2_info(sd, "Audio format: %s\n", in adv76xx_log_status()
2669 (hdmi_read(sd, 0x07) & 0x20) ? "multi-channel" : "stereo"); in adv76xx_log_status()
2671 v4l2_info(sd, "Audio CTS: %u\n", (hdmi_read(sd, 0x5b) << 12) + in adv76xx_log_status()
2672 (hdmi_read(sd, 0x5c) << 8) + in adv76xx_log_status()
2673 (hdmi_read(sd, 0x5d) & 0xf0)); in adv76xx_log_status()
2674 v4l2_info(sd, "Audio N: %u\n", ((hdmi_read(sd, 0x5d) & 0x0f) << 16) + in adv76xx_log_status()
2675 (hdmi_read(sd, 0x5e) << 8) + in adv76xx_log_status()
2676 hdmi_read(sd, 0x5f)); in adv76xx_log_status()
2677 v4l2_info(sd, "AV Mute: %s\n", (hdmi_read(sd, 0x04) & 0x40) ? "on" : "off"); in adv76xx_log_status()
2679 v4l2_info(sd, "Deep color mode: %s\n", deep_color_mode_txt[(hdmi_read(sd, 0x0b) & 0x60) >> 5]); in adv76xx_log_status()
2680 v4l2_info(sd, "HDMI colorspace: %s\n", hdmi_color_space_txt[hdmi_read(sd, 0x53) & 0xf]); in adv76xx_log_status()
2682 adv76xx_log_infoframes(sd); in adv76xx_log_status()
2688 static int adv76xx_subscribe_event(struct v4l2_subdev *sd, in adv76xx_subscribe_event() argument
2692 switch (sub->type) { in adv76xx_subscribe_event()
2694 return v4l2_src_change_event_subdev_subscribe(sd, fh, sub); in adv76xx_subscribe_event()
2696 return v4l2_ctrl_subdev_subscribe_event(sd, fh, sub); in adv76xx_subscribe_event()
2698 return -EINVAL; in adv76xx_subscribe_event()
2707 struct v4l2_subdev *sd = priv; in adv76xx_debugfs_if_read() local
2711 if (!is_hdmi(sd)) in adv76xx_debugfs_if_read()
2731 len = adv76xx_read_infoframe_buf(sd, index, buf); in adv76xx_debugfs_if_read()
2737 static int adv76xx_registered(struct v4l2_subdev *sd) in adv76xx_registered() argument
2739 struct adv76xx_state *state = to_state(sd); in adv76xx_registered()
2740 struct i2c_client *client = v4l2_get_subdevdata(sd); in adv76xx_registered()
2743 err = cec_register_adapter(state->cec_adap, &client->dev); in adv76xx_registered()
2745 cec_delete_adapter(state->cec_adap); in adv76xx_registered()
2748 state->debugfs_dir = debugfs_create_dir(sd->name, v4l2_debugfs_root()); in adv76xx_registered()
2749 state->infoframes = v4l2_debugfs_if_alloc(state->debugfs_dir, in adv76xx_registered()
2751 V4L2_DEBUGFS_IF_SPD | V4L2_DEBUGFS_IF_HDMI, sd, in adv76xx_registered()
2756 static void adv76xx_unregistered(struct v4l2_subdev *sd) in adv76xx_unregistered() argument
2758 struct adv76xx_state *state = to_state(sd); in adv76xx_unregistered()
2760 cec_unregister_adapter(state->cec_adap); in adv76xx_unregistered()
2761 v4l2_debugfs_if_free(state->infoframes); in adv76xx_unregistered()
2762 state->infoframes = NULL; in adv76xx_unregistered()
2763 debugfs_remove_recursive(state->debugfs_dir); in adv76xx_unregistered()
2764 state->debugfs_dir = NULL; in adv76xx_unregistered()
2767 /* ----------------------------------------------------------------------- */
2815 /* -------------------------- custom ctrls ---------------------------------- */
2850 /* ----------------------------------------------------------------------- */
2873 static int adv76xx_core_init(struct v4l2_subdev *sd) in adv76xx_core_init() argument
2875 struct adv76xx_state *state = to_state(sd); in adv76xx_core_init()
2876 const struct adv76xx_chip_info *info = state->info; in adv76xx_core_init()
2877 struct adv76xx_platform_data *pdata = &state->pdata; in adv76xx_core_init()
2879 hdmi_write(sd, 0x48, in adv76xx_core_init()
2880 (pdata->disable_pwrdnb ? 0x80 : 0) | in adv76xx_core_init()
2881 (pdata->disable_cable_det_rst ? 0x40 : 0)); in adv76xx_core_init()
2883 disable_input(sd); in adv76xx_core_init()
2885 if (pdata->default_input >= 0 && in adv76xx_core_init()
2886 pdata->default_input < state->source_pad) { in adv76xx_core_init()
2887 state->selected_input = pdata->default_input; in adv76xx_core_init()
2888 select_input(sd); in adv76xx_core_init()
2889 enable_input(sd); in adv76xx_core_init()
2893 io_write(sd, 0x0c, 0x42); /* Power up part and power down VDP */ in adv76xx_core_init()
2894 io_write(sd, 0x0b, 0x44); /* Power down ESDP block */ in adv76xx_core_init()
2895 cp_write(sd, 0xcf, 0x01); /* Power down macrovision */ in adv76xx_core_init()
2898 if (info->type != ADV7604) { in adv76xx_core_init()
2900 io_write_clr_set(sd, 0x20, 0xc0, 0); in adv76xx_core_init()
2906 hdmi_write_clr_set(sd, 0x6c, 0xf6, 0x26); in adv76xx_core_init()
2910 io_write_clr_set(sd, 0x02, 0x0f, pdata->alt_gamma << 3); in adv76xx_core_init()
2911 io_write_clr_set(sd, 0x05, 0x0e, pdata->blank_data << 3 | in adv76xx_core_init()
2912 pdata->insert_av_codes << 2 | in adv76xx_core_init()
2913 pdata->replicate_av_codes << 1); in adv76xx_core_init()
2916 cp_write(sd, 0x69, 0x30); /* Enable CP CSC */ in adv76xx_core_init()
2919 io_write(sd, 0x06, 0xa0 | pdata->inv_vs_pol << 2 | in adv76xx_core_init()
2920 pdata->inv_hs_pol << 1 | pdata->inv_llc_pol); in adv76xx_core_init()
2923 io_write(sd, 0x14, 0x40 | pdata->dr_str_data << 4 | in adv76xx_core_init()
2924 pdata->dr_str_clk << 2 | in adv76xx_core_init()
2925 pdata->dr_str_sync); in adv76xx_core_init()
2927 cp_write(sd, 0xba, (pdata->hdmi_free_run_mode << 1) | 0x01); /* HDMI free run */ in adv76xx_core_init()
2928 cp_write(sd, 0xf3, 0xdc); /* Low threshold to enter/exit free run mode */ in adv76xx_core_init()
2929 cp_write(sd, 0xf9, 0x23); /* STDI ch. 1 - LCVS change threshold - in adv76xx_core_init()
2931 cp_write(sd, 0x45, 0x23); /* STDI ch. 2 - LCVS change threshold - in adv76xx_core_init()
2933 cp_write(sd, 0xc9, 0x2d); /* use prim_mode and vid_std as free run resolution in adv76xx_core_init()
2937 hdmi_write_clr_set(sd, 0x15, 0x03, 0x03); /* Mute on FIFO over-/underflow [REF_01, c. 1.2.18] */ in adv76xx_core_init()
2938 hdmi_write_clr_set(sd, 0x1a, 0x0e, 0x08); /* Wait 1 s before unmute */ in adv76xx_core_init()
2939 hdmi_write_clr_set(sd, 0x68, 0x06, 0x06); /* FIFO reset on over-/underflow [REF_01, c. 1.2.19] */ in adv76xx_core_init()
2942 afe_write(sd, 0xb5, 0x01); /* Setting MCLK to 256Fs */ in adv76xx_core_init()
2945 afe_write(sd, 0x02, pdata->ain_sel); /* Select analog input muxing mode */ in adv76xx_core_init()
2946 io_write_clr_set(sd, 0x30, 1 << 4, pdata->output_bus_lsb_to_msb << 4); in adv76xx_core_init()
2950 io_write(sd, 0x40, 0xc0 | pdata->int1_config); /* Configure INT1 */ in adv76xx_core_init()
2951 io_write(sd, 0x46, 0x98); /* Enable SSPD, STDI and CP unlocked interrupts */ in adv76xx_core_init()
2952 …io_write(sd, 0x6e, info->fmt_change_digital_mask); /* Enable V_LOCKED and DE_REGEN_LCK interrupts … in adv76xx_core_init()
2953 io_write(sd, 0x73, info->cable_det_mask); /* Enable cable detection (+5v) interrupts */ in adv76xx_core_init()
2954 info->setup_irqs(sd); in adv76xx_core_init()
2956 return v4l2_ctrl_handler_setup(sd->ctrl_handler); in adv76xx_core_init()
2959 static void adv7604_setup_irqs(struct v4l2_subdev *sd) in adv7604_setup_irqs() argument
2961 io_write(sd, 0x41, 0xd7); /* STDI irq for any change, disable INT2 */ in adv7604_setup_irqs()
2964 static void adv7611_setup_irqs(struct v4l2_subdev *sd) in adv7611_setup_irqs() argument
2966 io_write(sd, 0x41, 0xd0); /* STDI irq for any change, disable INT2 */ in adv7611_setup_irqs()
2969 static void adv7612_setup_irqs(struct v4l2_subdev *sd) in adv7612_setup_irqs() argument
2971 io_write(sd, 0x41, 0xd0); /* disable INT2 */ in adv7612_setup_irqs()
2978 for (i = 1; i < ARRAY_SIZE(state->i2c_clients); ++i) in adv76xx_unregister_clients()
2979 i2c_unregister_device(state->i2c_clients[i]); in adv76xx_unregister_clients()
2982 static struct i2c_client *adv76xx_dummy_client(struct v4l2_subdev *sd, in adv76xx_dummy_client() argument
2985 struct i2c_client *client = v4l2_get_subdevdata(sd); in adv76xx_dummy_client()
2986 struct adv76xx_state *state = to_state(sd); in adv76xx_dummy_client()
2987 struct adv76xx_platform_data *pdata = &state->pdata; in adv76xx_dummy_client()
2991 if (pdata && pdata->i2c_addresses[page]) in adv76xx_dummy_client()
2992 new_client = i2c_new_dummy_device(client->adapter, in adv76xx_dummy_client()
2993 pdata->i2c_addresses[page]); in adv76xx_dummy_client()
3000 io_write(sd, io_reg, new_client->addr << 1); in adv76xx_dummy_client()
3010 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x3d), 0x00 }, /* DDC bus active pull-up control */
3025 { ADV76XX_REG(ADV76XX_PAGE_CP, 0x3e), 0x04 }, /* CP core pre-gain control */
3027 { ADV76XX_REG(ADV76XX_PAGE_CP, 0x40), 0x5c }, /* CP core pre-gain control. Graphics mode */
3036 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x3d), 0x10 }, /* DDC bus active pull-up control */
3264 np = state->i2c_clients[ADV76XX_PAGE_IO]->dev.of_node; in adv76xx_parse_dt()
3267 endpoint = of_graph_get_endpoint_by_regs(np, -1, -1); in adv76xx_parse_dt()
3269 return -EINVAL; in adv76xx_parse_dt()
3276 if (!of_property_read_u32(np, "default-input", &v)) in adv76xx_parse_dt()
3277 state->pdata.default_input = v; in adv76xx_parse_dt()
3279 state->pdata.default_input = -1; in adv76xx_parse_dt()
3284 state->pdata.inv_hs_pol = 1; in adv76xx_parse_dt()
3287 state->pdata.inv_vs_pol = 1; in adv76xx_parse_dt()
3290 state->pdata.inv_llc_pol = 1; in adv76xx_parse_dt()
3293 state->pdata.insert_av_codes = 1; in adv76xx_parse_dt()
3295 /* Disable the interrupt for now as no DT-based board uses it. */ in adv76xx_parse_dt()
3296 state->pdata.int1_config = ADV76XX_INT1_CONFIG_ACTIVE_HIGH; in adv76xx_parse_dt()
3299 state->pdata.disable_pwrdnb = 0; in adv76xx_parse_dt()
3300 state->pdata.disable_cable_det_rst = 0; in adv76xx_parse_dt()
3301 state->pdata.blank_data = 1; in adv76xx_parse_dt()
3302 state->pdata.op_format_mode_sel = ADV7604_OP_FORMAT_MODE0; in adv76xx_parse_dt()
3303 state->pdata.bus_order = ADV7604_BUS_ORDER_RGB; in adv76xx_parse_dt()
3304 state->pdata.dr_str_data = ADV76XX_DR_STR_MEDIUM_HIGH; in adv76xx_parse_dt()
3305 state->pdata.dr_str_clk = ADV76XX_DR_STR_MEDIUM_HIGH; in adv76xx_parse_dt()
3306 state->pdata.dr_str_sync = ADV76XX_DR_STR_MEDIUM_HIGH; in adv76xx_parse_dt()
3423 if (!state->i2c_clients[region]) in configure_regmap()
3424 return -ENODEV; in configure_regmap()
3426 state->regmap[region] = in configure_regmap()
3427 devm_regmap_init_i2c(state->i2c_clients[region], in configure_regmap()
3430 if (IS_ERR(state->regmap[region])) { in configure_regmap()
3431 err = PTR_ERR(state->regmap[region]); in configure_regmap()
3432 v4l_err(state->i2c_clients[region], in configure_regmap()
3435 return -EINVAL; in configure_regmap()
3447 if (err && (err != -ENODEV)) in configure_regmaps()
3455 if (state->reset_gpio) { in adv76xx_reset()
3457 gpiod_set_value_cansleep(state->reset_gpio, 0); in adv76xx_reset()
3459 gpiod_set_value_cansleep(state->reset_gpio, 1); in adv76xx_reset()
3474 struct v4l2_subdev *sd; in adv76xx_probe() local
3480 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) in adv76xx_probe()
3481 return -EIO; in adv76xx_probe()
3483 client->addr << 1); in adv76xx_probe()
3485 state = devm_kzalloc(&client->dev, sizeof(*state), GFP_KERNEL); in adv76xx_probe()
3487 return -ENOMEM; in adv76xx_probe()
3489 state->i2c_clients[ADV76XX_PAGE_IO] = client; in adv76xx_probe()
3492 state->restart_stdi_once = true; in adv76xx_probe()
3493 state->selected_input = ~0; in adv76xx_probe()
3495 if (IS_ENABLED(CONFIG_OF) && client->dev.of_node) { in adv76xx_probe()
3498 oid = of_match_node(adv76xx_of_id, client->dev.of_node); in adv76xx_probe()
3499 state->info = oid->data; in adv76xx_probe()
3506 } else if (client->dev.platform_data) { in adv76xx_probe()
3507 struct adv76xx_platform_data *pdata = client->dev.platform_data; in adv76xx_probe()
3509 state->info = (const struct adv76xx_chip_info *)id->driver_data; in adv76xx_probe()
3510 state->pdata = *pdata; in adv76xx_probe()
3512 v4l_err(client, "No platform data!\n"); in adv76xx_probe()
3513 return -ENODEV; in adv76xx_probe()
3517 for (i = 0; i < state->info->num_dv_ports; ++i) { in adv76xx_probe()
3518 state->hpd_gpio[i] = in adv76xx_probe()
3519 devm_gpiod_get_index_optional(&client->dev, "hpd", i, in adv76xx_probe()
3521 if (IS_ERR(state->hpd_gpio[i])) in adv76xx_probe()
3522 return PTR_ERR(state->hpd_gpio[i]); in adv76xx_probe()
3524 if (state->hpd_gpio[i]) in adv76xx_probe()
3527 state->reset_gpio = devm_gpiod_get_optional(&client->dev, "reset", in adv76xx_probe()
3529 if (IS_ERR(state->reset_gpio)) in adv76xx_probe()
3530 return PTR_ERR(state->reset_gpio); in adv76xx_probe()
3534 state->timings = cea640x480; in adv76xx_probe()
3535 state->format = adv76xx_format_info(state, MEDIA_BUS_FMT_YUYV8_2X8); in adv76xx_probe()
3537 sd = &state->sd; in adv76xx_probe()
3538 v4l2_i2c_subdev_init(sd, client, &adv76xx_ops); in adv76xx_probe()
3539 snprintf(sd->name, sizeof(sd->name), "%s %d-%04x", in adv76xx_probe()
3540 id->name, i2c_adapter_id(client->adapter), in adv76xx_probe()
3541 client->addr); in adv76xx_probe()
3542 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_HAS_EVENTS; in adv76xx_probe()
3543 sd->internal_ops = &adv76xx_int_ops; in adv76xx_probe()
3549 v4l2_err(sd, "Error configuring IO regmap region\n"); in adv76xx_probe()
3550 return -ENODEV; in adv76xx_probe()
3558 switch (state->info->type) { in adv76xx_probe()
3560 err = regmap_read(state->regmap[ADV76XX_PAGE_IO], 0xfb, &val); in adv76xx_probe()
3562 v4l2_err(sd, "Error %d reading IO Regmap\n", err); in adv76xx_probe()
3563 return -ENODEV; in adv76xx_probe()
3566 v4l2_err(sd, "not an ADV7604 on address 0x%x\n", in adv76xx_probe()
3567 client->addr << 1); in adv76xx_probe()
3568 return -ENODEV; in adv76xx_probe()
3573 err = regmap_read(state->regmap[ADV76XX_PAGE_IO], in adv76xx_probe()
3577 v4l2_err(sd, "Error %d reading IO Regmap\n", err); in adv76xx_probe()
3578 return -ENODEV; in adv76xx_probe()
3581 err = regmap_read(state->regmap[ADV76XX_PAGE_IO], in adv76xx_probe()
3585 v4l2_err(sd, "Error %d reading IO Regmap\n", err); in adv76xx_probe()
3586 return -ENODEV; in adv76xx_probe()
3589 if ((state->info->type == ADV7611 && val != 0x2051) || in adv76xx_probe()
3590 (state->info->type == ADV7612 && val != 0x2041)) { in adv76xx_probe()
3591 v4l2_err(sd, "not an %s on address 0x%x\n", in adv76xx_probe()
3592 state->info->type == ADV7611 ? "ADV7610/11" : "ADV7612", in adv76xx_probe()
3593 client->addr << 1); in adv76xx_probe()
3594 return -ENODEV; in adv76xx_probe()
3600 hdl = &state->hdl; in adv76xx_probe()
3604 V4L2_CID_BRIGHTNESS, -128, 127, 1, 0); in adv76xx_probe()
3615 ctrl->flags |= V4L2_CTRL_FLAG_VOLATILE; in adv76xx_probe()
3617 state->detect_tx_5v_ctrl = v4l2_ctrl_new_std(hdl, NULL, in adv76xx_probe()
3619 (1 << state->info->num_dv_ports) - 1, 0, 0); in adv76xx_probe()
3620 state->rgb_quantization_range_ctrl = in adv76xx_probe()
3627 state->analog_sampling_phase_ctrl = in adv76xx_probe()
3629 state->free_run_color_manual_ctrl = in adv76xx_probe()
3631 state->free_run_color_ctrl = in adv76xx_probe()
3634 sd->ctrl_handler = hdl; in adv76xx_probe()
3635 if (hdl->error) { in adv76xx_probe()
3636 err = hdl->error; in adv76xx_probe()
3639 if (adv76xx_s_detect_tx_5v_ctrl(sd)) { in adv76xx_probe()
3640 err = -ENODEV; in adv76xx_probe()
3647 if (!(BIT(i) & state->info->page_mask)) in adv76xx_probe()
3650 dummy_client = adv76xx_dummy_client(sd, i); in adv76xx_probe()
3653 v4l2_err(sd, "failed to create i2c client %u\n", i); in adv76xx_probe()
3657 state->i2c_clients[i] = dummy_client; in adv76xx_probe()
3660 INIT_DELAYED_WORK(&state->delayed_work_enable_hotplug, in adv76xx_probe()
3663 state->source_pad = state->info->num_dv_ports in adv76xx_probe()
3664 + (state->info->has_afe ? 2 : 0); in adv76xx_probe()
3665 for (i = 0; i < state->source_pad; ++i) in adv76xx_probe()
3666 state->pads[i].flags = MEDIA_PAD_FL_SINK; in adv76xx_probe()
3667 state->pads[state->source_pad].flags = MEDIA_PAD_FL_SOURCE; in adv76xx_probe()
3668 sd->entity.function = MEDIA_ENT_F_DV_DECODER; in adv76xx_probe()
3670 err = media_entity_pads_init(&sd->entity, state->source_pad + 1, in adv76xx_probe()
3671 state->pads); in adv76xx_probe()
3680 err = adv76xx_core_init(sd); in adv76xx_probe()
3684 if (client->irq) { in adv76xx_probe()
3685 err = devm_request_threaded_irq(&client->dev, in adv76xx_probe()
3686 client->irq, in adv76xx_probe()
3689 client->name, state); in adv76xx_probe()
3695 state->cec_adap = cec_allocate_adapter(&adv76xx_cec_adap_ops, in adv76xx_probe()
3696 state, dev_name(&client->dev), in adv76xx_probe()
3698 err = PTR_ERR_OR_ZERO(state->cec_adap); in adv76xx_probe()
3703 v4l2_info(sd, "%s found @ 0x%x (%s)\n", client->name, in adv76xx_probe()
3704 client->addr << 1, client->adapter->name); in adv76xx_probe()
3706 err = v4l2_async_register_subdev(sd); in adv76xx_probe()
3713 media_entity_cleanup(&sd->entity); in adv76xx_probe()
3715 cancel_delayed_work(&state->delayed_work_enable_hotplug); in adv76xx_probe()
3723 /* ----------------------------------------------------------------------- */
3727 struct v4l2_subdev *sd = i2c_get_clientdata(client); in adv76xx_remove() local
3728 struct adv76xx_state *state = to_state(sd); in adv76xx_remove()
3731 io_write(sd, 0x40, 0); in adv76xx_remove()
3732 io_write(sd, 0x41, 0); in adv76xx_remove()
3733 io_write(sd, 0x46, 0); in adv76xx_remove()
3734 io_write(sd, 0x6e, 0); in adv76xx_remove()
3735 io_write(sd, 0x73, 0); in adv76xx_remove()
3737 cancel_delayed_work_sync(&state->delayed_work_enable_hotplug); in adv76xx_remove()
3738 v4l2_async_unregister_subdev(sd); in adv76xx_remove()
3739 media_entity_cleanup(&sd->entity); in adv76xx_remove()
3740 adv76xx_unregister_clients(to_state(sd)); in adv76xx_remove()
3741 v4l2_ctrl_handler_free(sd->ctrl_handler); in adv76xx_remove()
3744 /* ----------------------------------------------------------------------- */