Lines Matching full:sd
133 void (*set_termination)(struct v4l2_subdev *sd, bool enable);
134 void (*setup_irqs)(struct v4l2_subdev *sd);
135 unsigned int (*read_hdmi_pixelclock)(struct v4l2_subdev *sd);
136 unsigned int (*read_cable_det)(struct v4l2_subdev *sd);
174 struct v4l2_subdev sd; member
330 static inline struct adv76xx_state *to_state(struct v4l2_subdev *sd) in to_state() argument
332 return container_of(sd, struct adv76xx_state, sd); in to_state()
384 static inline int io_read(struct v4l2_subdev *sd, u8 reg) in io_read() argument
386 struct adv76xx_state *state = to_state(sd); in io_read()
391 static inline int io_write(struct v4l2_subdev *sd, u8 reg, u8 val) in io_write() argument
393 struct adv76xx_state *state = to_state(sd); in io_write()
398 static inline int io_write_clr_set(struct v4l2_subdev *sd, u8 reg, u8 mask, in io_write_clr_set() argument
401 return io_write(sd, reg, (io_read(sd, reg) & ~mask) | val); in io_write_clr_set()
404 static inline int __always_unused avlink_read(struct v4l2_subdev *sd, u8 reg) in avlink_read() argument
406 struct adv76xx_state *state = to_state(sd); in avlink_read()
411 static inline int __always_unused avlink_write(struct v4l2_subdev *sd, u8 reg, u8 val) in avlink_write() argument
413 struct adv76xx_state *state = to_state(sd); in avlink_write()
418 static inline int cec_read(struct v4l2_subdev *sd, u8 reg) in cec_read() argument
420 struct adv76xx_state *state = to_state(sd); in cec_read()
425 static inline int cec_write(struct v4l2_subdev *sd, u8 reg, u8 val) in cec_write() argument
427 struct adv76xx_state *state = to_state(sd); in cec_write()
432 static inline int cec_write_clr_set(struct v4l2_subdev *sd, u8 reg, u8 mask, in cec_write_clr_set() argument
435 return cec_write(sd, reg, (cec_read(sd, reg) & ~mask) | val); in cec_write_clr_set()
438 static inline int infoframe_read(struct v4l2_subdev *sd, u8 reg) in infoframe_read() argument
440 struct adv76xx_state *state = to_state(sd); in infoframe_read()
445 static inline int __always_unused infoframe_write(struct v4l2_subdev *sd, u8 reg, u8 val) in infoframe_write() argument
447 struct adv76xx_state *state = to_state(sd); in infoframe_write()
452 static inline int __always_unused afe_read(struct v4l2_subdev *sd, u8 reg) in afe_read() argument
454 struct adv76xx_state *state = to_state(sd); in afe_read()
459 static inline int afe_write(struct v4l2_subdev *sd, u8 reg, u8 val) in afe_write() argument
461 struct adv76xx_state *state = to_state(sd); in afe_write()
466 static inline int rep_read(struct v4l2_subdev *sd, u8 reg) in rep_read() argument
468 struct adv76xx_state *state = to_state(sd); in rep_read()
473 static inline int rep_write(struct v4l2_subdev *sd, u8 reg, u8 val) in rep_write() argument
475 struct adv76xx_state *state = to_state(sd); in rep_write()
480 static inline int rep_write_clr_set(struct v4l2_subdev *sd, u8 reg, u8 mask, u8 val) in rep_write_clr_set() argument
482 return rep_write(sd, reg, (rep_read(sd, reg) & ~mask) | val); in rep_write_clr_set()
485 static inline int __always_unused edid_read(struct v4l2_subdev *sd, u8 reg) in edid_read() argument
487 struct adv76xx_state *state = to_state(sd); in edid_read()
492 static inline int __always_unused edid_write(struct v4l2_subdev *sd, u8 reg, u8 val) in edid_write() argument
494 struct adv76xx_state *state = to_state(sd); in edid_write()
499 static inline int edid_write_block(struct v4l2_subdev *sd, in edid_write_block() argument
502 struct adv76xx_state *state = to_state(sd); in edid_write_block()
507 v4l2_dbg(2, debug, sd, "%s: write EDID block (%d byte)\n", in edid_write_block()
533 io_write_clr_set(&state->sd, 0x20, 0x80 >> i, in adv76xx_set_hpd()
537 v4l2_subdev_notify(&state->sd, ADV76XX_HOTPLUG, &hpd); in adv76xx_set_hpd()
545 struct v4l2_subdev *sd = &state->sd; in adv76xx_delayed_work_enable_hotplug() local
547 v4l2_dbg(2, debug, sd, "%s: enable hotplug\n", __func__); in adv76xx_delayed_work_enable_hotplug()
552 static inline int hdmi_read(struct v4l2_subdev *sd, u8 reg) in hdmi_read() argument
554 struct adv76xx_state *state = to_state(sd); in hdmi_read()
559 static u16 hdmi_read16(struct v4l2_subdev *sd, u8 reg, u16 mask) in hdmi_read16() argument
561 return ((hdmi_read(sd, reg) << 8) | hdmi_read(sd, reg + 1)) & mask; in hdmi_read16()
564 static inline int hdmi_write(struct v4l2_subdev *sd, u8 reg, u8 val) in hdmi_write() argument
566 struct adv76xx_state *state = to_state(sd); in hdmi_write()
571 static inline int hdmi_write_clr_set(struct v4l2_subdev *sd, u8 reg, u8 mask, u8 val) in hdmi_write_clr_set() argument
573 return hdmi_write(sd, reg, (hdmi_read(sd, reg) & ~mask) | val); in hdmi_write_clr_set()
576 static inline int __always_unused test_write(struct v4l2_subdev *sd, u8 reg, u8 val) in test_write() argument
578 struct adv76xx_state *state = to_state(sd); in test_write()
583 static inline int cp_read(struct v4l2_subdev *sd, u8 reg) in cp_read() argument
585 struct adv76xx_state *state = to_state(sd); in cp_read()
590 static u16 cp_read16(struct v4l2_subdev *sd, u8 reg, u16 mask) in cp_read16() argument
592 return ((cp_read(sd, reg) << 8) | cp_read(sd, reg + 1)) & mask; in cp_read16()
595 static inline int cp_write(struct v4l2_subdev *sd, u8 reg, u8 val) in cp_write() argument
597 struct adv76xx_state *state = to_state(sd); in cp_write()
602 static inline int cp_write_clr_set(struct v4l2_subdev *sd, u8 reg, u8 mask, u8 val) in cp_write_clr_set() argument
604 return cp_write(sd, reg, (cp_read(sd, reg) & ~mask) | val); in cp_write_clr_set()
607 static inline int __always_unused vdp_read(struct v4l2_subdev *sd, u8 reg) in vdp_read() argument
609 struct adv76xx_state *state = to_state(sd); in vdp_read()
614 static inline int __always_unused vdp_write(struct v4l2_subdev *sd, u8 reg, u8 val) in vdp_write() argument
616 struct adv76xx_state *state = to_state(sd); in vdp_write()
625 static int adv76xx_read_reg(struct v4l2_subdev *sd, unsigned int reg) in adv76xx_read_reg() argument
627 struct adv76xx_state *state = to_state(sd); in adv76xx_read_reg()
642 static int adv76xx_write_reg(struct v4l2_subdev *sd, unsigned int reg, u8 val) in adv76xx_write_reg() argument
644 struct adv76xx_state *state = to_state(sd); in adv76xx_write_reg()
655 static void adv76xx_write_reg_seq(struct v4l2_subdev *sd, in adv76xx_write_reg_seq() argument
661 adv76xx_write_reg(sd, reg_seq[i].reg, reg_seq[i].val); in adv76xx_write_reg_seq()
770 static inline bool is_analog_input(struct v4l2_subdev *sd) in is_analog_input() argument
772 struct adv76xx_state *state = to_state(sd); in is_analog_input()
778 static inline bool is_digital_input(struct v4l2_subdev *sd) in is_digital_input() argument
780 struct adv76xx_state *state = to_state(sd); in is_digital_input()
815 adv76xx_get_dv_timings_cap(struct v4l2_subdev *sd, int pad) in adv76xx_get_dv_timings_cap() argument
818 struct adv76xx_state *state = to_state(sd); in adv76xx_get_dv_timings_cap()
841 static void adv76xx_inv_register(struct v4l2_subdev *sd) in adv76xx_inv_register() argument
843 v4l2_info(sd, "0x000-0x0ff: IO Map\n"); in adv76xx_inv_register()
844 v4l2_info(sd, "0x100-0x1ff: AVLink Map\n"); in adv76xx_inv_register()
845 v4l2_info(sd, "0x200-0x2ff: CEC Map\n"); in adv76xx_inv_register()
846 v4l2_info(sd, "0x300-0x3ff: InfoFrame Map\n"); in adv76xx_inv_register()
847 v4l2_info(sd, "0x400-0x4ff: ESDP Map\n"); in adv76xx_inv_register()
848 v4l2_info(sd, "0x500-0x5ff: DPP Map\n"); in adv76xx_inv_register()
849 v4l2_info(sd, "0x600-0x6ff: AFE Map\n"); in adv76xx_inv_register()
850 v4l2_info(sd, "0x700-0x7ff: Repeater Map\n"); in adv76xx_inv_register()
851 v4l2_info(sd, "0x800-0x8ff: EDID Map\n"); in adv76xx_inv_register()
852 v4l2_info(sd, "0x900-0x9ff: HDMI Map\n"); in adv76xx_inv_register()
853 v4l2_info(sd, "0xa00-0xaff: Test Map\n"); in adv76xx_inv_register()
854 v4l2_info(sd, "0xb00-0xbff: CP Map\n"); in adv76xx_inv_register()
855 v4l2_info(sd, "0xc00-0xcff: VDP Map\n"); in adv76xx_inv_register()
858 static int adv76xx_g_register(struct v4l2_subdev *sd, in adv76xx_g_register() argument
863 ret = adv76xx_read_reg(sd, reg->reg); in adv76xx_g_register()
865 v4l2_info(sd, "Register %03llx not supported\n", reg->reg); in adv76xx_g_register()
866 adv76xx_inv_register(sd); in adv76xx_g_register()
876 static int adv76xx_s_register(struct v4l2_subdev *sd, in adv76xx_s_register() argument
881 ret = adv76xx_write_reg(sd, reg->reg, reg->val); in adv76xx_s_register()
883 v4l2_info(sd, "Register %03llx not supported\n", reg->reg); in adv76xx_s_register()
884 adv76xx_inv_register(sd); in adv76xx_s_register()
892 static unsigned int adv7604_read_cable_det(struct v4l2_subdev *sd) in adv7604_read_cable_det() argument
894 u8 value = io_read(sd, 0x6f); in adv7604_read_cable_det()
902 static unsigned int adv7611_read_cable_det(struct v4l2_subdev *sd) in adv7611_read_cable_det() argument
904 u8 value = io_read(sd, 0x6f); in adv7611_read_cable_det()
909 static unsigned int adv7612_read_cable_det(struct v4l2_subdev *sd) in adv7612_read_cable_det() argument
914 u8 value = io_read(sd, 0x6f); in adv7612_read_cable_det()
919 static int adv76xx_s_detect_tx_5v_ctrl(struct v4l2_subdev *sd) in adv76xx_s_detect_tx_5v_ctrl() argument
921 struct adv76xx_state *state = to_state(sd); in adv76xx_s_detect_tx_5v_ctrl()
923 u16 cable_det = info->read_cable_det(sd); in adv76xx_s_detect_tx_5v_ctrl()
928 static int find_and_set_predefined_video_timings(struct v4l2_subdev *sd, in find_and_set_predefined_video_timings() argument
937 is_digital_input(sd) ? 250000 : 1000000, false)) in find_and_set_predefined_video_timings()
939 io_write(sd, 0x00, predef_vid_timings[i].vid_std); /* video std */ in find_and_set_predefined_video_timings()
940 io_write(sd, 0x01, (predef_vid_timings[i].v_freq << 4) + in find_and_set_predefined_video_timings()
948 static int configure_predefined_video_timings(struct v4l2_subdev *sd, in configure_predefined_video_timings() argument
951 struct adv76xx_state *state = to_state(sd); in configure_predefined_video_timings()
954 v4l2_dbg(1, debug, sd, "%s", __func__); in configure_predefined_video_timings()
958 io_write(sd, 0x16, 0x43); in configure_predefined_video_timings()
959 io_write(sd, 0x17, 0x5a); in configure_predefined_video_timings()
962 cp_write_clr_set(sd, 0x81, 0x10, 0x00); in configure_predefined_video_timings()
963 cp_write(sd, 0x8f, 0x00); in configure_predefined_video_timings()
964 cp_write(sd, 0x90, 0x00); in configure_predefined_video_timings()
965 cp_write(sd, 0xa2, 0x00); in configure_predefined_video_timings()
966 cp_write(sd, 0xa3, 0x00); in configure_predefined_video_timings()
967 cp_write(sd, 0xa4, 0x00); in configure_predefined_video_timings()
968 cp_write(sd, 0xa5, 0x00); in configure_predefined_video_timings()
969 cp_write(sd, 0xa6, 0x00); in configure_predefined_video_timings()
970 cp_write(sd, 0xa7, 0x00); in configure_predefined_video_timings()
971 cp_write(sd, 0xab, 0x00); in configure_predefined_video_timings()
972 cp_write(sd, 0xac, 0x00); in configure_predefined_video_timings()
974 if (is_analog_input(sd)) { in configure_predefined_video_timings()
975 err = find_and_set_predefined_video_timings(sd, in configure_predefined_video_timings()
978 err = find_and_set_predefined_video_timings(sd, in configure_predefined_video_timings()
980 } else if (is_digital_input(sd)) { in configure_predefined_video_timings()
981 err = find_and_set_predefined_video_timings(sd, in configure_predefined_video_timings()
984 err = find_and_set_predefined_video_timings(sd, in configure_predefined_video_timings()
987 v4l2_dbg(2, debug, sd, "%s: Unknown port %d selected\n", in configure_predefined_video_timings()
996 static void configure_custom_video_timings(struct v4l2_subdev *sd, in configure_custom_video_timings() argument
999 struct adv76xx_state *state = to_state(sd); in configure_custom_video_timings()
1013 v4l2_dbg(2, debug, sd, "%s\n", __func__); in configure_custom_video_timings()
1015 if (is_analog_input(sd)) { in configure_custom_video_timings()
1017 io_write(sd, 0x00, 0x07); /* video std */ in configure_custom_video_timings()
1018 io_write(sd, 0x01, 0x02); /* prim mode */ in configure_custom_video_timings()
1020 cp_write_clr_set(sd, 0x81, 0x10, 0x10); in configure_custom_video_timings()
1027 v4l2_err(sd, "writing to reg 0x16 and 0x17 failed\n"); in configure_custom_video_timings()
1030 cp_write(sd, 0xa2, (cp_start_sav >> 4) & 0xff); in configure_custom_video_timings()
1031 cp_write(sd, 0xa3, ((cp_start_sav & 0x0f) << 4) | in configure_custom_video_timings()
1033 cp_write(sd, 0xa4, cp_start_eav & 0xff); in configure_custom_video_timings()
1036 cp_write(sd, 0xa5, (cp_start_vbi >> 4) & 0xff); in configure_custom_video_timings()
1037 cp_write(sd, 0xa6, ((cp_start_vbi & 0xf) << 4) | in configure_custom_video_timings()
1039 cp_write(sd, 0xa7, cp_end_vbi & 0xff); in configure_custom_video_timings()
1040 } else if (is_digital_input(sd)) { in configure_custom_video_timings()
1043 io_write(sd, 0x00, 0x02); /* video std */ in configure_custom_video_timings()
1044 io_write(sd, 0x01, 0x06); /* prim mode */ in configure_custom_video_timings()
1046 v4l2_dbg(2, debug, sd, "%s: Unknown port %d selected\n", in configure_custom_video_timings()
1050 cp_write(sd, 0x8f, (ch1_fr_ll >> 8) & 0x7); in configure_custom_video_timings()
1051 cp_write(sd, 0x90, ch1_fr_ll & 0xff); in configure_custom_video_timings()
1052 cp_write(sd, 0xab, (height >> 4) & 0xff); in configure_custom_video_timings()
1053 cp_write(sd, 0xac, (height & 0x0f) << 4); in configure_custom_video_timings()
1056 static void adv76xx_set_offset(struct v4l2_subdev *sd, bool auto_offset, u16 offset_a, u16 offset_b… in adv76xx_set_offset() argument
1058 struct adv76xx_state *state = to_state(sd); in adv76xx_set_offset()
1067 v4l2_dbg(2, debug, sd, "%s: %s offset: a = 0x%x, b = 0x%x, c = 0x%x\n", in adv76xx_set_offset()
1071 offset_buf[0] = (cp_read(sd, 0x77) & 0xc0) | ((offset_a & 0x3f0) >> 4); in adv76xx_set_offset()
1079 v4l2_err(sd, "%s: i2c error writing to CP reg 0x77, 0x78, 0x79, 0x7a\n", __func__); in adv76xx_set_offset()
1082 static void adv76xx_set_gain(struct v4l2_subdev *sd, bool auto_gain, u16 gain_a, u16 gain_b, u16 ga… in adv76xx_set_gain() argument
1084 struct adv76xx_state *state = to_state(sd); in adv76xx_set_gain()
1097 v4l2_dbg(2, debug, sd, "%s: %s gain: a = 0x%x, b = 0x%x, c = 0x%x\n", in adv76xx_set_gain()
1109 v4l2_err(sd, "%s: i2c error writing to CP reg 0x73, 0x74, 0x75, 0x76\n", __func__); in adv76xx_set_gain()
1112 static void set_rgb_quantization_range(struct v4l2_subdev *sd) in set_rgb_quantization_range() argument
1114 struct adv76xx_state *state = to_state(sd); in set_rgb_quantization_range()
1115 bool rgb_output = io_read(sd, 0x02) & 0x02; in set_rgb_quantization_range()
1116 bool hdmi_signal = hdmi_read(sd, 0x05) & 0x80; in set_rgb_quantization_range()
1119 if (hdmi_signal && (io_read(sd, 0x60) & 1)) in set_rgb_quantization_range()
1120 y = infoframe_read(sd, 0x01) >> 5; in set_rgb_quantization_range()
1122 v4l2_dbg(2, debug, sd, "%s: RGB quantization range: %d, RGB out: %d, HDMI: %d\n", in set_rgb_quantization_range()
1126 adv76xx_set_gain(sd, true, 0x0, 0x0, 0x0); in set_rgb_quantization_range()
1127 adv76xx_set_offset(sd, true, 0x0, 0x0, 0x0); in set_rgb_quantization_range()
1128 io_write_clr_set(sd, 0x02, 0x04, rgb_output ? 0 : 4); in set_rgb_quantization_range()
1135 io_write_clr_set(sd, 0x02, 0xf0, 0x10); in set_rgb_quantization_range()
1142 io_write_clr_set(sd, 0x02, 0xf0, 0xf0); in set_rgb_quantization_range()
1149 io_write_clr_set(sd, 0x02, 0xf0, 0xf0); in set_rgb_quantization_range()
1158 io_write_clr_set(sd, 0x02, 0xf0, 0x00); in set_rgb_quantization_range()
1161 io_write_clr_set(sd, 0x02, 0xf0, 0x10); in set_rgb_quantization_range()
1163 if (is_digital_input(sd) && rgb_output) { in set_rgb_quantization_range()
1164 adv76xx_set_offset(sd, false, 0x40, 0x40, 0x40); in set_rgb_quantization_range()
1166 adv76xx_set_gain(sd, false, 0xe0, 0xe0, 0xe0); in set_rgb_quantization_range()
1167 adv76xx_set_offset(sd, false, 0x70, 0x70, 0x70); in set_rgb_quantization_range()
1174 io_write_clr_set(sd, 0x02, 0xf0, 0x20); in set_rgb_quantization_range()
1182 io_write_clr_set(sd, 0x02, 0xf0, 0x00); in set_rgb_quantization_range()
1188 io_write_clr_set(sd, 0x02, 0xf0, 0x60); in set_rgb_quantization_range()
1196 io_write_clr_set(sd, 0x02, 0xf0, 0x10); in set_rgb_quantization_range()
1198 if (is_analog_input(sd) || hdmi_signal) in set_rgb_quantization_range()
1203 adv76xx_set_offset(sd, false, 0x40, 0x40, 0x40); in set_rgb_quantization_range()
1205 adv76xx_set_gain(sd, false, 0xe0, 0xe0, 0xe0); in set_rgb_quantization_range()
1206 adv76xx_set_offset(sd, false, 0x70, 0x70, 0x70); in set_rgb_quantization_range()
1214 struct v4l2_subdev *sd = in adv76xx_s_ctrl() local
1215 &container_of(ctrl->handler, struct adv76xx_state, hdl)->sd; in adv76xx_s_ctrl()
1217 struct adv76xx_state *state = to_state(sd); in adv76xx_s_ctrl()
1221 cp_write(sd, 0x3c, ctrl->val); in adv76xx_s_ctrl()
1224 cp_write(sd, 0x3a, ctrl->val); in adv76xx_s_ctrl()
1227 cp_write(sd, 0x3b, ctrl->val); in adv76xx_s_ctrl()
1230 cp_write(sd, 0x3d, ctrl->val); in adv76xx_s_ctrl()
1234 set_rgb_quantization_range(sd); in adv76xx_s_ctrl()
1243 afe_write(sd, 0xc8, ctrl->val); in adv76xx_s_ctrl()
1248 cp_write_clr_set(sd, 0xbf, 0x04, ctrl->val << 2); in adv76xx_s_ctrl()
1251 cp_write(sd, 0xc0, (ctrl->val & 0xff0000) >> 16); in adv76xx_s_ctrl()
1252 cp_write(sd, 0xc1, (ctrl->val & 0x00ff00) >> 8); in adv76xx_s_ctrl()
1253 cp_write(sd, 0xc2, (u8)(ctrl->val & 0x0000ff)); in adv76xx_s_ctrl()
1261 struct v4l2_subdev *sd = in adv76xx_g_volatile_ctrl() local
1262 &container_of(ctrl->handler, struct adv76xx_state, hdl)->sd; in adv76xx_g_volatile_ctrl()
1266 if ((io_read(sd, 0x60) & 1) && (infoframe_read(sd, 0x03) & 0x80)) in adv76xx_g_volatile_ctrl()
1267 ctrl->val = (infoframe_read(sd, 0x05) >> 4) & 3; in adv76xx_g_volatile_ctrl()
1275 static inline bool no_power(struct v4l2_subdev *sd) in no_power() argument
1278 return io_read(sd, 0x0c) & 0x24; in no_power()
1281 static inline bool no_signal_tmds(struct v4l2_subdev *sd) in no_signal_tmds() argument
1283 struct adv76xx_state *state = to_state(sd); in no_signal_tmds()
1285 return !(io_read(sd, 0x6a) & (0x10 >> state->selected_input)); in no_signal_tmds()
1288 static inline bool no_lock_tmds(struct v4l2_subdev *sd) in no_lock_tmds() argument
1290 struct adv76xx_state *state = to_state(sd); in no_lock_tmds()
1293 return (io_read(sd, 0x6a) & info->tdms_lock_mask) != info->tdms_lock_mask; in no_lock_tmds()
1296 static inline bool is_hdmi(struct v4l2_subdev *sd) in is_hdmi() argument
1298 return hdmi_read(sd, 0x05) & 0x80; in is_hdmi()
1301 static inline bool no_lock_sspd(struct v4l2_subdev *sd) in no_lock_sspd() argument
1303 struct adv76xx_state *state = to_state(sd); in no_lock_sspd()
1313 return ((cp_read(sd, 0xb5) & 0xd0) != 0xd0); in no_lock_sspd()
1316 static inline bool no_lock_stdi(struct v4l2_subdev *sd) in no_lock_stdi() argument
1319 return !(cp_read(sd, 0xb1) & 0x80); in no_lock_stdi()
1322 static inline bool no_signal(struct v4l2_subdev *sd) in no_signal() argument
1326 ret = no_power(sd); in no_signal()
1328 ret |= no_lock_stdi(sd); in no_signal()
1329 ret |= no_lock_sspd(sd); in no_signal()
1331 if (is_digital_input(sd)) { in no_signal()
1332 ret |= no_lock_tmds(sd); in no_signal()
1333 ret |= no_signal_tmds(sd); in no_signal()
1339 static inline bool no_lock_cp(struct v4l2_subdev *sd) in no_lock_cp() argument
1341 struct adv76xx_state *state = to_state(sd); in no_lock_cp()
1348 return io_read(sd, 0x12) & 0x01; in no_lock_cp()
1351 static inline bool in_free_run(struct v4l2_subdev *sd) in in_free_run() argument
1353 return cp_read(sd, 0xff) & 0x10; in in_free_run()
1356 static int adv76xx_g_input_status(struct v4l2_subdev *sd, u32 *status) in adv76xx_g_input_status() argument
1359 *status |= no_power(sd) ? V4L2_IN_ST_NO_POWER : 0; in adv76xx_g_input_status()
1360 *status |= no_signal(sd) ? V4L2_IN_ST_NO_SIGNAL : 0; in adv76xx_g_input_status()
1361 if (!in_free_run(sd) && no_lock_cp(sd)) in adv76xx_g_input_status()
1362 *status |= is_digital_input(sd) ? in adv76xx_g_input_status()
1365 v4l2_dbg(1, debug, sd, "%s: status = 0x%x\n", __func__, *status); in adv76xx_g_input_status()
1378 static int stdi2dv_timings(struct v4l2_subdev *sd, in stdi2dv_timings() argument
1382 struct adv76xx_state *state = to_state(sd); in stdi2dv_timings()
1391 adv76xx_get_dv_timings_cap(sd, -1), in stdi2dv_timings()
1411 false, adv76xx_get_dv_timings_cap(sd, -1), timings)) in stdi2dv_timings()
1417 adv76xx_get_dv_timings_cap(sd, -1), timings)) in stdi2dv_timings()
1420 v4l2_dbg(2, debug, sd, in stdi2dv_timings()
1428 static int read_stdi(struct v4l2_subdev *sd, struct stdi_readback *stdi) in read_stdi() argument
1430 struct adv76xx_state *state = to_state(sd); in read_stdi()
1434 if (no_lock_stdi(sd) || no_lock_sspd(sd)) { in read_stdi()
1435 v4l2_dbg(2, debug, sd, "%s: STDI and/or SSPD not locked\n", __func__); in read_stdi()
1440 stdi->bl = cp_read16(sd, 0xb1, 0x3fff); in read_stdi()
1441 stdi->lcf = cp_read16(sd, info->lcf_reg, 0x7ff); in read_stdi()
1442 stdi->lcvs = cp_read(sd, 0xb3) >> 3; in read_stdi()
1443 stdi->interlaced = io_read(sd, 0x12) & 0x10; in read_stdi()
1447 polarity = cp_read(sd, 0xb5); in read_stdi()
1458 polarity = hdmi_read(sd, 0x05); in read_stdi()
1463 if (no_lock_stdi(sd) || no_lock_sspd(sd)) { in read_stdi()
1464 v4l2_dbg(2, debug, sd, in read_stdi()
1470 v4l2_dbg(2, debug, sd, "%s: invalid signal\n", __func__); in read_stdi()
1475 v4l2_dbg(2, debug, sd, in read_stdi()
1484 static int adv76xx_enum_dv_timings(struct v4l2_subdev *sd, in adv76xx_enum_dv_timings() argument
1487 struct adv76xx_state *state = to_state(sd); in adv76xx_enum_dv_timings()
1493 adv76xx_get_dv_timings_cap(sd, timings->pad), in adv76xx_enum_dv_timings()
1497 static int adv76xx_dv_timings_cap(struct v4l2_subdev *sd, in adv76xx_dv_timings_cap() argument
1500 struct adv76xx_state *state = to_state(sd); in adv76xx_dv_timings_cap()
1506 *cap = *adv76xx_get_dv_timings_cap(sd, pad); in adv76xx_dv_timings_cap()
1514 static void adv76xx_fill_optional_dv_timings_fields(struct v4l2_subdev *sd, in adv76xx_fill_optional_dv_timings_fields() argument
1517 v4l2_find_dv_timings_cap(timings, adv76xx_get_dv_timings_cap(sd, -1), in adv76xx_fill_optional_dv_timings_fields()
1518 is_digital_input(sd) ? 250000 : 1000000, in adv76xx_fill_optional_dv_timings_fields()
1522 static unsigned int adv7604_read_hdmi_pixelclock(struct v4l2_subdev *sd) in adv7604_read_hdmi_pixelclock() argument
1526 a = hdmi_read(sd, 0x06); in adv7604_read_hdmi_pixelclock()
1527 b = hdmi_read(sd, 0x3b); in adv7604_read_hdmi_pixelclock()
1534 static unsigned int adv7611_read_hdmi_pixelclock(struct v4l2_subdev *sd) in adv7611_read_hdmi_pixelclock() argument
1538 a = hdmi_read(sd, 0x51); in adv7611_read_hdmi_pixelclock()
1539 b = hdmi_read(sd, 0x52); in adv7611_read_hdmi_pixelclock()
1546 static unsigned int adv76xx_read_hdmi_pixelclock(struct v4l2_subdev *sd) in adv76xx_read_hdmi_pixelclock() argument
1548 struct adv76xx_state *state = to_state(sd); in adv76xx_read_hdmi_pixelclock()
1552 freq = info->read_hdmi_pixelclock(sd); in adv76xx_read_hdmi_pixelclock()
1553 if (is_hdmi(sd)) { in adv76xx_read_hdmi_pixelclock()
1555 bits_per_channel = ((hdmi_read(sd, 0x0b) & 0x60) >> 4) + 8; in adv76xx_read_hdmi_pixelclock()
1556 pixelrepetition = (hdmi_read(sd, 0x05) & 0x0f) + 1; in adv76xx_read_hdmi_pixelclock()
1564 static int adv76xx_query_dv_timings(struct v4l2_subdev *sd, unsigned int pad, in adv76xx_query_dv_timings() argument
1567 struct adv76xx_state *state = to_state(sd); in adv76xx_query_dv_timings()
1577 if (no_signal(sd)) { in adv76xx_query_dv_timings()
1579 v4l2_dbg(1, debug, sd, "%s: no valid signal\n", __func__); in adv76xx_query_dv_timings()
1584 if (read_stdi(sd, &stdi)) { in adv76xx_query_dv_timings()
1585 v4l2_dbg(1, debug, sd, "%s: STDI/SSPD not locked\n", __func__); in adv76xx_query_dv_timings()
1591 if (is_digital_input(sd)) { in adv76xx_query_dv_timings()
1592 bool hdmi_signal = hdmi_read(sd, 0x05) & 0x80; in adv76xx_query_dv_timings()
1596 w = hdmi_read16(sd, 0x07, info->linewidth_mask); in adv76xx_query_dv_timings()
1597 h = hdmi_read16(sd, 0x09, info->field0_height_mask); in adv76xx_query_dv_timings()
1599 if (hdmi_signal && (io_read(sd, 0x60) & 1)) in adv76xx_query_dv_timings()
1600 vic = infoframe_read(sd, 0x04); in adv76xx_query_dv_timings()
1610 bt->pixelclock = adv76xx_read_hdmi_pixelclock(sd); in adv76xx_query_dv_timings()
1611 bt->hfrontporch = hdmi_read16(sd, 0x20, info->hfrontporch_mask); in adv76xx_query_dv_timings()
1612 bt->hsync = hdmi_read16(sd, 0x22, info->hsync_mask); in adv76xx_query_dv_timings()
1613 bt->hbackporch = hdmi_read16(sd, 0x24, info->hbackporch_mask); in adv76xx_query_dv_timings()
1614 bt->vfrontporch = hdmi_read16(sd, 0x2a, in adv76xx_query_dv_timings()
1616 bt->vsync = hdmi_read16(sd, 0x2e, info->field0_vsync_mask) / 2; in adv76xx_query_dv_timings()
1617 bt->vbackporch = hdmi_read16(sd, 0x32, in adv76xx_query_dv_timings()
1619 bt->polarities = ((hdmi_read(sd, 0x05) & 0x10) ? V4L2_DV_VSYNC_POS_POL : 0) | in adv76xx_query_dv_timings()
1620 ((hdmi_read(sd, 0x05) & 0x20) ? V4L2_DV_HSYNC_POS_POL : 0); in adv76xx_query_dv_timings()
1622 bt->height += hdmi_read16(sd, 0x0b, in adv76xx_query_dv_timings()
1624 bt->il_vfrontporch = hdmi_read16(sd, 0x2c, in adv76xx_query_dv_timings()
1626 bt->il_vsync = hdmi_read16(sd, 0x30, in adv76xx_query_dv_timings()
1628 bt->il_vbackporch = hdmi_read16(sd, 0x34, in adv76xx_query_dv_timings()
1631 adv76xx_fill_optional_dv_timings_fields(sd, timings); in adv76xx_query_dv_timings()
1637 if (!stdi2dv_timings(sd, &stdi, timings)) in adv76xx_query_dv_timings()
1640 v4l2_dbg(1, debug, sd, "%s: lcvs + 1 = %d\n", __func__, stdi.lcvs); in adv76xx_query_dv_timings()
1641 if (!stdi2dv_timings(sd, &stdi, timings)) in adv76xx_query_dv_timings()
1644 v4l2_dbg(1, debug, sd, "%s: lcvs - 1 = %d\n", __func__, stdi.lcvs); in adv76xx_query_dv_timings()
1645 if (stdi2dv_timings(sd, &stdi, timings)) { in adv76xx_query_dv_timings()
1656 v4l2_dbg(1, debug, sd, "%s: restart STDI\n", __func__); in adv76xx_query_dv_timings()
1659 cp_write_clr_set(sd, 0x86, 0x06, 0x00); in adv76xx_query_dv_timings()
1661 cp_write_clr_set(sd, 0x86, 0x06, 0x04); in adv76xx_query_dv_timings()
1663 cp_write_clr_set(sd, 0x86, 0x06, 0x02); in adv76xx_query_dv_timings()
1667 v4l2_dbg(1, debug, sd, "%s: format not supported\n", __func__); in adv76xx_query_dv_timings()
1674 if (no_signal(sd)) { in adv76xx_query_dv_timings()
1675 v4l2_dbg(1, debug, sd, "%s: signal lost during readout\n", __func__); in adv76xx_query_dv_timings()
1680 if ((is_analog_input(sd) && bt->pixelclock > 170000000) || in adv76xx_query_dv_timings()
1681 (is_digital_input(sd) && bt->pixelclock > 225000000)) { in adv76xx_query_dv_timings()
1682 v4l2_dbg(1, debug, sd, "%s: pixelclock out of range %d\n", in adv76xx_query_dv_timings()
1688 v4l2_print_dv_timings(sd->name, "adv76xx_query_dv_timings: ", in adv76xx_query_dv_timings()
1694 static int adv76xx_s_dv_timings(struct v4l2_subdev *sd, unsigned int pad, in adv76xx_s_dv_timings() argument
1697 struct adv76xx_state *state = to_state(sd); in adv76xx_s_dv_timings()
1705 v4l2_dbg(1, debug, sd, "%s: no change\n", __func__); in adv76xx_s_dv_timings()
1711 if (!v4l2_valid_dv_timings(timings, adv76xx_get_dv_timings_cap(sd, -1), in adv76xx_s_dv_timings()
1715 adv76xx_fill_optional_dv_timings_fields(sd, timings); in adv76xx_s_dv_timings()
1719 cp_write_clr_set(sd, 0x91, 0x40, bt->interlaced ? 0x40 : 0x00); in adv76xx_s_dv_timings()
1722 err = configure_predefined_video_timings(sd, timings); in adv76xx_s_dv_timings()
1726 configure_custom_video_timings(sd, bt); in adv76xx_s_dv_timings()
1729 set_rgb_quantization_range(sd); in adv76xx_s_dv_timings()
1732 v4l2_print_dv_timings(sd->name, "adv76xx_s_dv_timings: ", in adv76xx_s_dv_timings()
1737 static int adv76xx_g_dv_timings(struct v4l2_subdev *sd, unsigned int pad, in adv76xx_g_dv_timings() argument
1740 struct adv76xx_state *state = to_state(sd); in adv76xx_g_dv_timings()
1746 static void adv7604_set_termination(struct v4l2_subdev *sd, bool enable) in adv7604_set_termination() argument
1748 hdmi_write(sd, 0x01, enable ? 0x00 : 0x78); in adv7604_set_termination()
1751 static void adv7611_set_termination(struct v4l2_subdev *sd, bool enable) in adv7611_set_termination() argument
1753 hdmi_write(sd, 0x83, enable ? 0xfe : 0xff); in adv7611_set_termination()
1756 static void enable_input(struct v4l2_subdev *sd) in enable_input() argument
1758 struct adv76xx_state *state = to_state(sd); in enable_input()
1760 if (is_analog_input(sd)) { in enable_input()
1761 io_write(sd, 0x15, 0xb0); /* Disable Tristate of Pins (no audio) */ in enable_input()
1762 } else if (is_digital_input(sd)) { in enable_input()
1763 hdmi_write_clr_set(sd, 0x00, 0x03, state->selected_input); in enable_input()
1764 state->info->set_termination(sd, true); in enable_input()
1765 io_write(sd, 0x15, 0xa0); /* Disable Tristate of Pins */ in enable_input()
1766 hdmi_write_clr_set(sd, 0x1a, 0x10, 0x00); /* Unmute audio */ in enable_input()
1768 v4l2_dbg(2, debug, sd, "%s: Unknown port %d selected\n", in enable_input()
1773 static void disable_input(struct v4l2_subdev *sd) in disable_input() argument
1775 struct adv76xx_state *state = to_state(sd); in disable_input()
1777 hdmi_write_clr_set(sd, 0x1a, 0x10, 0x10); /* Mute audio */ in disable_input()
1779 io_write(sd, 0x15, 0xbe); /* Tristate all outputs from video core */ in disable_input()
1780 state->info->set_termination(sd, false); in disable_input()
1783 static void select_input(struct v4l2_subdev *sd) in select_input() argument
1785 struct adv76xx_state *state = to_state(sd); in select_input()
1788 if (is_analog_input(sd)) { in select_input()
1789 adv76xx_write_reg_seq(sd, info->recommended_settings[0]); in select_input()
1791 afe_write(sd, 0x00, 0x08); /* power up ADC */ in select_input()
1792 afe_write(sd, 0x01, 0x06); /* power up Analog Front End */ in select_input()
1793 afe_write(sd, 0xc8, 0x00); /* phase control */ in select_input()
1794 } else if (is_digital_input(sd)) { in select_input()
1795 hdmi_write(sd, 0x00, state->selected_input & 0x03); in select_input()
1797 adv76xx_write_reg_seq(sd, info->recommended_settings[1]); in select_input()
1800 afe_write(sd, 0x00, 0xff); /* power down ADC */ in select_input()
1801 afe_write(sd, 0x01, 0xfe); /* power down Analog Front End */ in select_input()
1802 afe_write(sd, 0xc8, 0x40); /* phase control */ in select_input()
1805 cp_write(sd, 0x3e, 0x00); /* CP core pre-gain control */ in select_input()
1806 cp_write(sd, 0xc3, 0x39); /* CP coast control. Graphics mode */ in select_input()
1807 cp_write(sd, 0x40, 0x80); /* CP core pre-gain control. Graphics mode */ in select_input()
1809 v4l2_dbg(2, debug, sd, "%s: Unknown port %d selected\n", in select_input()
1814 cp_write_clr_set(sd, 0x3e, 0x80, 0x80); in select_input()
1817 static int adv76xx_s_routing(struct v4l2_subdev *sd, in adv76xx_s_routing() argument
1820 struct adv76xx_state *state = to_state(sd); in adv76xx_s_routing()
1822 v4l2_dbg(2, debug, sd, "%s: input %d, selected input %d", in adv76xx_s_routing()
1833 disable_input(sd); in adv76xx_s_routing()
1834 select_input(sd); in adv76xx_s_routing()
1835 enable_input(sd); in adv76xx_s_routing()
1837 v4l2_subdev_notify_event(sd, &adv76xx_ev_fmt); in adv76xx_s_routing()
1842 static int adv76xx_enum_mbus_code(struct v4l2_subdev *sd, in adv76xx_enum_mbus_code() argument
1846 struct adv76xx_state *state = to_state(sd); in adv76xx_enum_mbus_code()
1910 struct v4l2_subdev *sd = &state->sd; in adv76xx_setup_format() local
1912 io_write_clr_set(sd, 0x02, 0x02, in adv76xx_setup_format()
1914 io_write(sd, 0x03, state->format->op_format_sel | in adv76xx_setup_format()
1916 io_write_clr_set(sd, 0x04, 0xe0, adv76xx_op_ch_sel(state)); in adv76xx_setup_format()
1917 io_write_clr_set(sd, 0x05, 0x01, in adv76xx_setup_format()
1919 set_rgb_quantization_range(sd); in adv76xx_setup_format()
1922 static int adv76xx_get_format(struct v4l2_subdev *sd, in adv76xx_get_format() argument
1926 struct adv76xx_state *state = to_state(sd); in adv76xx_get_format()
1945 static int adv76xx_get_selection(struct v4l2_subdev *sd, in adv76xx_get_selection() argument
1949 struct adv76xx_state *state = to_state(sd); in adv76xx_get_selection()
1965 static int adv76xx_set_format(struct v4l2_subdev *sd, in adv76xx_set_format() argument
1969 struct adv76xx_state *state = to_state(sd); in adv76xx_set_format()
1996 static void adv76xx_cec_tx_raw_status(struct v4l2_subdev *sd, u8 tx_raw_status) in adv76xx_cec_tx_raw_status() argument
1998 struct adv76xx_state *state = to_state(sd); in adv76xx_cec_tx_raw_status()
2000 if ((cec_read(sd, 0x11) & 0x01) == 0) { in adv76xx_cec_tx_raw_status()
2001 v4l2_dbg(1, debug, sd, "%s: tx raw: tx disabled\n", __func__); in adv76xx_cec_tx_raw_status()
2006 v4l2_dbg(1, debug, sd, "%s: tx raw: arbitration lost\n", in adv76xx_cec_tx_raw_status()
2017 v4l2_dbg(1, debug, sd, "%s: tx raw: retry failed\n", __func__); in adv76xx_cec_tx_raw_status()
2023 nack_cnt = cec_read(sd, 0x14) & 0xf; in adv76xx_cec_tx_raw_status()
2026 low_drive_cnt = cec_read(sd, 0x14) >> 4; in adv76xx_cec_tx_raw_status()
2034 v4l2_dbg(1, debug, sd, "%s: tx raw: ready ok\n", __func__); in adv76xx_cec_tx_raw_status()
2040 static void adv76xx_cec_isr(struct v4l2_subdev *sd, bool *handled) in adv76xx_cec_isr() argument
2042 struct adv76xx_state *state = to_state(sd); in adv76xx_cec_isr()
2047 cec_irq = io_read(sd, info->cec_irq_status) & 0x0f; in adv76xx_cec_isr()
2051 v4l2_dbg(1, debug, sd, "%s: cec: irq 0x%x\n", __func__, cec_irq); in adv76xx_cec_isr()
2052 adv76xx_cec_tx_raw_status(sd, cec_irq); in adv76xx_cec_isr()
2056 msg.len = cec_read(sd, 0x25) & 0x1f; in adv76xx_cec_isr()
2064 msg.msg[i] = cec_read(sd, i + 0x15); in adv76xx_cec_isr()
2065 cec_write(sd, info->cec_rx_enable, in adv76xx_cec_isr()
2079 io_write(sd, info->cec_irq_status + 1, cec_irq); in adv76xx_cec_isr()
2089 struct v4l2_subdev *sd = &state->sd; in adv76xx_cec_adap_enable() local
2092 cec_write_clr_set(sd, 0x2a, 0x01, 0x01); /* power up cec */ in adv76xx_cec_adap_enable()
2093 cec_write(sd, 0x2c, 0x01); /* cec soft reset */ in adv76xx_cec_adap_enable()
2094 cec_write_clr_set(sd, 0x11, 0x01, 0); /* initially disable tx */ in adv76xx_cec_adap_enable()
2100 io_write_clr_set(sd, info->cec_irq_status + 3, 0x0f, 0x0f); in adv76xx_cec_adap_enable()
2101 cec_write(sd, info->cec_rx_enable, info->cec_rx_enable_mask); in adv76xx_cec_adap_enable()
2104 io_write_clr_set(sd, info->cec_irq_status + 3, 0x0f, 0x00); in adv76xx_cec_adap_enable()
2106 cec_write_clr_set(sd, 0x27, 0x70, 0x00); in adv76xx_cec_adap_enable()
2108 cec_write_clr_set(sd, 0x2a, 0x01, 0x00); in adv76xx_cec_adap_enable()
2112 adv76xx_s_detect_tx_5v_ctrl(sd); in adv76xx_cec_adap_enable()
2119 struct v4l2_subdev *sd = &state->sd; in adv76xx_cec_adap_log_addr() local
2126 cec_write_clr_set(sd, 0x27, 0x70, 0); in adv76xx_cec_adap_log_addr()
2150 cec_write_clr_set(sd, 0x27, 0x10, 0x10); in adv76xx_cec_adap_log_addr()
2152 cec_write_clr_set(sd, 0x28, 0x0f, addr); in adv76xx_cec_adap_log_addr()
2156 cec_write_clr_set(sd, 0x27, 0x20, 0x20); in adv76xx_cec_adap_log_addr()
2158 cec_write_clr_set(sd, 0x28, 0xf0, addr << 4); in adv76xx_cec_adap_log_addr()
2162 cec_write_clr_set(sd, 0x27, 0x40, 0x40); in adv76xx_cec_adap_log_addr()
2164 cec_write_clr_set(sd, 0x29, 0x0f, addr); in adv76xx_cec_adap_log_addr()
2174 struct v4l2_subdev *sd = &state->sd; in adv76xx_cec_adap_transmit() local
2183 cec_write_clr_set(sd, 0x12, 0x70, max(1, attempts - 1) << 4); in adv76xx_cec_adap_transmit()
2186 v4l2_err(sd, "%s: len exceeded 16 (%d)\n", __func__, len); in adv76xx_cec_adap_transmit()
2192 cec_write(sd, i, msg->msg[i]); in adv76xx_cec_adap_transmit()
2195 cec_write(sd, 0x10, len); in adv76xx_cec_adap_transmit()
2197 cec_write(sd, 0x11, 0x01); in adv76xx_cec_adap_transmit()
2208 static int adv76xx_isr(struct v4l2_subdev *sd, u32 status, bool *handled) in adv76xx_isr() argument
2210 struct adv76xx_state *state = to_state(sd); in adv76xx_isr()
2212 const u8 irq_reg_0x43 = io_read(sd, 0x43); in adv76xx_isr()
2213 const u8 irq_reg_0x6b = io_read(sd, 0x6b); in adv76xx_isr()
2214 const u8 irq_reg_0x70 = io_read(sd, 0x70); in adv76xx_isr()
2220 io_write(sd, 0x44, irq_reg_0x43); in adv76xx_isr()
2222 io_write(sd, 0x71, irq_reg_0x70); in adv76xx_isr()
2224 io_write(sd, 0x6c, irq_reg_0x6b); in adv76xx_isr()
2226 v4l2_dbg(2, debug, sd, "%s: ", __func__); in adv76xx_isr()
2230 fmt_change_digital = is_digital_input(sd) in adv76xx_isr()
2235 v4l2_dbg(1, debug, sd, in adv76xx_isr()
2239 v4l2_subdev_notify_event(sd, &adv76xx_ev_fmt); in adv76xx_isr()
2246 v4l2_dbg(1, debug, sd, "%s: irq %s mode\n", __func__, in adv76xx_isr()
2247 (io_read(sd, 0x6a) & 0x01) ? "HDMI" : "DVI"); in adv76xx_isr()
2248 set_rgb_quantization_range(sd); in adv76xx_isr()
2255 adv76xx_cec_isr(sd, handled); in adv76xx_isr()
2261 v4l2_dbg(1, debug, sd, "%s: tx_5v: 0x%x\n", __func__, tx_5v); in adv76xx_isr()
2262 adv76xx_s_detect_tx_5v_ctrl(sd); in adv76xx_isr()
2274 adv76xx_isr(&state->sd, 0, &handled); in adv76xx_irq_handler()
2279 static int adv76xx_get_edid(struct v4l2_subdev *sd, struct v4l2_edid *edid) in adv76xx_get_edid() argument
2281 struct adv76xx_state *state = to_state(sd); in adv76xx_get_edid()
2317 static int adv76xx_set_edid(struct v4l2_subdev *sd, struct v4l2_edid *edid) in adv76xx_set_edid() argument
2319 struct adv76xx_state *state = to_state(sd); in adv76xx_set_edid()
2336 rep_write_clr_set(sd, info->edid_enable_reg, 0x0f, state->edid.present); in adv76xx_set_edid()
2347 v4l2_dbg(2, debug, sd, "%s: clear EDID pad %d, edid.present = 0x%x\n", in adv76xx_set_edid()
2370 v4l2_dbg(2, debug, sd, "%s: write EDID pad %d, edid.present = 0x%x\n", in adv76xx_set_edid()
2376 rep_write_clr_set(sd, info->edid_enable_reg, 0x0f, 0x00); in adv76xx_set_edid()
2384 rep_write(sd, info->edid_spa_port_b_reg, pa >> 8); in adv76xx_set_edid()
2385 rep_write(sd, info->edid_spa_port_b_reg + 1, pa & 0xff); in adv76xx_set_edid()
2388 rep_write(sd, info->edid_spa_port_b_reg + 2, pa >> 8); in adv76xx_set_edid()
2389 rep_write(sd, info->edid_spa_port_b_reg + 3, pa & 0xff); in adv76xx_set_edid()
2392 rep_write(sd, info->edid_spa_port_b_reg + 4, pa >> 8); in adv76xx_set_edid()
2393 rep_write(sd, info->edid_spa_port_b_reg + 5, pa & 0xff); in adv76xx_set_edid()
2402 rep_write(sd, info->edid_spa_loc_reg, spa_loc & 0xff); in adv76xx_set_edid()
2403 rep_write_clr_set(sd, info->edid_spa_loc_reg + 1, in adv76xx_set_edid()
2416 rep_write_clr_set(sd, info->edid_segment_reg, in adv76xx_set_edid()
2418 err = edid_write_block(sd, 128 * min(edid->blocks, 2U), state->edid.edid); in adv76xx_set_edid()
2420 v4l2_err(sd, "error %d writing edid pad %d\n", err, edid->pad); in adv76xx_set_edid()
2424 rep_write_clr_set(sd, info->edid_segment_reg, in adv76xx_set_edid()
2427 err = edid_write_block(sd, 128 * (edid->blocks - 2), in adv76xx_set_edid()
2430 v4l2_err(sd, "error %d writing edid pad %d\n", in adv76xx_set_edid()
2438 rep_write_clr_set(sd, info->edid_enable_reg, 0x0f, state->edid.present); in adv76xx_set_edid()
2441 if (rep_read(sd, info->edid_status_reg) & state->edid.present) in adv76xx_set_edid()
2446 v4l2_err(sd, "error enabling edid (0x%x)\n", state->edid.present); in adv76xx_set_edid()
2465 static int adv76xx_read_infoframe_buf(struct v4l2_subdev *sd, int index, in adv76xx_read_infoframe_buf() argument
2471 if (!(io_read(sd, 0x60) & adv76xx_cri[index].present_mask)) { in adv76xx_read_infoframe_buf()
2472 v4l2_info(sd, "%s infoframe not received\n", in adv76xx_read_infoframe_buf()
2478 buf[i] = infoframe_read(sd, adv76xx_cri[index].head_addr + i); in adv76xx_read_infoframe_buf()
2483 v4l2_err(sd, "%s: invalid %s infoframe length %d\n", __func__, in adv76xx_read_infoframe_buf()
2489 buf[i + 3] = infoframe_read(sd, in adv76xx_read_infoframe_buf()
2494 static void adv76xx_log_infoframes(struct v4l2_subdev *sd) in adv76xx_log_infoframes() argument
2498 if (!is_hdmi(sd)) { in adv76xx_log_infoframes()
2499 v4l2_info(sd, "receive DVI-D signal, no infoframes\n"); in adv76xx_log_infoframes()
2504 struct i2c_client *client = v4l2_get_subdevdata(sd); in adv76xx_log_infoframes()
2509 len = adv76xx_read_infoframe_buf(sd, i, buffer); in adv76xx_log_infoframes()
2514 v4l2_err(sd, "%s: unpack of %s infoframe failed\n", in adv76xx_log_infoframes()
2521 static int adv76xx_log_status(struct v4l2_subdev *sd) in adv76xx_log_status() argument
2523 struct adv76xx_state *state = to_state(sd); in adv76xx_log_status()
2565 v4l2_info(sd, "-----Chip status-----\n"); in adv76xx_log_status()
2566 v4l2_info(sd, "Chip power: %s\n", no_power(sd) ? "off" : "on"); in adv76xx_log_status()
2567 edid_enabled = rep_read(sd, info->edid_status_reg); in adv76xx_log_status()
2568 v4l2_info(sd, "EDID enabled port A: %s, B: %s, C: %s, D: %s\n", in adv76xx_log_status()
2573 v4l2_info(sd, "CEC: %s\n", state->cec_enabled_adap ? in adv76xx_log_status()
2582 v4l2_info(sd, "CEC Logical Address: 0x%x\n", in adv76xx_log_status()
2587 v4l2_info(sd, "-----Signal status-----\n"); in adv76xx_log_status()
2588 cable_det = info->read_cable_det(sd); in adv76xx_log_status()
2589 v4l2_info(sd, "Cable detected (+5V power) port A: %s, B: %s, C: %s, D: %s\n", in adv76xx_log_status()
2594 v4l2_info(sd, "TMDS signal detected: %s\n", in adv76xx_log_status()
2595 no_signal_tmds(sd) ? "false" : "true"); in adv76xx_log_status()
2596 v4l2_info(sd, "TMDS signal locked: %s\n", in adv76xx_log_status()
2597 no_lock_tmds(sd) ? "false" : "true"); in adv76xx_log_status()
2598 v4l2_info(sd, "SSPD locked: %s\n", no_lock_sspd(sd) ? "false" : "true"); in adv76xx_log_status()
2599 v4l2_info(sd, "STDI locked: %s\n", no_lock_stdi(sd) ? "false" : "true"); in adv76xx_log_status()
2600 v4l2_info(sd, "CP locked: %s\n", no_lock_cp(sd) ? "false" : "true"); in adv76xx_log_status()
2601 v4l2_info(sd, "CP free run: %s\n", in adv76xx_log_status()
2602 (in_free_run(sd)) ? "on" : "off"); in adv76xx_log_status()
2603 v4l2_info(sd, "Prim-mode = 0x%x, video std = 0x%x, v_freq = 0x%x\n", in adv76xx_log_status()
2604 io_read(sd, 0x01) & 0x0f, io_read(sd, 0x00) & 0x3f, in adv76xx_log_status()
2605 (io_read(sd, 0x01) & 0x70) >> 4); in adv76xx_log_status()
2607 v4l2_info(sd, "-----Video Timings-----\n"); in adv76xx_log_status()
2608 if (read_stdi(sd, &stdi)) in adv76xx_log_status()
2609 v4l2_info(sd, "STDI: not locked\n"); in adv76xx_log_status()
2611 …v4l2_info(sd, "STDI: lcf (frame height - 1) = %d, bl = %d, lcvs (vsync) = %d, %s, %chsync, %cvsync… in adv76xx_log_status()
2615 if (adv76xx_query_dv_timings(sd, 0, &timings)) in adv76xx_log_status()
2616 v4l2_info(sd, "No video detected\n"); in adv76xx_log_status()
2618 v4l2_print_dv_timings(sd->name, "Detected format: ", in adv76xx_log_status()
2620 v4l2_print_dv_timings(sd->name, "Configured format: ", in adv76xx_log_status()
2623 if (no_signal(sd)) in adv76xx_log_status()
2626 v4l2_info(sd, "-----Color space-----\n"); in adv76xx_log_status()
2627 v4l2_info(sd, "RGB quantization range ctrl: %s\n", in adv76xx_log_status()
2630 ret = io_read(sd, 0x02); in adv76xx_log_status()
2632 v4l2_info(sd, "Can't read Input/Output color space\n"); in adv76xx_log_status()
2636 v4l2_info(sd, "Input color space: %s\n", in adv76xx_log_status()
2638 v4l2_info(sd, "Output color space: %s %s, alt-gamma %s\n", in adv76xx_log_status()
2644 v4l2_info(sd, "Color space conversion: %s\n", in adv76xx_log_status()
2645 csc_coeff_sel_rb[cp_read(sd, info->cp_csc) >> 4]); in adv76xx_log_status()
2647 if (!is_digital_input(sd)) in adv76xx_log_status()
2650 v4l2_info(sd, "-----%s status-----\n", is_hdmi(sd) ? "HDMI" : "DVI-D"); in adv76xx_log_status()
2651 v4l2_info(sd, "Digital video port selected: %c\n", in adv76xx_log_status()
2652 (hdmi_read(sd, 0x00) & 0x03) + 'A'); in adv76xx_log_status()
2653 v4l2_info(sd, "HDCP encrypted content: %s\n", in adv76xx_log_status()
2654 (hdmi_read(sd, 0x05) & 0x40) ? "true" : "false"); in adv76xx_log_status()
2655 v4l2_info(sd, "HDCP keys read: %s%s\n", in adv76xx_log_status()
2656 (hdmi_read(sd, 0x04) & 0x20) ? "yes" : "no", in adv76xx_log_status()
2657 (hdmi_read(sd, 0x04) & 0x10) ? "ERROR" : ""); in adv76xx_log_status()
2658 if (is_hdmi(sd)) { in adv76xx_log_status()
2659 bool audio_pll_locked = hdmi_read(sd, 0x04) & 0x01; in adv76xx_log_status()
2660 bool audio_sample_packet_detect = hdmi_read(sd, 0x18) & 0x01; in adv76xx_log_status()
2661 bool audio_mute = io_read(sd, 0x65) & 0x40; in adv76xx_log_status()
2663 v4l2_info(sd, "Audio: pll %s, samples %s, %s\n", in adv76xx_log_status()
2668 v4l2_info(sd, "Audio format: %s\n", in adv76xx_log_status()
2669 (hdmi_read(sd, 0x07) & 0x20) ? "multi-channel" : "stereo"); in adv76xx_log_status()
2671 v4l2_info(sd, "Audio CTS: %u\n", (hdmi_read(sd, 0x5b) << 12) + in adv76xx_log_status()
2672 (hdmi_read(sd, 0x5c) << 8) + in adv76xx_log_status()
2673 (hdmi_read(sd, 0x5d) & 0xf0)); in adv76xx_log_status()
2674 v4l2_info(sd, "Audio N: %u\n", ((hdmi_read(sd, 0x5d) & 0x0f) << 16) + in adv76xx_log_status()
2675 (hdmi_read(sd, 0x5e) << 8) + in adv76xx_log_status()
2676 hdmi_read(sd, 0x5f)); in adv76xx_log_status()
2677 v4l2_info(sd, "AV Mute: %s\n", (hdmi_read(sd, 0x04) & 0x40) ? "on" : "off"); in adv76xx_log_status()
2679 v4l2_info(sd, "Deep color mode: %s\n", deep_color_mode_txt[(hdmi_read(sd, 0x0b) & 0x60) >> 5]); in adv76xx_log_status()
2680 v4l2_info(sd, "HDMI colorspace: %s\n", hdmi_color_space_txt[hdmi_read(sd, 0x53) & 0xf]); in adv76xx_log_status()
2682 adv76xx_log_infoframes(sd); in adv76xx_log_status()
2688 static int adv76xx_subscribe_event(struct v4l2_subdev *sd, in adv76xx_subscribe_event() argument
2694 return v4l2_src_change_event_subdev_subscribe(sd, fh, sub); in adv76xx_subscribe_event()
2696 return v4l2_ctrl_subdev_subscribe_event(sd, fh, sub); in adv76xx_subscribe_event()
2707 struct v4l2_subdev *sd = priv; in adv76xx_debugfs_if_read() local
2711 if (!is_hdmi(sd)) in adv76xx_debugfs_if_read()
2731 len = adv76xx_read_infoframe_buf(sd, index, buf); in adv76xx_debugfs_if_read()
2737 static int adv76xx_registered(struct v4l2_subdev *sd) in adv76xx_registered() argument
2739 struct adv76xx_state *state = to_state(sd); in adv76xx_registered()
2740 struct i2c_client *client = v4l2_get_subdevdata(sd); in adv76xx_registered()
2748 state->debugfs_dir = debugfs_create_dir(sd->name, v4l2_debugfs_root()); in adv76xx_registered()
2751 V4L2_DEBUGFS_IF_SPD | V4L2_DEBUGFS_IF_HDMI, sd, in adv76xx_registered()
2756 static void adv76xx_unregistered(struct v4l2_subdev *sd) in adv76xx_unregistered() argument
2758 struct adv76xx_state *state = to_state(sd); in adv76xx_unregistered()
2873 static int adv76xx_core_init(struct v4l2_subdev *sd) in adv76xx_core_init() argument
2875 struct adv76xx_state *state = to_state(sd); in adv76xx_core_init()
2879 hdmi_write(sd, 0x48, in adv76xx_core_init()
2883 disable_input(sd); in adv76xx_core_init()
2888 select_input(sd); in adv76xx_core_init()
2889 enable_input(sd); in adv76xx_core_init()
2893 io_write(sd, 0x0c, 0x42); /* Power up part and power down VDP */ in adv76xx_core_init()
2894 io_write(sd, 0x0b, 0x44); /* Power down ESDP block */ in adv76xx_core_init()
2895 cp_write(sd, 0xcf, 0x01); /* Power down macrovision */ in adv76xx_core_init()
2900 io_write_clr_set(sd, 0x20, 0xc0, 0); in adv76xx_core_init()
2906 hdmi_write_clr_set(sd, 0x6c, 0xf6, 0x26); in adv76xx_core_init()
2910 io_write_clr_set(sd, 0x02, 0x0f, pdata->alt_gamma << 3); in adv76xx_core_init()
2911 io_write_clr_set(sd, 0x05, 0x0e, pdata->blank_data << 3 | in adv76xx_core_init()
2916 cp_write(sd, 0x69, 0x30); /* Enable CP CSC */ in adv76xx_core_init()
2919 io_write(sd, 0x06, 0xa0 | pdata->inv_vs_pol << 2 | in adv76xx_core_init()
2923 io_write(sd, 0x14, 0x40 | pdata->dr_str_data << 4 | in adv76xx_core_init()
2927 cp_write(sd, 0xba, (pdata->hdmi_free_run_mode << 1) | 0x01); /* HDMI free run */ in adv76xx_core_init()
2928 cp_write(sd, 0xf3, 0xdc); /* Low threshold to enter/exit free run mode */ in adv76xx_core_init()
2929 cp_write(sd, 0xf9, 0x23); /* STDI ch. 1 - LCVS change threshold - in adv76xx_core_init()
2931 cp_write(sd, 0x45, 0x23); /* STDI ch. 2 - LCVS change threshold - in adv76xx_core_init()
2933 cp_write(sd, 0xc9, 0x2d); /* use prim_mode and vid_std as free run resolution in adv76xx_core_init()
2937 hdmi_write_clr_set(sd, 0x15, 0x03, 0x03); /* Mute on FIFO over-/underflow [REF_01, c. 1.2.18] */ in adv76xx_core_init()
2938 hdmi_write_clr_set(sd, 0x1a, 0x0e, 0x08); /* Wait 1 s before unmute */ in adv76xx_core_init()
2939 hdmi_write_clr_set(sd, 0x68, 0x06, 0x06); /* FIFO reset on over-/underflow [REF_01, c. 1.2.19] */ in adv76xx_core_init()
2942 afe_write(sd, 0xb5, 0x01); /* Setting MCLK to 256Fs */ in adv76xx_core_init()
2945 afe_write(sd, 0x02, pdata->ain_sel); /* Select analog input muxing mode */ in adv76xx_core_init()
2946 io_write_clr_set(sd, 0x30, 1 << 4, pdata->output_bus_lsb_to_msb << 4); in adv76xx_core_init()
2950 io_write(sd, 0x40, 0xc0 | pdata->int1_config); /* Configure INT1 */ in adv76xx_core_init()
2951 io_write(sd, 0x46, 0x98); /* Enable SSPD, STDI and CP unlocked interrupts */ in adv76xx_core_init()
2952 …io_write(sd, 0x6e, info->fmt_change_digital_mask); /* Enable V_LOCKED and DE_REGEN_LCK interrupts … in adv76xx_core_init()
2953 io_write(sd, 0x73, info->cable_det_mask); /* Enable cable detection (+5v) interrupts */ in adv76xx_core_init()
2954 info->setup_irqs(sd); in adv76xx_core_init()
2956 return v4l2_ctrl_handler_setup(sd->ctrl_handler); in adv76xx_core_init()
2959 static void adv7604_setup_irqs(struct v4l2_subdev *sd) in adv7604_setup_irqs() argument
2961 io_write(sd, 0x41, 0xd7); /* STDI irq for any change, disable INT2 */ in adv7604_setup_irqs()
2964 static void adv7611_setup_irqs(struct v4l2_subdev *sd) in adv7611_setup_irqs() argument
2966 io_write(sd, 0x41, 0xd0); /* STDI irq for any change, disable INT2 */ in adv7611_setup_irqs()
2969 static void adv7612_setup_irqs(struct v4l2_subdev *sd) in adv7612_setup_irqs() argument
2971 io_write(sd, 0x41, 0xd0); /* disable INT2 */ in adv7612_setup_irqs()
2982 static struct i2c_client *adv76xx_dummy_client(struct v4l2_subdev *sd, in adv76xx_dummy_client() argument
2985 struct i2c_client *client = v4l2_get_subdevdata(sd); in adv76xx_dummy_client()
2986 struct adv76xx_state *state = to_state(sd); in adv76xx_dummy_client()
3000 io_write(sd, io_reg, new_client->addr << 1); in adv76xx_dummy_client()
3474 struct v4l2_subdev *sd; in adv76xx_probe() local
3537 sd = &state->sd; in adv76xx_probe()
3538 v4l2_i2c_subdev_init(sd, client, &adv76xx_ops); in adv76xx_probe()
3539 snprintf(sd->name, sizeof(sd->name), "%s %d-%04x", in adv76xx_probe()
3542 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_HAS_EVENTS; in adv76xx_probe()
3543 sd->internal_ops = &adv76xx_int_ops; in adv76xx_probe()
3549 v4l2_err(sd, "Error configuring IO regmap region\n"); in adv76xx_probe()
3562 v4l2_err(sd, "Error %d reading IO Regmap\n", err); in adv76xx_probe()
3566 v4l2_err(sd, "not an ADV7604 on address 0x%x\n", in adv76xx_probe()
3577 v4l2_err(sd, "Error %d reading IO Regmap\n", err); in adv76xx_probe()
3585 v4l2_err(sd, "Error %d reading IO Regmap\n", err); in adv76xx_probe()
3591 v4l2_err(sd, "not an %s on address 0x%x\n", in adv76xx_probe()
3634 sd->ctrl_handler = hdl; in adv76xx_probe()
3639 if (adv76xx_s_detect_tx_5v_ctrl(sd)) { in adv76xx_probe()
3650 dummy_client = adv76xx_dummy_client(sd, i); in adv76xx_probe()
3653 v4l2_err(sd, "failed to create i2c client %u\n", i); in adv76xx_probe()
3668 sd->entity.function = MEDIA_ENT_F_DV_DECODER; in adv76xx_probe()
3670 err = media_entity_pads_init(&sd->entity, state->source_pad + 1, in adv76xx_probe()
3680 err = adv76xx_core_init(sd); in adv76xx_probe()
3703 v4l2_info(sd, "%s found @ 0x%x (%s)\n", client->name, in adv76xx_probe()
3706 err = v4l2_async_register_subdev(sd); in adv76xx_probe()
3713 media_entity_cleanup(&sd->entity); in adv76xx_probe()
3727 struct v4l2_subdev *sd = i2c_get_clientdata(client); in adv76xx_remove() local
3728 struct adv76xx_state *state = to_state(sd); in adv76xx_remove()
3731 io_write(sd, 0x40, 0); in adv76xx_remove()
3732 io_write(sd, 0x41, 0); in adv76xx_remove()
3733 io_write(sd, 0x46, 0); in adv76xx_remove()
3734 io_write(sd, 0x6e, 0); in adv76xx_remove()
3735 io_write(sd, 0x73, 0); in adv76xx_remove()
3738 v4l2_async_unregister_subdev(sd); in adv76xx_remove()
3739 media_entity_cleanup(&sd->entity); in adv76xx_remove()
3740 adv76xx_unregister_clients(to_state(sd)); in adv76xx_remove()
3741 v4l2_ctrl_handler_free(sd->ctrl_handler); in adv76xx_remove()