Lines Matching +full:p +full:- +full:state
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Support for LG Electronics LGDT3304 and LGDT3305 - VSB/QAM
18 MODULE_PARM_DESC(debug, "set debug level (info=1, reg=2 (or-able))");
54 /* ------------------------------------------------------------------------ */
101 static int lgdt3305_write_reg(struct lgdt3305_state *state, u16 reg, u8 val) in lgdt3305_write_reg() argument
106 .addr = state->cfg->i2c_addr, .flags = 0, in lgdt3305_write_reg()
112 ret = i2c_transfer(state->i2c_adap, &msg, 1); in lgdt3305_write_reg()
115 lg_err("error (addr %02x %02x <- %02x, err = %i)\n", in lgdt3305_write_reg()
120 return -EREMOTEIO; in lgdt3305_write_reg()
125 static int lgdt3305_read_reg(struct lgdt3305_state *state, u16 reg, u8 *val) in lgdt3305_read_reg() argument
130 { .addr = state->cfg->i2c_addr, in lgdt3305_read_reg()
132 { .addr = state->cfg->i2c_addr, in lgdt3305_read_reg()
138 ret = i2c_transfer(state->i2c_adap, msg, 2); in lgdt3305_read_reg()
142 state->cfg->i2c_addr, reg, ret); in lgdt3305_read_reg()
146 return -EREMOTEIO; in lgdt3305_read_reg()
151 #define read_reg(state, reg) \ argument
154 int ret = lgdt3305_read_reg(state, reg, &__val); \
160 static int lgdt3305_set_reg_bit(struct lgdt3305_state *state, in lgdt3305_set_reg_bit() argument
168 ret = lgdt3305_read_reg(state, reg, &val); in lgdt3305_set_reg_bit()
175 ret = lgdt3305_write_reg(state, reg, val); in lgdt3305_set_reg_bit()
185 static int lgdt3305_write_regs(struct lgdt3305_state *state, in lgdt3305_write_regs() argument
192 for (i = 0; i < len - 1; i++) { in lgdt3305_write_regs()
193 ret = lgdt3305_write_reg(state, regs[i].reg, regs[i].val); in lgdt3305_write_regs()
200 /* ------------------------------------------------------------------------ */
202 static int lgdt3305_soft_reset(struct lgdt3305_state *state) in lgdt3305_soft_reset() argument
208 ret = lgdt3305_set_reg_bit(state, LGDT3305_GEN_CTRL_3, 0, 0); in lgdt3305_soft_reset()
213 ret = lgdt3305_set_reg_bit(state, LGDT3305_GEN_CTRL_3, 0, 1); in lgdt3305_soft_reset()
218 static inline int lgdt3305_mpeg_mode(struct lgdt3305_state *state, in lgdt3305_mpeg_mode() argument
222 return lgdt3305_set_reg_bit(state, LGDT3305_TP_CTRL_1, 5, mode); in lgdt3305_mpeg_mode()
225 static int lgdt3305_mpeg_mode_polarity(struct lgdt3305_state *state) in lgdt3305_mpeg_mode_polarity() argument
229 enum lgdt3305_tp_clock_edge edge = state->cfg->tpclk_edge; in lgdt3305_mpeg_mode_polarity()
230 enum lgdt3305_tp_clock_mode mode = state->cfg->tpclk_mode; in lgdt3305_mpeg_mode_polarity()
231 enum lgdt3305_tp_valid_polarity valid = state->cfg->tpvalid_polarity; in lgdt3305_mpeg_mode_polarity()
235 ret = lgdt3305_read_reg(state, LGDT3305_TP_CTRL_1, &val); in lgdt3305_mpeg_mode_polarity()
248 ret = lgdt3305_write_reg(state, LGDT3305_TP_CTRL_1, val); in lgdt3305_mpeg_mode_polarity()
252 ret = lgdt3305_soft_reset(state); in lgdt3305_mpeg_mode_polarity()
257 static int lgdt3305_set_modulation(struct lgdt3305_state *state, in lgdt3305_set_modulation() argument
258 struct dtv_frontend_properties *p) in lgdt3305_set_modulation() argument
265 ret = lgdt3305_read_reg(state, LGDT3305_GEN_CTRL_1, &opermode); in lgdt3305_set_modulation()
271 switch (p->modulation) { in lgdt3305_set_modulation()
282 return -EINVAL; in lgdt3305_set_modulation()
284 ret = lgdt3305_write_reg(state, LGDT3305_GEN_CTRL_1, opermode); in lgdt3305_set_modulation()
289 static int lgdt3305_set_filter_extension(struct lgdt3305_state *state, in lgdt3305_set_filter_extension() argument
290 struct dtv_frontend_properties *p) in lgdt3305_set_filter_extension() argument
294 switch (p->modulation) { in lgdt3305_set_filter_extension()
303 return -EINVAL; in lgdt3305_set_filter_extension()
307 return lgdt3305_set_reg_bit(state, 0x043f, 2, val); in lgdt3305_set_filter_extension()
310 /* ------------------------------------------------------------------------ */
312 static int lgdt3305_passband_digital_agc(struct lgdt3305_state *state, in lgdt3305_passband_digital_agc() argument
313 struct dtv_frontend_properties *p) in lgdt3305_passband_digital_agc() argument
317 switch (p->modulation) { in lgdt3305_passband_digital_agc()
328 return -EINVAL; in lgdt3305_passband_digital_agc()
333 lgdt3305_write_reg(state, LGDT3305_DGTL_AGC_REF_1, agc_ref >> 8); in lgdt3305_passband_digital_agc()
334 lgdt3305_write_reg(state, LGDT3305_DGTL_AGC_REF_2, agc_ref & 0xff); in lgdt3305_passband_digital_agc()
339 static int lgdt3305_rfagc_loop(struct lgdt3305_state *state, in lgdt3305_rfagc_loop() argument
340 struct dtv_frontend_properties *p) in lgdt3305_rfagc_loop() argument
344 switch (p->modulation) { in lgdt3305_rfagc_loop()
355 * DT3304 and re-write this switch..case block */ in lgdt3305_rfagc_loop()
356 if (state->cfg->demod_chip == LGDT3304) in lgdt3305_rfagc_loop()
358 else /* (state->cfg->demod_chip == LGDT3305) */ in lgdt3305_rfagc_loop()
362 return -EINVAL; in lgdt3305_rfagc_loop()
365 if (state->cfg->rf_agc_loop) { in lgdt3305_rfagc_loop()
369 lgdt3305_write_reg(state, LGDT3305_AGC_DELAY_PT_1, in lgdt3305_rfagc_loop()
371 lgdt3305_write_reg(state, LGDT3305_AGC_DELAY_PT_2, in lgdt3305_rfagc_loop()
374 lgdt3305_write_reg(state, LGDT3305_RFAGC_LOOP_FLTR_BW_1, in lgdt3305_rfagc_loop()
376 lgdt3305_write_reg(state, LGDT3305_RFAGC_LOOP_FLTR_BW_2, in lgdt3305_rfagc_loop()
382 lgdt3305_write_reg(state, LGDT3305_IFBW_1, ifbw >> 8); in lgdt3305_rfagc_loop()
383 lgdt3305_write_reg(state, LGDT3305_IFBW_2, ifbw & 0xff); in lgdt3305_rfagc_loop()
389 static int lgdt3305_agc_setup(struct lgdt3305_state *state, in lgdt3305_agc_setup() argument
390 struct dtv_frontend_properties *p) in lgdt3305_agc_setup() argument
394 switch (p->modulation) { in lgdt3305_agc_setup()
405 return -EINVAL; in lgdt3305_agc_setup()
411 switch (state->cfg->demod_chip) { in lgdt3305_agc_setup()
413 lgdt3305_write_reg(state, 0x0314, 0xe1 | lockdten << 1); in lgdt3305_agc_setup()
414 lgdt3305_set_reg_bit(state, 0x030e, 2, acqen); in lgdt3305_agc_setup()
417 lgdt3305_write_reg(state, LGDT3305_AGC_CTRL_4, 0xe1 | lockdten << 1); in lgdt3305_agc_setup()
418 lgdt3305_set_reg_bit(state, LGDT3305_AGC_CTRL_1, 2, acqen); in lgdt3305_agc_setup()
421 return -EINVAL; in lgdt3305_agc_setup()
424 return lgdt3305_rfagc_loop(state, p); in lgdt3305_agc_setup()
427 static int lgdt3305_set_agc_power_ref(struct lgdt3305_state *state, in lgdt3305_set_agc_power_ref() argument
428 struct dtv_frontend_properties *p) in lgdt3305_set_agc_power_ref() argument
432 switch (p->modulation) { in lgdt3305_set_agc_power_ref()
434 if (state->cfg->usref_8vsb) in lgdt3305_set_agc_power_ref()
435 usref = state->cfg->usref_8vsb; in lgdt3305_set_agc_power_ref()
438 if (state->cfg->usref_qam64) in lgdt3305_set_agc_power_ref()
439 usref = state->cfg->usref_qam64; in lgdt3305_set_agc_power_ref()
442 if (state->cfg->usref_qam256) in lgdt3305_set_agc_power_ref()
443 usref = state->cfg->usref_qam256; in lgdt3305_set_agc_power_ref()
446 return -EINVAL; in lgdt3305_set_agc_power_ref()
452 lgdt3305_set_reg_bit(state, LGDT3305_AGC_CTRL_1, 3, 1); in lgdt3305_set_agc_power_ref()
454 lgdt3305_write_reg(state, LGDT3305_AGC_POWER_REF_1, in lgdt3305_set_agc_power_ref()
456 lgdt3305_write_reg(state, LGDT3305_AGC_POWER_REF_2, in lgdt3305_set_agc_power_ref()
462 /* ------------------------------------------------------------------------ */
464 static int lgdt3305_spectral_inversion(struct lgdt3305_state *state, in lgdt3305_spectral_inversion() argument
465 struct dtv_frontend_properties *p, in lgdt3305_spectral_inversion() argument
472 switch (p->modulation) { in lgdt3305_spectral_inversion()
474 ret = lgdt3305_write_reg(state, LGDT3305_CR_CTRL_7, in lgdt3305_spectral_inversion()
479 ret = lgdt3305_write_reg(state, LGDT3305_FEC_BLOCK_CTRL, in lgdt3305_spectral_inversion()
483 ret = -EINVAL; in lgdt3305_spectral_inversion()
488 static int lgdt3305_set_if(struct lgdt3305_state *state, in lgdt3305_set_if() argument
489 struct dtv_frontend_properties *p) in lgdt3305_set_if() argument
495 switch (p->modulation) { in lgdt3305_set_if()
497 if_freq_khz = state->cfg->vsb_if_khz; in lgdt3305_set_if()
501 if_freq_khz = state->cfg->qam_if_khz; in lgdt3305_set_if()
504 return -EINVAL; in lgdt3305_set_if()
509 switch (p->modulation) { in lgdt3305_set_if()
520 return -EINVAL; in lgdt3305_set_if()
529 lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_1, nco1); in lgdt3305_set_if()
530 lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_2, nco2); in lgdt3305_set_if()
531 lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_3, nco3); in lgdt3305_set_if()
532 lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_4, nco4); in lgdt3305_set_if()
534 lg_dbg("%d KHz -> [%02x%02x%02x%02x]\n", in lgdt3305_set_if()
540 /* ------------------------------------------------------------------------ */
544 struct lgdt3305_state *state = fe->demodulator_priv; in lgdt3305_i2c_gate_ctrl() local
546 if (state->cfg->deny_i2c_rptr) in lgdt3305_i2c_gate_ctrl()
551 return lgdt3305_set_reg_bit(state, LGDT3305_GEN_CTRL_2, 5, in lgdt3305_i2c_gate_ctrl()
557 struct lgdt3305_state *state = fe->demodulator_priv; in lgdt3305_sleep() local
562 gen_ctrl_3 = read_reg(state, LGDT3305_GEN_CTRL_3); in lgdt3305_sleep()
563 gen_ctrl_4 = read_reg(state, LGDT3305_GEN_CTRL_4); in lgdt3305_sleep()
567 /* tristate the IF-AGC pin */ in lgdt3305_sleep()
569 /* tristate the RF-AGC pin */ in lgdt3305_sleep()
577 lgdt3305_write_reg(state, LGDT3305_GEN_CTRL_3, gen_ctrl_3); in lgdt3305_sleep()
578 lgdt3305_write_reg(state, LGDT3305_GEN_CTRL_4, gen_ctrl_4); in lgdt3305_sleep()
585 struct lgdt3305_state *state = fe->demodulator_priv; in lgdt3305_init() local
649 switch (state->cfg->demod_chip) { in lgdt3305_init()
651 ret = lgdt3305_write_regs(state, lgdt3304_init_data, in lgdt3305_init()
655 ret = lgdt3305_write_regs(state, lgdt3305_init_data, in lgdt3305_init()
659 ret = -EINVAL; in lgdt3305_init()
664 ret = lgdt3305_soft_reset(state); in lgdt3305_init()
671 struct dtv_frontend_properties *p = &fe->dtv_property_cache; in lgdt3304_set_parameters() local
672 struct lgdt3305_state *state = fe->demodulator_priv; in lgdt3304_set_parameters() local
675 lg_dbg("(%d, %d)\n", p->frequency, p->modulation); in lgdt3304_set_parameters()
677 if (fe->ops.tuner_ops.set_params) { in lgdt3304_set_parameters()
678 ret = fe->ops.tuner_ops.set_params(fe); in lgdt3304_set_parameters()
679 if (fe->ops.i2c_gate_ctrl) in lgdt3304_set_parameters()
680 fe->ops.i2c_gate_ctrl(fe, 0); in lgdt3304_set_parameters()
683 state->current_frequency = p->frequency; in lgdt3304_set_parameters()
686 ret = lgdt3305_set_modulation(state, p); in lgdt3304_set_parameters()
690 ret = lgdt3305_passband_digital_agc(state, p); in lgdt3304_set_parameters()
694 ret = lgdt3305_agc_setup(state, p); in lgdt3304_set_parameters()
698 /* reg 0x030d is 3304-only... seen in vsb and qam usbsnoops... */ in lgdt3304_set_parameters()
699 switch (p->modulation) { in lgdt3304_set_parameters()
701 lgdt3305_write_reg(state, 0x030d, 0x00); in lgdt3304_set_parameters()
702 lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_1, 0x4f); in lgdt3304_set_parameters()
703 lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_2, 0x0c); in lgdt3304_set_parameters()
704 lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_3, 0xac); in lgdt3304_set_parameters()
705 lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_4, 0xba); in lgdt3304_set_parameters()
709 lgdt3305_write_reg(state, 0x030d, 0x14); in lgdt3304_set_parameters()
710 ret = lgdt3305_set_if(state, p); in lgdt3304_set_parameters()
715 return -EINVAL; in lgdt3304_set_parameters()
719 ret = lgdt3305_spectral_inversion(state, p, in lgdt3304_set_parameters()
720 state->cfg->spectral_inversion in lgdt3304_set_parameters()
725 state->current_modulation = p->modulation; in lgdt3304_set_parameters()
727 ret = lgdt3305_mpeg_mode(state, state->cfg->mpeg_mode); in lgdt3304_set_parameters()
732 ret = lgdt3305_mpeg_mode_polarity(state); in lgdt3304_set_parameters()
739 struct dtv_frontend_properties *p = &fe->dtv_property_cache; in lgdt3305_set_parameters() local
740 struct lgdt3305_state *state = fe->demodulator_priv; in lgdt3305_set_parameters() local
743 lg_dbg("(%d, %d)\n", p->frequency, p->modulation); in lgdt3305_set_parameters()
745 if (fe->ops.tuner_ops.set_params) { in lgdt3305_set_parameters()
746 ret = fe->ops.tuner_ops.set_params(fe); in lgdt3305_set_parameters()
747 if (fe->ops.i2c_gate_ctrl) in lgdt3305_set_parameters()
748 fe->ops.i2c_gate_ctrl(fe, 0); in lgdt3305_set_parameters()
751 state->current_frequency = p->frequency; in lgdt3305_set_parameters()
754 ret = lgdt3305_set_modulation(state, p); in lgdt3305_set_parameters()
758 ret = lgdt3305_passband_digital_agc(state, p); in lgdt3305_set_parameters()
761 ret = lgdt3305_set_agc_power_ref(state, p); in lgdt3305_set_parameters()
764 ret = lgdt3305_agc_setup(state, p); in lgdt3305_set_parameters()
769 ret = lgdt3305_write_reg(state, LGDT3305_GEN_CONTROL, 0x2f); in lgdt3305_set_parameters()
772 ret = lgdt3305_set_reg_bit(state, LGDT3305_CR_CTR_FREQ_1, 6, 1); in lgdt3305_set_parameters()
776 ret = lgdt3305_set_if(state, p); in lgdt3305_set_parameters()
779 ret = lgdt3305_spectral_inversion(state, p, in lgdt3305_set_parameters()
780 state->cfg->spectral_inversion in lgdt3305_set_parameters()
785 ret = lgdt3305_set_filter_extension(state, p); in lgdt3305_set_parameters()
789 state->current_modulation = p->modulation; in lgdt3305_set_parameters()
791 ret = lgdt3305_mpeg_mode(state, state->cfg->mpeg_mode); in lgdt3305_set_parameters()
796 ret = lgdt3305_mpeg_mode_polarity(state); in lgdt3305_set_parameters()
802 struct dtv_frontend_properties *p) in lgdt3305_get_frontend() argument
804 struct lgdt3305_state *state = fe->demodulator_priv; in lgdt3305_get_frontend() local
808 p->modulation = state->current_modulation; in lgdt3305_get_frontend()
809 p->frequency = state->current_frequency; in lgdt3305_get_frontend()
813 /* ------------------------------------------------------------------------ */
815 static int lgdt3305_read_cr_lock_status(struct lgdt3305_state *state, in lgdt3305_read_cr_lock_status() argument
824 ret = lgdt3305_read_reg(state, LGDT3305_CR_LOCK_STATUS, &val); in lgdt3305_read_cr_lock_status()
828 switch (state->current_modulation) { in lgdt3305_read_cr_lock_status()
848 cr_lock_state = "CLOCKQAM-INVALID!"; in lgdt3305_read_cr_lock_status()
859 ret = -EINVAL; in lgdt3305_read_cr_lock_status()
866 static int lgdt3305_read_fec_lock_status(struct lgdt3305_state *state, in lgdt3305_read_fec_lock_status() argument
874 switch (state->current_modulation) { in lgdt3305_read_fec_lock_status()
877 ret = lgdt3305_read_reg(state, in lgdt3305_read_fec_lock_status()
895 ret = -EINVAL; in lgdt3305_read_fec_lock_status()
903 struct lgdt3305_state *state = fe->demodulator_priv; in lgdt3305_read_status() local
910 ret = lgdt3305_read_reg(state, LGDT3305_GEN_STATUS, &val); in lgdt3305_read_status()
927 ret = lgdt3305_read_cr_lock_status(state, &cr_lock); in lgdt3305_read_status()
940 switch (state->current_modulation) { in lgdt3305_read_status()
944 if (((LGDT3304 == state->cfg->demod_chip)) && (cr_lock)) in lgdt3305_read_status()
947 ret = lgdt3305_read_fec_lock_status(state, &fec_lock); in lgdt3305_read_status()
959 ret = -EINVAL; in lgdt3305_read_status()
965 /* ------------------------------------------------------------------------ */
980 return 10*(c - mse); in calculate_snr()
985 struct lgdt3305_state *state = fe->demodulator_priv; in lgdt3305_read_snr() local
987 u32 c; /* per-modulation SNR calculation constant */ in lgdt3305_read_snr()
989 switch (state->current_modulation) { in lgdt3305_read_snr()
992 /* Use Phase Tracker Mean-Square Error Register */ in lgdt3305_read_snr()
993 /* SNR for ranges from -13.11 to +44.08 */ in lgdt3305_read_snr()
994 noise = ((read_reg(state, LGDT3305_PT_MSE_1) & 0x07) << 16) | in lgdt3305_read_snr()
995 (read_reg(state, LGDT3305_PT_MSE_2) << 8) | in lgdt3305_read_snr()
996 (read_reg(state, LGDT3305_PT_MSE_3) & 0xff); in lgdt3305_read_snr()
999 /* Use Equalizer Mean-Square Error Register */ in lgdt3305_read_snr()
1000 /* SNR for ranges from -16.12 to +44.08 */ in lgdt3305_read_snr()
1001 noise = ((read_reg(state, LGDT3305_EQ_MSE_1) & 0x0f) << 16) | in lgdt3305_read_snr()
1002 (read_reg(state, LGDT3305_EQ_MSE_2) << 8) | in lgdt3305_read_snr()
1003 (read_reg(state, LGDT3305_EQ_MSE_3) & 0xff); in lgdt3305_read_snr()
1009 noise = (read_reg(state, LGDT3305_CR_MSE_1) << 8) | in lgdt3305_read_snr()
1010 (read_reg(state, LGDT3305_CR_MSE_2) & 0xff); in lgdt3305_read_snr()
1012 c = (state->current_modulation == QAM_64) ? in lgdt3305_read_snr()
1017 return -EINVAL; in lgdt3305_read_snr()
1019 state->snr = calculate_snr(noise, c); in lgdt3305_read_snr()
1021 *snr = (state->snr / ((1 << 24) / 10)); in lgdt3305_read_snr()
1023 state->snr >> 24, (((state->snr >> 8) & 0xffff) * 100) >> 16); in lgdt3305_read_snr()
1038 struct lgdt3305_state *state = fe->demodulator_priv; in lgdt3305_read_signal_strength() local
1044 ret = fe->ops.read_snr(fe, &snr); in lgdt3305_read_signal_strength()
1047 /* Rather than use the 8.8 value snr, use state->snr which is 8.24 */ in lgdt3305_read_signal_strength()
1048 /* scale the range 0 - 35*2^24 into 0 - 65535 */ in lgdt3305_read_signal_strength()
1049 if (state->snr >= 8960 * 0x10000) in lgdt3305_read_signal_strength()
1052 *strength = state->snr / 8960; in lgdt3305_read_signal_strength()
1057 /* ------------------------------------------------------------------------ */
1067 struct lgdt3305_state *state = fe->demodulator_priv; in lgdt3305_read_ucblocks() local
1070 (read_reg(state, LGDT3305_FEC_PKT_ERR_1) << 8) | in lgdt3305_read_ucblocks()
1071 (read_reg(state, LGDT3305_FEC_PKT_ERR_2) & 0xff); in lgdt3305_read_ucblocks()
1080 fe_tune_settings->min_delay_ms = 500; in lgdt3305_get_tune_settings()
1087 struct lgdt3305_state *state = fe->demodulator_priv; in lgdt3305_release() local
1089 kfree(state); in lgdt3305_release()
1098 struct lgdt3305_state *state = NULL; in lgdt3305_attach() local
1102 lg_dbg("(%d-%04x)\n", in lgdt3305_attach()
1104 config ? config->i2c_addr : 0); in lgdt3305_attach()
1106 state = kzalloc(sizeof(struct lgdt3305_state), GFP_KERNEL); in lgdt3305_attach()
1107 if (state == NULL) in lgdt3305_attach()
1110 state->cfg = config; in lgdt3305_attach()
1111 state->i2c_adap = i2c_adap; in lgdt3305_attach()
1113 switch (config->demod_chip) { in lgdt3305_attach()
1115 memcpy(&state->frontend.ops, &lgdt3304_ops, in lgdt3305_attach()
1119 memcpy(&state->frontend.ops, &lgdt3305_ops, in lgdt3305_attach()
1125 state->frontend.demodulator_priv = state; in lgdt3305_attach()
1128 ret = lgdt3305_read_reg(state, LGDT3305_GEN_CTRL_2, &val); in lgdt3305_attach()
1131 ret = lgdt3305_write_reg(state, 0x0808, 0x80); in lgdt3305_attach()
1134 ret = lgdt3305_read_reg(state, 0x0808, &val); in lgdt3305_attach()
1137 ret = lgdt3305_write_reg(state, 0x0808, 0x00); in lgdt3305_attach()
1141 state->current_frequency = -1; in lgdt3305_attach()
1142 state->current_modulation = -1; in lgdt3305_attach()
1144 return &state->frontend; in lgdt3305_attach()
1147 config->demod_chip ? "LGDT3304" : "LGDT3305"); in lgdt3305_attach()
1148 kfree(state); in lgdt3305_attach()
1199 MODULE_DESCRIPTION("LG Electronics LGDT3304/5 ATSC/QAM-B Demodulator Driver");