138 struct hfc_multi {  struct
151 	void		(*HFC_outb)(struct hfc_multi *hc, u_char reg,  argument
153 	void		(*HFC_outb_nodebug)(struct hfc_multi *hc, u_char reg,  argument
155 	u_char		(*HFC_inb)(struct hfc_multi *hc, u_char reg,  argument
157 	u_char		(*HFC_inb_nodebug)(struct hfc_multi *hc, u_char reg,  argument
159 	u_short		(*HFC_inw)(struct hfc_multi *hc, u_char reg,  argument
161 	u_short		(*HFC_inw_nodebug)(struct hfc_multi *hc, u_char reg,  argument
163 	void		(*HFC_wait)(struct hfc_multi *hc,  argument
165 	void		(*HFC_wait_nodebug)(struct hfc_multi *hc,  argument
168 	void		(*HFC_outb)(struct hfc_multi *hc, u_char reg,  argument
170 	void		(*HFC_outb_nodebug)(struct hfc_multi *hc, u_char reg,  argument
172 	u_char		(*HFC_inb)(struct hfc_multi *hc, u_char reg);  argument
173 	u_char		(*HFC_inb_nodebug)(struct hfc_multi *hc, u_char reg);  argument
174 	u_short		(*HFC_inw)(struct hfc_multi *hc, u_char reg);  argument
175 	u_short		(*HFC_inw_nodebug)(struct hfc_multi *hc, u_char reg);  argument
176 	void		(*HFC_wait)(struct hfc_multi *hc);  argument
177 	void		(*HFC_wait_nodebug)(struct hfc_multi *hc);  argument
179 	void		(*read_fifo)(struct hfc_multi *hc, u_char *data,  argument
181 	void		(*write_fifo)(struct hfc_multi *hc, u_char *data,  argument
183 	u_long		pci_origmembase, plx_origmembase;
184 	void __iomem	*pci_membase; /* PCI memory */
185 	void __iomem	*plx_membase; /* PLX memory */
186 	u_long		xhfc_origmembase;
187 	u_char		*xhfc_membase;
188 	u_long		*xhfc_memaddr, *xhfc_memdata;
190 	struct immap	*immap;
192 	u_long		pb_irqmsk;	/* Portbit mask to check the IRQ line */
193 	u_long		pci_iobase; /* PCI IO */
194 	struct hfcm_hw	hw;	/* remember data of write-only-registers */
196 	u_long		chip;	/* chip configuration */
197 	int		masterclk; /* port that provides master clock -1=off */
198 	unsigned char	silence;/* silence byte */
199 	unsigned char	silence_data[128];/* silence block */
200 	int		dtmf;	/* flag that dtmf is currently in process */
201 	int		Flen;	/* F-buffer size */
202 	int		Zlen;	/* Z-buffer size (must be int for calculation)*/
203 	int		max_trans; /* maximum transparent fifo fill */
204 	int		Zmin;	/* Z-buffer offset */
205 	int		DTMFbase; /* base address of DTMF coefficients */
207 	u_int		slots;	/* number of PCM slots */
208 	u_int		leds;	/* type of leds */
209 	u_long		ledstate; /* save last state of leds */
210 	int		opticalsupport; /* has the e1 board */
213 	u_int		bmask[32]; /* bitmask of bchannels for port */
214 	u_char		dnum[32]; /* array of used dchannel numbers for port */
215 	u_char		created[32]; /* what port is created */
216 	u_int		activity_tx; /* if there is data TX / RX */
217 	u_int		activity_rx; /* bitmask according to port number */
220 	u_int		flash[8]; /* counter for flashing 8 leds on activity */
222 	u_long		wdcount;	/* every 500 ms we need to */
224 	u_char		wdbyte; /* watchdog toggle byte */
225 	int		e1_state; /* keep track of last state */
226 	int		e1_getclock; /* if sync is retrieved from interface */
227 	int		syncronized; /* keep track of existing sync interface */
228 	int		e1_resync; /* resync jobs */
230 	spinlock_t	lock;	/* the lock */
232 	struct mISDNclock *iclock; /* isdn clock support */
233 	int		iclock_on;
240 	struct hfc_chan	chan[32];
241 	signed char	slot_owner[256]; /* owner channel of slot */