Lines Matching +full:meson +full:- +full:gpio +full:- +full:intc
1 # SPDX-License-Identifier: GPL-2.0-only
119 tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver"
127 tristate "Broadcom STB 7120-style L2 interrupt controller driver"
181 will be called irq-lan966x-oic.
222 bool "J-Core integrated AIC" if COMPILE_TEST
226 Support for the J-Core integrated AIC.
233 bool "Renesas INTC External IRQ Pin Support" if COMPILE_TEST
237 interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs.
240 bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST
245 devices, as found on R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs.
302 tristate "TS-4800 IRQ controller"
307 Support for the TS-4800 FPGA IRQ controller
447 tristate "Meson GPIO Interrupt Multiplexer"
452 Support Meson SoC Family GPIO Interrupt Multiplexer
484 Say yes here to enable C-SKY SMP interrupt controller driver used
485 for C-SKY SMP system.
490 bool "C-SKY APB Interrupt Controller"
493 Say yes here to enable C-SKY APB interrupt controller driver used
494 by C-SKY single core SOC system. It uses mmio map apb-bus to visit
523 CPU-to-CPU MSI controller. This requires a specially crafted DT
529 bool "Loongson-1 Interrupt Controller"
535 Support for the Loongson-1 platform Interrupt Controller.
566 This enables support for the PRU-ICSS Local Interrupt Controller
567 present within a PRU-ICSS subsystem present on various TI SoCs.
568 The PRUSS INTC enables various interrupts to be routed to multiple
613 This enables support for the INTC chip found in StarFive JH8100
619 bool "THEAD C9XX ACLINT S-mode IPI Interrupt Controller"
625 This enables support for T-HEAD specific ACLINT SSWI device
651 Documentation/arch/loongarch/irq-chip-model.rst.
679 Support for the Loongson-3 HyperTransport PIC Controller.
760 SP7021 SoC has 2 Chips: C-Chip & P-Chip. This is used as a
761 chained controller, routing all interrupt source in P-Chip to
762 the primary controller on C-Chip.