1 /* SPDX-License-Identifier: GPL-2.0 */
3  * pasid.h - PASID idr, table and entry header
22 #define is_pasid_enabled(entry)		(((entry)->lo >> 3) & 0x1)
23 #define get_pasid_dir_size(entry)	(1 << ((((entry)->lo >> 9) & 0x7) + 7))
29  * The PASID_FLAG_FL5LP flag Indicates using 5-level paging for first-
30  * level translation, otherwise, 4-level paging will be used.
57 	return READ_ONCE(pde->val) & PASID_PTE_PRESENT;  in pasid_pde_is_present()
67 	return phys_to_virt(READ_ONCE(pde->val) & PDE_PFN_MASK);  in get_pasid_table_from_pde()
73 	return READ_ONCE(pte->val[0]) & PASID_PTE_PRESENT;  in pasid_pte_is_present()
79 	return READ_ONCE(pte->val[0]) & PASID_PTE_FPD;  in pasid_pte_is_fault_disabled()
85 	return (u16)((READ_ONCE(pte->val[0]) >> 6) & 0x7);  in pasid_pte_get_pgtt()
90 	WRITE_ONCE(pe->val[0], 0);  in pasid_clear_entry()
91 	WRITE_ONCE(pe->val[1], 0);  in pasid_clear_entry()
92 	WRITE_ONCE(pe->val[2], 0);  in pasid_clear_entry()
93 	WRITE_ONCE(pe->val[3], 0);  in pasid_clear_entry()
94 	WRITE_ONCE(pe->val[4], 0);  in pasid_clear_entry()
95 	WRITE_ONCE(pe->val[5], 0);  in pasid_clear_entry()
96 	WRITE_ONCE(pe->val[6], 0);  in pasid_clear_entry()
97 	WRITE_ONCE(pe->val[7], 0);  in pasid_clear_entry()
102 	WRITE_ONCE(pe->val[0], PASID_PTE_FPD);  in pasid_clear_entry_with_fpd()
103 	WRITE_ONCE(pe->val[1], 0);  in pasid_clear_entry_with_fpd()
104 	WRITE_ONCE(pe->val[2], 0);  in pasid_clear_entry_with_fpd()
105 	WRITE_ONCE(pe->val[3], 0);  in pasid_clear_entry_with_fpd()
106 	WRITE_ONCE(pe->val[4], 0);  in pasid_clear_entry_with_fpd()
107 	WRITE_ONCE(pe->val[5], 0);  in pasid_clear_entry_with_fpd()
108 	WRITE_ONCE(pe->val[6], 0);  in pasid_clear_entry_with_fpd()
109 	WRITE_ONCE(pe->val[7], 0);  in pasid_clear_entry_with_fpd()
132 	pasid_set_bits(&pe->val[1], GENMASK_ULL(15, 0), value);  in pasid_set_domain_id()
141 	return (u16)(READ_ONCE(pe->val[1]) & GENMASK_ULL(15, 0));  in pasid_get_domain_id()
145  * Setup the SLPTPTR(Second Level Page Table Pointer) field (Bit 12~63)
151 	pasid_set_bits(&pe->val[0], VTD_PAGE_MASK, value);  in pasid_set_slptr()
161 	pasid_set_bits(&pe->val[0], GENMASK_ULL(4, 2), value << 2);  in pasid_set_address_width()
171 	pasid_set_bits(&pe->val[0], GENMASK_ULL(8, 6), value << 6);  in pasid_set_translation_type()
180 	pasid_set_bits(&pe->val[0], 1 << 1, 0);  in pasid_set_fault_enable()
184  * Enable second level A/D bits by setting the SLADE (Second Level
190 	pasid_set_bits(&pe->val[0], 1 << 9, 1 << 9);  in pasid_set_ssade()
194  * Disable second level A/D bits by clearing the SLADE (Second Level
200 	pasid_set_bits(&pe->val[0], 1 << 9, 0);  in pasid_clear_ssade()
204  * Checks if second level A/D bits specifically the SLADE (Second Level
210 	return pasid_get_bits(&pe->val[0]) & (1 << 9);  in pasid_get_ssade()
219 	pasid_set_bits(&pe->val[2], 1 << 0, 1);  in pasid_set_sre()
228 	pasid_set_bits(&pe->val[2], 1 << 4, 1 << 4);  in pasid_set_wpe()
237 	pasid_set_bits(&pe->val[0], 1 << 0, 1);  in pasid_set_present()
246 	pasid_set_bits(&pe->val[1], 1 << 23, value << 23);  in pasid_set_page_snoop()
256 	pasid_set_bits(&pe->val[1], 1ULL << 24, 1ULL << 24);  in pasid_set_pgsnp()
260  * Setup the First Level Page table Pointer field (Bit 140~191)
266 	pasid_set_bits(&pe->val[2], VTD_PAGE_MASK, value);  in pasid_set_flptr()
270  * Setup the First Level Paging Mode field (Bit 130~131) of a
276 	pasid_set_bits(&pe->val[2], GENMASK_ULL(3, 2), value << 2);  in pasid_set_flpm()
285 	pasid_set_bits(&pe->val[2], 1 << 7, 1 << 7);  in pasid_set_eafe()
289 int intel_pasid_alloc_table(struct device *dev);
290 void intel_pasid_free_table(struct device *dev);
291 struct pasid_table *intel_pasid_get_table(struct device *dev);
293 				  struct device *dev, pgd_t *pgd,
297 				   struct device *dev, u32 pasid);
299 				     struct device *dev, u32 pasid,
302 				   struct device *dev, u32 pasid);
303 int intel_pasid_setup_nested(struct intel_iommu *iommu, struct device *dev,
306 				    struct device *dev, pgd_t *pgd,
311 				     struct device *dev, u16 old_did,
314 				     struct device *dev, u16 old_did,
317 			       struct device *dev, u32 pasid,
321 				 struct device *dev, u32 pasid,
324 					  struct device *dev, u32 pasid);
325 int intel_pasid_setup_sm_context(struct device *dev);
326 void intel_pasid_teardown_sm_context(struct device *dev);