1 /* SPDX-License-Identifier: GPL-2.0-only */
104 /* CR1 cacheability fields don't quite follow the usual TCR-style encoding */
185 #define Q_IDX(llq, p)			((p) & ((1 << (llq)->max_n_shift) - 1))
186 #define Q_WRP(llq, p)			((p) & (1 << (llq)->max_n_shift))
189 #define Q_ENT(q, p)			((q)->base +			\
190 					 Q_IDX(&((q)->llq), p) *	\
191 					 (q)->ent_dwords)
381 #define CMDQ_MAX_SZ_SHIFT		(Q_MAX_SZ_SHIFT - CMDQ_ENT_SZ_SHIFT)
451 #define EVTQ_MAX_SZ_SHIFT		(Q_MAX_SZ_SHIFT - EVTQ_ENT_SZ_SHIFT)
487 #define PRIQ_MAX_SZ_SHIFT		(Q_MAX_SZ_SHIFT - PRIQ_ENT_SZ_SHIFT)
501 /* High-level queue structures */
519 	/* Command-specific fields */
588 		} sync;  member
637 static inline bool arm_smmu_cmdq_supports_cmd(struct arm_smmu_cmdq *cmdq,  in arm_smmu_cmdq_supports_cmd()  argument
640 	return cmdq->supports_cmd ? cmdq->supports_cmd(ent) : true;  in arm_smmu_cmdq_supports_cmd()
645 	struct arm_smmu_cmdq		*cmdq;  member
659 /* High-level stream table and context descriptor structures */
687 	return cfg->linear.table || cfg->l2.l1tab;  in arm_smmu_cdtab_allocated()
693 	return cd_table->used_ssids;  in arm_smmu_ssids_in_use()
766 	struct arm_smmu_cmdq		cmdq;  member
884 	void (*sync)(struct arm_smmu_entry_writer *writer);  member
953 			      struct arm_smmu_cmdq *cmdq);
959 		       struct arm_smmu_cmdq *cmdq);
963 	return dev_iommu_fwspec_get(master->dev)->flags &  in arm_smmu_master_canwbs()
985 				struct arm_smmu_cmdq *cmdq, u64 *cmds, int n,
986 				bool sync);
1016 	return -ENODEV;  in arm_smmu_master_enable_sva()
1021 	return -ENODEV;  in arm_smmu_master_disable_sva()
1041 	return ERR_PTR(-ENODEV);  in tegra241_cmdqv_probe()