26 	struct iio_backend *back;  member
39 	ret = st->data->bus_reg_read(st->back, reg, &rval, xfer_size);  in ad3552r_qspi_update_reg_bits()
45 	return st->data->bus_reg_write(st->back, reg, rval, xfer_size);  in ad3552r_qspi_update_reg_bits()
68 		ret = st->data->bus_reg_read(st->back,  in ad3552r_hs_read_raw()
97 			return st->data->bus_reg_write(st->back,  in ad3552r_hs_write_raw()
135 	ret = st->data->bus_reg_write(st->back, AD3552R_REG_ADDR_STREAM_MODE,  in ad3552r_hs_buffer_postenable()
149 	ret = iio_backend_ddr_enable(st->back);  in ad3552r_hs_buffer_postenable()
155 	ret = iio_backend_data_transfer_addr(st->back, val);  in ad3552r_hs_buffer_postenable()
159 	ret = iio_backend_data_format_set(st->back, 0, &fmt);  in ad3552r_hs_buffer_postenable()
163 	ret = iio_backend_data_stream_enable(st->back);  in ad3552r_hs_buffer_postenable()
175 	iio_backend_ddr_disable(st->back);  in ad3552r_hs_buffer_postenable()
185 	ret = iio_backend_data_stream_disable(st->back);  in ad3552r_hs_buffer_predisable()
197 	ret = iio_backend_ddr_disable(st->back);  in ad3552r_hs_buffer_predisable()
249 	ret = st->data->bus_reg_write(st->back, AD3552R_REG_ADDR_SCRATCH_PAD,  in ad3552r_hs_scratch_pad_test()
254 	ret = st->data->bus_reg_read(st->back, AD3552R_REG_ADDR_SCRATCH_PAD,  in ad3552r_hs_scratch_pad_test()
264 	ret = st->data->bus_reg_write(st->back, AD3552R_REG_ADDR_SCRATCH_PAD,  in ad3552r_hs_scratch_pad_test()
269 	ret = st->data->bus_reg_read(st->back, AD3552R_REG_ADDR_SCRATCH_PAD,  in ad3552r_hs_scratch_pad_test()
287 	ret = st->data->bus_reg_write(st->back, AD3552R_REG_ADDR_CH_OFFSET(ch),  in ad3552r_hs_setup_custom_gain()
292 	return st->data->bus_reg_write(st->back, AD3552R_REG_ADDR_CH_GAIN(ch),  in ad3552r_hs_setup_custom_gain()
307 	ret = iio_backend_ddr_disable(st->back);  in ad3552r_hs_setup()
315 	ret = st->data->bus_reg_read(st->back, AD3552R_REG_ADDR_PRODUCT_ID_L,  in ad3552r_hs_setup()
322 	ret = st->data->bus_reg_read(st->back, AD3552R_REG_ADDR_PRODUCT_ID_H,  in ad3552r_hs_setup()
333 	ret = st->data->bus_reg_write(st->back, AD3552R_REG_ADDR_ERR_STATUS,  in ad3552r_hs_setup()
338 	ret = st->data->bus_reg_write(st->back,  in ad3552r_hs_setup()
344 	ret = st->data->bus_reg_write(st->back,  in ad3552r_hs_setup()
352 	ret = iio_backend_data_source_set(st->back, 0, IIO_BACKEND_EXTERNAL);  in ad3552r_hs_setup()
356 	ret = iio_backend_data_source_set(st->back, 1, IIO_BACKEND_EXTERNAL);  in ad3552r_hs_setup()
477 	st->back = devm_iio_backend_get(&pdev->dev, NULL);  in ad3552r_hs_probe()
478 	if (IS_ERR(st->back))  in ad3552r_hs_probe()
479 		return PTR_ERR(st->back);  in ad3552r_hs_probe()
481 	ret = devm_iio_backend_enable(&pdev->dev, st->back);  in ad3552r_hs_probe()
496 	ret = devm_iio_backend_request_buffer(&pdev->dev, st->back, indio_dev);  in ad3552r_hs_probe()