1 // SPDX-License-Identifier: GPL-2.0
19 #define AD7616_OS_MASK			GENMASK(4, 2)
26  * 0, 1, 2, 3 in a register followed by 4, 5, 6, 7 in second register.
27  * For channels from second group(8-15) the order is the same, only with
40  * Each register stores range for 2 channels(4 bits per channel).
42 #define AD7606_RANGE_CH_MSK(ch)		(GENMASK(3, 0) << (4 * ((ch) & 0x1)))
44 	((GENMASK(3, 0) & mode) << (4 * ((ch) & 0x1)))
54 	AD7616_CHANNEL(4),
74 	AD7606_SW_CHANNEL(4, 16),
86 	AD7606_SW_CHANNEL(4, 18),
93 	1, 2, 4, 8, 16, 32, 64, 128, 256
125 		dev_err(&spi->dev, "SPI read error\n");  in ad7606_spi_read_block()
163 	struct spi_device *spi = to_spi_device(st->dev);  in ad7606_spi_reg_read()
166 			.tx_buf = &st->d16[0],  in ad7606_spi_reg_read()
170 			.rx_buf = &st->d16[1],  in ad7606_spi_reg_read()
176 	st->d16[0] = cpu_to_be16(st->bops->rd_wr_cmd(addr, 0) << 8);  in ad7606_spi_reg_read()
182 	return be16_to_cpu(st->d16[1]);  in ad7606_spi_reg_read()
189 	struct spi_device *spi = to_spi_device(st->dev);  in ad7606_spi_reg_write()
191 	st->d16[0] = cpu_to_be16((st->bops->rd_wr_cmd(addr, 1) << 8) |  in ad7606_spi_reg_write()
194 	return spi_write(spi, &st->d16[0], sizeof(st->d16[0]));  in ad7606_spi_reg_write()
204 	readval = st->bops->reg_read(st, addr);  in ad7606_spi_write_mask()
211 	return st->bops->reg_write(st, addr, readval);  in ad7606_spi_write_mask()
222 	 * The range of channels from A are stored in registers with address 4  in ad7616_write_scale_sw()
238 	return st->bops->write_mask(st, ch_addr, AD7616_RANGE_CH_MSK(ch_index),  in ad7616_write_scale_sw()
246 	return st->bops->write_mask(st, AD7616_CONFIGURATION_REGISTER,  in ad7616_write_os_sw()
275 	indio_dev->channels = ad7616_sw_channels;  in ad7616_sw_mode_config()
277 	st->write_scale = ad7616_write_scale_sw;  in ad7616_sw_mode_config()
278 	st->write_os = &ad7616_write_os_sw;  in ad7616_sw_mode_config()
281 	return st->bops->write_mask(st,  in ad7616_sw_mode_config()
299 	if (st->gpio_os) {  in ad7606B_sw_mode_config()
300 		gpiod_set_array_value(st->gpio_os->ndescs,  in ad7606B_sw_mode_config()
301 				      st->gpio_os->desc, st->gpio_os->info, os);  in ad7606B_sw_mode_config()
304 	st->oversampling_avail = ad7606B_oversampling_avail;  in ad7606B_sw_mode_config()
305 	st->num_os_ratios = ARRAY_SIZE(ad7606B_oversampling_avail);  in ad7606B_sw_mode_config()
307 	st->write_scale = ad7606_write_scale_sw;  in ad7606B_sw_mode_config()
308 	st->write_os = &ad7606_write_os_sw;  in ad7606B_sw_mode_config()
311 	st->bops->reg_write(st,  in ad7606B_sw_mode_config()
319 	indio_dev->channels = ad7606b_sw_channels;  in ad7606B_sw_mode_config()
332 	indio_dev->channels = ad7606c_18_sw_channels;  in ad7606c_18_sw_mode_config()
435 	return ad7606_probe(&spi->dev, spi->irq, NULL,  in ad7606_spi_probe()
436 			    bus_info->chip_info, bus_info->bops);  in ad7606_spi_probe()
440 	{ "ad7605-4", (kernel_ulong_t)&ad7605_4_bus_info },
441 	{ "ad7606-4", (kernel_ulong_t)&ad7606_4_bus_info },
442 	{ "ad7606-6", (kernel_ulong_t)&ad7606_6_bus_info },
443 	{ "ad7606-8", (kernel_ulong_t)&ad7606_8_bus_info },
445 	{ "ad7606c-16", (kernel_ulong_t)&ad7606c_16_bus_info },
446 	{ "ad7606c-18", (kernel_ulong_t)&ad7606c_18_bus_info },
456 	{ .compatible = "adi,ad7605-4", .data = &ad7605_4_bus_info },
457 	{ .compatible = "adi,ad7606-4", .data = &ad7606_4_bus_info },
458 	{ .compatible = "adi,ad7606-6", .data = &ad7606_6_bus_info },
459 	{ .compatible = "adi,ad7606-8", .data = &ad7606_8_bus_info },
461 	{ .compatible = "adi,ad7606c-16", .data = &ad7606c_16_bus_info },
462 	{ .compatible = "adi,ad7606c-18", .data = &ad7606c_18_bus_info },