Lines Matching +full:pseudo +full:- +full:differential
1 // SPDX-License-Identifier: GPL-2.0-only
9 * ad7380/1 : https://www.analog.com/media/en/technical-documentation/data-sheets/AD7380-7381.pdf
10 * ad7383/4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7383-7384.pdf
11 …* ad7386/7/8 : https://www.analog.com/media/en/technical-documentation/data-sheets/AD7386-7387-738…
12 * ad7380-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7380-4.pdf
13 * ad7381-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7381-4.pdf
14 …* ad7383/4-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7383-4-ad7384…
15 …* ad7386/7/8-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7386-4-7387…
16 * adaq4370-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/adaq4370-4.pdf
17 * adaq4380-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/adaq4380-4.pdf
120 /* Extended scan types for 12-bit unsigned chips. */
136 /* Extended scan types for 14-bit signed chips. */
152 /* Extended scan types for 14-bit unsigned chips. */
168 /* Extended scan types for 16-bit signed_chips. */
184 /* Extended scan types for 16-bit unsigned chips. */
210 .differential = (diff), \
263 /* fully differential */
269 /* pseudo differential */
288 "ldo", "vcc", "vlogic", "vs-p", "vs-n", "refin",
314 * export 4 channels and ad7386-4/7-4/8-4 export 8 channels.
317 * (i.e 0-1 or 0-3) and inputs AinX1 correspond to second half (i.e 2-3 or
318 * 4-7). Example for AD7386/7/8 (2 channels parts):
321 * | +----------------------------
324 * voltage0 | AinA0 --|--->| | | |
325 * | | | mux |----->| ADCA |---
326 * voltage2 | AinA1 --|--->| | | |
330 * voltage1 | AinB0 --|--->| | | |
331 * | | | mux |----->| ADCB |---
332 * voltage3 | AinB1 --|--->| | | |
335 * | +----------------------------
471 .name = "ad7380-4",
483 .name = "ad7381-4",
494 .name = "ad7383-4",
507 .name = "ad7384-4",
520 .name = "ad7386-4",
532 .name = "ad7387-4",
544 .name = "ad7388-4",
556 .name = "adaq4370-4",
569 .name = "adaq4380-4",
601 * Make the buffer large enough for MAX_NUM_CHANNELS 32-bit samples and
602 * one 64-bit aligned 64-bit timestamp.
619 .tx_buf = &st->tx, in ad7380_regmap_reg_write()
622 st->tx = FIELD_PREP(AD7380_REG_WR, 1) | in ad7380_regmap_reg_write()
626 return spi_sync_transfer(st->spi, &xfer, 1); in ad7380_regmap_reg_write()
638 .tx_buf = &st->tx, in ad7380_regmap_reg_read()
641 .value = st->chip_info->timing_specs->t_csh_ns, in ad7380_regmap_reg_read()
648 .rx_buf = &st->rx, in ad7380_regmap_reg_read()
653 st->tx = FIELD_PREP(AD7380_REG_WR, 0) | in ad7380_regmap_reg_read()
657 ret = spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers)); in ad7380_regmap_reg_read()
661 *val = FIELD_GET(AD7380_REG_DATA, st->rx); in ad7380_regmap_reg_read()
678 iio_device_claim_direct_scoped(return -EBUSY, indio_dev) { in ad7380_debugfs_reg_access()
682 return regmap_read(st->regmap, reg, readval); in ad7380_debugfs_reg_access()
684 return regmap_write(st->regmap, reg, writeval); in ad7380_debugfs_reg_access()
706 if (st->ch == ch) in ad7380_set_ch()
709 ret = regmap_update_bits(st->regmap, in ad7380_set_ch()
717 st->ch = ch; in ad7380_set_ch()
719 if (st->oversampling_ratio > 1) in ad7380_set_ch()
721 T_CONVERT_X_NS * (st->oversampling_ratio - 1) * in ad7380_set_ch()
722 st->chip_info->num_simult_channels / AD7380_NUM_SDO_LINES; in ad7380_set_ch()
724 return spi_sync_transfer(st->spi, &xfer, 1); in ad7380_set_ch()
728 * ad7380_update_xfers - update the SPI transfers base on the current scan type
735 struct spi_transfer *xfer = st->seq ? st->seq_xfer : st->normal_xfer; in ad7380_update_xfers()
743 if (st->oversampling_ratio > 1) in ad7380_update_xfers()
745 (st->oversampling_ratio - 1) * in ad7380_update_xfers()
746 st->chip_info->num_simult_channels / AD7380_NUM_SDO_LINES; in ad7380_update_xfers()
748 if (st->seq) { in ad7380_update_xfers()
752 scan_type->realbits; in ad7380_update_xfers()
754 BITS_TO_BYTES(scan_type->storagebits) * in ad7380_update_xfers()
755 st->chip_info->num_simult_channels; in ad7380_update_xfers()
758 if (st->oversampling_ratio > 1) in ad7380_update_xfers()
766 xfer[1].bits_per_word = scan_type->realbits; in ad7380_update_xfers()
767 xfer[1].len = BITS_TO_BYTES(scan_type->storagebits) * in ad7380_update_xfers()
768 st->chip_info->num_simult_channels; in ad7380_update_xfers()
776 struct spi_message *msg = &st->normal_msg; in ad7380_triggered_buffer_preenable()
782 scan_type = iio_get_current_scan_type(indio_dev, &indio_dev->channels[0]); in ad7380_triggered_buffer_preenable()
786 if (st->chip_info->has_mux) { in ad7380_triggered_buffer_preenable()
803 ret = regmap_update_bits(st->regmap, in ad7380_triggered_buffer_preenable()
809 msg = &st->seq_msg; in ad7380_triggered_buffer_preenable()
810 st->seq = true; in ad7380_triggered_buffer_preenable()
821 return spi_optimize_message(st->spi, msg); in ad7380_triggered_buffer_preenable()
827 struct spi_message *msg = &st->normal_msg; in ad7380_triggered_buffer_postdisable()
830 if (st->seq) { in ad7380_triggered_buffer_postdisable()
831 ret = regmap_update_bits(st->regmap, in ad7380_triggered_buffer_postdisable()
838 msg = &st->seq_msg; in ad7380_triggered_buffer_postdisable()
839 st->seq = false; in ad7380_triggered_buffer_postdisable()
855 struct iio_dev *indio_dev = pf->indio_dev; in ad7380_trigger_handler()
857 struct spi_message *msg = st->seq ? &st->seq_msg : &st->normal_msg; in ad7380_trigger_handler()
860 ret = spi_sync(st->spi, msg); in ad7380_trigger_handler()
864 iio_push_to_buffers_with_timestamp(indio_dev, &st->scan_data, in ad7380_trigger_handler()
865 pf->timestamp); in ad7380_trigger_handler()
868 iio_trigger_notify_done(indio_dev->trig); in ad7380_trigger_handler()
879 if (st->chip_info->has_mux) { in ad7380_read_direct()
882 if (index >= st->chip_info->num_simult_channels) { in ad7380_read_direct()
883 index -= st->chip_info->num_simult_channels; in ad7380_read_direct()
894 ret = spi_sync(st->spi, &st->normal_msg); in ad7380_read_direct()
898 if (scan_type->storagebits > 16) { in ad7380_read_direct()
899 if (scan_type->sign == 's') in ad7380_read_direct()
900 *val = sign_extend32(*(u32 *)(st->scan_data + 4 * index), in ad7380_read_direct()
901 scan_type->realbits - 1); in ad7380_read_direct()
903 *val = *(u32 *)(st->scan_data + 4 * index) & in ad7380_read_direct()
904 GENMASK(scan_type->realbits - 1, 0); in ad7380_read_direct()
906 if (scan_type->sign == 's') in ad7380_read_direct()
907 *val = sign_extend32(*(u16 *)(st->scan_data + 2 * index), in ad7380_read_direct()
908 scan_type->realbits - 1); in ad7380_read_direct()
910 *val = *(u16 *)(st->scan_data + 2 * index) & in ad7380_read_direct()
911 GENMASK(scan_type->realbits - 1, 0); in ad7380_read_direct()
931 iio_device_claim_direct_scoped(return -EBUSY, indio_dev) { in ad7380_read_raw()
932 return ad7380_read_direct(st, chan->scan_index, in ad7380_read_raw()
939 * * (2 × VREF) / 2^N, for differential chips in ad7380_read_raw()
940 * * VREF / 2^N, for pseudo-differential chips in ad7380_read_raw()
946 if (st->chip_info->has_hardware_gain) in ad7380_read_raw()
947 *val = mult_frac(st->vref_mv, MILLI, in ad7380_read_raw()
948 st->gain_milli[chan->scan_index]); in ad7380_read_raw()
950 *val = st->vref_mv; in ad7380_read_raw()
951 *val2 = scan_type->realbits - chan->differential; in ad7380_read_raw()
959 *val = st->vcm_mv[chan->channel] * (1 << scan_type->realbits) in ad7380_read_raw()
960 / st->vref_mv; in ad7380_read_raw()
964 *val = st->oversampling_ratio; in ad7380_read_raw()
968 return -EINVAL; in ad7380_read_raw()
985 return -EINVAL; in ad7380_read_avail()
990 * ad7380_osr_to_regval - convert ratio to OSR register value
997 * Returns: register value (0 to 7) or -EINVAL if there is not an exact match
1008 return -EINVAL; in ad7380_osr_to_regval()
1027 iio_device_claim_direct_scoped(return -EBUSY, indio_dev) { in ad7380_write_raw()
1028 ret = regmap_update_bits(st->regmap, in ad7380_write_raw()
1037 st->oversampling_ratio = val; in ad7380_write_raw()
1038 st->resolution_boost_enabled = boost; in ad7380_write_raw()
1045 return regmap_update_bits(st->regmap, in ad7380_write_raw()
1053 return -EINVAL; in ad7380_write_raw()
1062 return st->resolution_boost_enabled ? AD7380_SCAN_TYPE_RESOLUTION_BOOST in ad7380_get_current_scan_type()
1079 ret = regmap_update_bits(st->regmap, AD7380_REG_ADDR_CONFIG2, in ad7380_init()
1088 ret = regmap_set_bits(st->regmap, AD7380_REG_ADDR_CONFIG1, in ad7380_init()
1095 st->oversampling_ratio = 1; in ad7380_init()
1096 st->ch = 0; in ad7380_init()
1097 st->seq = false; in ad7380_init()
1099 /* SPI 1-wire mode */ in ad7380_init()
1100 return regmap_update_bits(st->regmap, AD7380_REG_ADDR_CONFIG2, in ad7380_init()
1108 struct device *dev = &spi->dev; in ad7380_probe()
1116 return -ENOMEM; in ad7380_probe()
1119 st->spi = spi; in ad7380_probe()
1120 st->chip_info = spi_get_device_match_data(spi); in ad7380_probe()
1121 if (!st->chip_info) in ad7380_probe()
1122 return dev_err_probe(dev, -EINVAL, "missing match data\n"); in ad7380_probe()
1124 ret = devm_regulator_bulk_get_enable(dev, st->chip_info->num_supplies, in ad7380_probe()
1125 st->chip_info->supplies); in ad7380_probe()
1132 if (st->chip_info->adaq_internal_ref_only) { in ad7380_probe()
1140 st->vref_mv = ADAQ4380_INTERNAL_REF_MV; in ad7380_probe()
1144 } else if (st->chip_info->external_ref_only) { in ad7380_probe()
1150 st->vref_mv = ret / 1000; in ad7380_probe()
1160 if (ret < 0 && ret != -ENODEV) in ad7380_probe()
1164 external_ref_en = ret != -ENODEV; in ad7380_probe()
1165 st->vref_mv = external_ref_en ? ret / 1000 : AD7380_INTERNAL_REF_MV; in ad7380_probe()
1168 if (st->chip_info->num_vcm_supplies > ARRAY_SIZE(st->vcm_mv)) in ad7380_probe()
1169 return dev_err_probe(dev, -EINVAL, in ad7380_probe()
1173 * pseudo-differential chips have common mode supplies for the negative in ad7380_probe()
1176 for (i = 0; i < st->chip_info->num_vcm_supplies; i++) { in ad7380_probe()
1177 const char *vcm = st->chip_info->vcm_supplies[i]; in ad7380_probe()
1185 st->vcm_mv[i] = ret / 1000; in ad7380_probe()
1189 st->gain_milli[i] = AD7380_DEFAULT_GAIN_MILLI; in ad7380_probe()
1191 if (st->chip_info->has_hardware_gain) { in ad7380_probe()
1201 if (channel >= st->chip_info->num_channels - 1) in ad7380_probe()
1202 return dev_err_probe(dev, -EINVAL, in ad7380_probe()
1206 ret = fwnode_property_read_u32(node, "adi,gain-milli", in ad7380_probe()
1208 if (ret && ret != -EINVAL) in ad7380_probe()
1212 if (ret != -EINVAL) { in ad7380_probe()
1219 st->gain_milli[channel] = ad7380_gains[gain_idx]; in ad7380_probe()
1224 st->regmap = devm_regmap_init(dev, NULL, st, &ad7380_regmap_config); in ad7380_probe()
1225 if (IS_ERR(st->regmap)) in ad7380_probe()
1226 return dev_err_probe(dev, PTR_ERR(st->regmap), in ad7380_probe()
1238 * - first, toggle CS (no data xfer) to trigger a conversion in ad7380_probe()
1239 * - then, read data in ad7380_probe()
1241 st->normal_xfer[0].cs_change = 1; in ad7380_probe()
1242 st->normal_xfer[0].cs_change_delay.value = st->chip_info->timing_specs->t_csh_ns; in ad7380_probe()
1243 st->normal_xfer[0].cs_change_delay.unit = SPI_DELAY_UNIT_NSECS; in ad7380_probe()
1244 st->normal_xfer[1].rx_buf = st->scan_data; in ad7380_probe()
1246 spi_message_init_with_transfers(&st->normal_msg, st->normal_xfer, in ad7380_probe()
1247 ARRAY_SIZE(st->normal_xfer)); in ad7380_probe()
1250 * - CS toggle (no data xfer) to get the right point in the sequence in ad7380_probe()
1251 * - CS toggle (no data xfer) to trigger a conversion of AinX0 and in ad7380_probe()
1253 * - 2 data reads, to read AinX0 and AinX1 in ad7380_probe()
1255 st->seq_xfer[0].cs_change = 1; in ad7380_probe()
1256 st->seq_xfer[0].cs_change_delay.value = st->chip_info->timing_specs->t_csh_ns; in ad7380_probe()
1257 st->seq_xfer[0].cs_change_delay.unit = SPI_DELAY_UNIT_NSECS; in ad7380_probe()
1258 st->seq_xfer[1].cs_change = 1; in ad7380_probe()
1259 st->seq_xfer[1].cs_change_delay.value = st->chip_info->timing_specs->t_csh_ns; in ad7380_probe()
1260 st->seq_xfer[1].cs_change_delay.unit = SPI_DELAY_UNIT_NSECS; in ad7380_probe()
1262 st->seq_xfer[2].rx_buf = st->scan_data; in ad7380_probe()
1263 st->seq_xfer[2].cs_change = 1; in ad7380_probe()
1264 st->seq_xfer[2].cs_change_delay.value = st->chip_info->timing_specs->t_csh_ns; in ad7380_probe()
1265 st->seq_xfer[2].cs_change_delay.unit = SPI_DELAY_UNIT_NSECS; in ad7380_probe()
1267 spi_message_init_with_transfers(&st->seq_msg, st->seq_xfer, in ad7380_probe()
1268 ARRAY_SIZE(st->seq_xfer)); in ad7380_probe()
1270 indio_dev->channels = st->chip_info->channels; in ad7380_probe()
1271 indio_dev->num_channels = st->chip_info->num_channels; in ad7380_probe()
1272 indio_dev->name = st->chip_info->name; in ad7380_probe()
1273 indio_dev->info = &ad7380_info; in ad7380_probe()
1274 indio_dev->modes = INDIO_DIRECT_MODE; in ad7380_probe()
1275 indio_dev->available_scan_masks = st->chip_info->available_scan_masks; in ad7380_probe()
1299 { .compatible = "adi,ad7380-4", .data = &ad7380_4_chip_info },
1300 { .compatible = "adi,ad7381-4", .data = &ad7381_4_chip_info },
1301 { .compatible = "adi,ad7383-4", .data = &ad7383_4_chip_info },
1302 { .compatible = "adi,ad7384-4", .data = &ad7384_4_chip_info },
1303 { .compatible = "adi,ad7386-4", .data = &ad7386_4_chip_info },
1304 { .compatible = "adi,ad7387-4", .data = &ad7387_4_chip_info },
1305 { .compatible = "adi,ad7388-4", .data = &ad7388_4_chip_info },
1306 { .compatible = "adi,adaq4370-4", .data = &adaq4370_4_chip_info },
1307 { .compatible = "adi,adaq4380-4", .data = &adaq4380_4_chip_info },
1319 { "ad7380-4", (kernel_ulong_t)&ad7380_4_chip_info },
1320 { "ad7381-4", (kernel_ulong_t)&ad7381_4_chip_info },
1321 { "ad7383-4", (kernel_ulong_t)&ad7383_4_chip_info },
1322 { "ad7384-4", (kernel_ulong_t)&ad7384_4_chip_info },
1323 { "ad7386-4", (kernel_ulong_t)&ad7386_4_chip_info },
1324 { "ad7387-4", (kernel_ulong_t)&ad7387_4_chip_info },
1325 { "ad7388-4", (kernel_ulong_t)&ad7388_4_chip_info },
1326 { "adaq4370-4", (kernel_ulong_t)&adaq4370_4_chip_info },
1327 { "adaq4380-4", (kernel_ulong_t)&adaq4380_4_chip_info },