1 // SPDX-License-Identifier: GPL-2.0+
183 	struct regulator *vref[4];  member
211 		.name = "ad7124-4",
216 		.name = "ad7124-8",
232 		diff_new = abs(val - array[i]);  in ad7124_find_closest_match()
251 	ret = ad_sd_read_reg(&st->sd, addr, bytes, &readval);  in ad7124_spi_write_mask()
258 	return ad_sd_write_reg(&st->sd, addr, bytes, readval);  in ad7124_spi_write_mask()
266 	st->adc_control &= ~AD7124_ADC_CTRL_MODE_MSK;  in ad7124_set_mode()
267 	st->adc_control |= AD7124_ADC_CTRL_MODE(mode);  in ad7124_set_mode()
269 	return ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL, 2, st->adc_control);  in ad7124_set_mode()
276 	fclk = clk_get_rate(st->mclk);  in ad7124_set_channel_odr()
290 	if (odr_sel_bits != st->channels[channel].cfg.odr_sel_bits)  in ad7124_set_channel_odr()
291 		st->channels[channel].cfg.live = false;  in ad7124_set_channel_odr()
294 	st->channels[channel].cfg.odr = DIV_ROUND_CLOSEST(fclk, odr_sel_bits * 32);  in ad7124_set_channel_odr()
295 	st->channels[channel].cfg.odr_sel_bits = odr_sel_bits;  in ad7124_set_channel_odr()
303 	fadc = st->channels[channel].cfg.odr;  in ad7124_get_3db_filter_freq()
305 	switch (st->channels[channel].cfg.filter_type) {  in ad7124_get_3db_filter_freq()
311 		return -EINVAL;  in ad7124_get_3db_filter_freq()
334 	if (new_odr != st->channels[channel].cfg.odr)  in ad7124_set_3db_filter_freq()
335 		st->channels[channel].cfg.live = false;  in ad7124_set_3db_filter_freq()
337 	st->channels[channel].cfg.filter_type = new_filter;  in ad7124_set_3db_filter_freq()
338 	st->channels[channel].cfg.odr = new_odr;  in ad7124_set_3db_filter_freq()
364 	for (i = 0; i < st->num_channels; i++) {  in ad7124_find_similar_live_cfg()
365 		cfg_aux = &st->channels[i].cfg;  in ad7124_find_similar_live_cfg()
367 		if (cfg_aux->live &&  in ad7124_find_similar_live_cfg()
368 		    cfg->refsel == cfg_aux->refsel &&  in ad7124_find_similar_live_cfg()
369 		    cfg->bipolar == cfg_aux->bipolar &&  in ad7124_find_similar_live_cfg()
370 		    cfg->buf_positive == cfg_aux->buf_positive &&  in ad7124_find_similar_live_cfg()
371 		    cfg->buf_negative == cfg_aux->buf_negative &&  in ad7124_find_similar_live_cfg()
372 		    cfg->vref_mv == cfg_aux->vref_mv &&  in ad7124_find_similar_live_cfg()
373 		    cfg->pga_bits == cfg_aux->pga_bits &&  in ad7124_find_similar_live_cfg()
374 		    cfg->odr == cfg_aux->odr &&  in ad7124_find_similar_live_cfg()
375 		    cfg->odr_sel_bits == cfg_aux->odr_sel_bits &&  in ad7124_find_similar_live_cfg()
376 		    cfg->filter_type == cfg_aux->filter_type)  in ad7124_find_similar_live_cfg()
387 	free_cfg_slot = find_first_zero_bit(&st->cfg_slots_status, AD7124_MAX_CONFIGS);  in ad7124_find_free_config_slot()
389 		return -1;  in ad7124_find_free_config_slot()
397 	struct device *dev = &st->sd.spi->dev;  in ad7124_init_config_vref()
398 	unsigned int refsel = cfg->refsel;  in ad7124_init_config_vref()
404 		if (IS_ERR(st->vref[refsel]))  in ad7124_init_config_vref()
405 			return dev_err_probe(dev, PTR_ERR(st->vref[refsel]),  in ad7124_init_config_vref()
409 		cfg->vref_mv = regulator_get_voltage(st->vref[refsel]);  in ad7124_init_config_vref()
411 		cfg->vref_mv /= 1000;  in ad7124_init_config_vref()
414 		cfg->vref_mv = 2500;  in ad7124_init_config_vref()
415 		st->adc_control &= ~AD7124_ADC_CTRL_REF_EN_MSK;  in ad7124_init_config_vref()
416 		st->adc_control |= AD7124_ADC_CTRL_REF_EN(1);  in ad7124_init_config_vref()
419 		return dev_err_probe(dev, -EINVAL, "Invalid reference %d\n", refsel);  in ad7124_init_config_vref()
430 	cfg->cfg_slot = cfg_slot;  in ad7124_write_config()
432 	tmp = (cfg->buf_positive << 1) + cfg->buf_negative;  in ad7124_write_config()
433 	val = AD7124_CONFIG_BIPOLAR(cfg->bipolar) | AD7124_CONFIG_REF_SEL(cfg->refsel) |  in ad7124_write_config()
434 	      AD7124_CONFIG_IN_BUFF(tmp) | AD7124_CONFIG_PGA(cfg->pga_bits);  in ad7124_write_config()
436 	ret = ad_sd_write_reg(&st->sd, AD7124_CONFIG(cfg->cfg_slot), 2, val);  in ad7124_write_config()
440 	tmp = AD7124_FILTER_TYPE_SEL(cfg->filter_type) |  in ad7124_write_config()
441 	      AD7124_FILTER_FS(cfg->odr_sel_bits);  in ad7124_write_config()
442 	return ad7124_spi_write_mask(st, AD7124_FILTER(cfg->cfg_slot),  in ad7124_write_config()
458 	ret = kfifo_get(&st->live_cfgs_fifo, &lru_cfg);  in ad7124_pop_config()
462 	lru_cfg->live = false;  in ad7124_pop_config()
465 	assign_bit(lru_cfg->cfg_slot, &st->cfg_slots_status, 0);  in ad7124_pop_config()
468 	for (i = 0; i < st->num_channels; i++) {  in ad7124_pop_config()
469 		cfg = &st->channels[i].cfg;  in ad7124_pop_config()
471 		if (cfg->cfg_slot == lru_cfg->cfg_slot)  in ad7124_pop_config()
472 			cfg->live = false;  in ad7124_pop_config()
486 		kfifo_put(&st->live_cfgs_fifo, cfg);  in ad7124_push_config()
491 			return -EINVAL;  in ad7124_push_config()
494 		free_cfg_slot = lru_cfg->cfg_slot;  in ad7124_push_config()
495 		kfifo_put(&st->live_cfgs_fifo, cfg);  in ad7124_push_config()
499 	assign_bit(free_cfg_slot, &st->cfg_slots_status, 1);  in ad7124_push_config()
506 	ch->cfg.live = true;  in ad7124_enable_channel()
507 	return ad_sd_write_reg(&st->sd, AD7124_CHANNEL(ch->nr), 2, ch->ain |  in ad7124_enable_channel()
508 			      AD7124_CHANNEL_SETUP(ch->cfg.cfg_slot) | AD7124_CHANNEL_EN(1));  in ad7124_enable_channel()
513 	struct ad7124_channel_config *cfg = &st->channels[address].cfg;  in ad7124_prepare_read()
520 	if (!cfg->live) {  in ad7124_prepare_read()
526 			cfg->cfg_slot = live_cfg->cfg_slot;  in ad7124_prepare_read()
530 	return ad7124_enable_channel(st, &st->channels[address]);  in ad7124_prepare_read()
545 	mutex_lock(&st->cfgs_lock);  in ad7124_set_channel()
547 	mutex_unlock(&st->cfgs_lock);  in ad7124_set_channel()
555 	unsigned int adc_control = st->adc_control;  in ad7124_append_status()
561 	ret = ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL, 2, adc_control);  in ad7124_append_status()
565 	st->adc_control = adc_control;  in ad7124_append_status()
575 	return ad_sd_write_reg(&st->sd, AD7124_CHANNEL(chan), 2, 0);  in ad7124_disable_one()
623 		switch (chan->type) {  in ad7124_read_raw()
625 			mutex_lock(&st->cfgs_lock);  in ad7124_read_raw()
627 			idx = st->channels[chan->address].cfg.pga_bits;  in ad7124_read_raw()
628 			*val = st->channels[chan->address].cfg.vref_mv;  in ad7124_read_raw()
629 			if (st->channels[chan->address].cfg.bipolar)  in ad7124_read_raw()
630 				*val2 = chan->scan_type.realbits - 1 + idx;  in ad7124_read_raw()
632 				*val2 = chan->scan_type.realbits + idx;  in ad7124_read_raw()
634 			mutex_unlock(&st->cfgs_lock);  in ad7124_read_raw()
642 			 * = (Conversion − 0x800000 - 13584 * 272.5) / 13584  in ad7124_read_raw()
652 			return -EINVAL;  in ad7124_read_raw()
656 		switch (chan->type) {  in ad7124_read_raw()
658 			mutex_lock(&st->cfgs_lock);  in ad7124_read_raw()
659 			if (st->channels[chan->address].cfg.bipolar)  in ad7124_read_raw()
660 				*val = -(1 << (chan->scan_type.realbits - 1));  in ad7124_read_raw()
664 			mutex_unlock(&st->cfgs_lock);  in ad7124_read_raw()
669 			*val = -12090248;  in ad7124_read_raw()
673 			return -EINVAL;  in ad7124_read_raw()
677 		mutex_lock(&st->cfgs_lock);  in ad7124_read_raw()
678 		*val = st->channels[chan->address].cfg.odr;  in ad7124_read_raw()
679 		mutex_unlock(&st->cfgs_lock);  in ad7124_read_raw()
683 		mutex_lock(&st->cfgs_lock);  in ad7124_read_raw()
684 		*val = ad7124_get_3db_filter_freq(st, chan->scan_index);  in ad7124_read_raw()
685 		mutex_unlock(&st->cfgs_lock);  in ad7124_read_raw()
689 		return -EINVAL;  in ad7124_read_raw()
698 	unsigned int res, gain, full_scale, vref;  in ad7124_write_raw()  local
701 	mutex_lock(&st->cfgs_lock);  in ad7124_write_raw()
706 			ret = -EINVAL;  in ad7124_write_raw()
710 		ad7124_set_channel_odr(st, chan->address, val);  in ad7124_write_raw()
714 			ret = -EINVAL;  in ad7124_write_raw()
718 		if (st->channels[chan->address].cfg.bipolar)  in ad7124_write_raw()
719 			full_scale = 1 << (chan->scan_type.realbits - 1);  in ad7124_write_raw()
721 			full_scale = 1 << chan->scan_type.realbits;  in ad7124_write_raw()
723 		vref = st->channels[chan->address].cfg.vref_mv * 1000000LL;  in ad7124_write_raw()
724 		res = DIV_ROUND_CLOSEST(vref, full_scale);  in ad7124_write_raw()
728 		if (st->channels[chan->address].cfg.pga_bits != res)  in ad7124_write_raw()
729 			st->channels[chan->address].cfg.live = false;  in ad7124_write_raw()
731 		st->channels[chan->address].cfg.pga_bits = res;  in ad7124_write_raw()
735 			ret = -EINVAL;  in ad7124_write_raw()
739 		ad7124_set_3db_filter_freq(st, chan->address, val);  in ad7124_write_raw()
742 		ret =  -EINVAL;  in ad7124_write_raw()
745 	mutex_unlock(&st->cfgs_lock);  in ad7124_write_raw()
758 		return -EINVAL;  in ad7124_reg_access()
761 		ret = ad_sd_read_reg(&st->sd, reg, ad7124_reg_size[reg],  in ad7124_reg_access()
764 		ret = ad_sd_write_reg(&st->sd, reg, ad7124_reg_size[reg],  in ad7124_reg_access()
790 	mutex_lock(&st->cfgs_lock);  in ad7124_update_scan_mode()
791 	for (i = 0; i < st->num_channels; i++) {  in ad7124_update_scan_mode()
794 			ret = __ad7124_set_channel(&st->sd, i);  in ad7124_update_scan_mode()
799 			mutex_unlock(&st->cfgs_lock);  in ad7124_update_scan_mode()
805 	mutex_unlock(&st->cfgs_lock);  in ad7124_update_scan_mode()
822 	struct device *dev = &st->sd.spi->dev;  in ad7124_soft_reset()
826 	ret = ad_sd_reset(&st->sd);  in ad7124_soft_reset()
833 		ret = ad_sd_read_reg(&st->sd, AD7124_STATUS, 1, &readval);  in ad7124_soft_reset()
842 	} while (--timeout);  in ad7124_soft_reset()
844 	return dev_err_probe(dev, -EIO, "Soft reset failed\n");  in ad7124_soft_reset()
849 	struct device *dev = &st->sd.spi->dev;  in ad7124_check_chip_id()
853 	ret = ad_sd_read_reg(&st->sd, AD7124_ID, 1, &readval);  in ad7124_check_chip_id()
860 	if (chip_id != st->chip_info->chip_id)  in ad7124_check_chip_id()
861 		return dev_err_probe(dev, -ENODEV,  in ad7124_check_chip_id()
863 				     st->chip_info->chip_id, chip_id);  in ad7124_check_chip_id()
866 		return dev_err_probe(dev, -ENODEV,  in ad7124_check_chip_id()
873  * Input specifiers 8 - 15 are explicitly reserved for ad7124-4
874  * while they are fine for ad7124-8. Values above 31 don't fit
879 	if (ain >= info->num_inputs && ain < 16)  in ad7124_valid_input_select()
906 		return dev_err_probe(dev, -EINVAL, "Too many channels defined\n");  in ad7124_parse_channel_config()
909 	st->num_channels = min(num_channels + 1, AD7124_MAX_CHANNELS);  in ad7124_parse_channel_config()
911 	chan = devm_kcalloc(indio_dev->dev.parent, st->num_channels,  in ad7124_parse_channel_config()
914 		return -ENOMEM;  in ad7124_parse_channel_config()
916 	channels = devm_kcalloc(indio_dev->dev.parent, st->num_channels, sizeof(*channels),  in ad7124_parse_channel_config()
919 		return -ENOMEM;  in ad7124_parse_channel_config()
921 	indio_dev->channels = chan;  in ad7124_parse_channel_config()
922 	indio_dev->num_channels = st->num_channels;  in ad7124_parse_channel_config()
923 	st->channels = channels;  in ad7124_parse_channel_config()
932 			return dev_err_probe(dev, -EINVAL,  in ad7124_parse_channel_config()
935 		ret = fwnode_property_read_u32_array(child, "diff-channels",  in ad7124_parse_channel_config()
939 					     "Failed to parse diff-channels property of %pfwP\n", child);  in ad7124_parse_channel_config()
941 		if (!ad7124_valid_input_select(ain[0], st->chip_info) ||  in ad7124_parse_channel_config()
942 		    !ad7124_valid_input_select(ain[1], st->chip_info))  in ad7124_parse_channel_config()
943 			return dev_err_probe(dev, -EINVAL,  in ad7124_parse_channel_config()
944 					     "diff-channels property of %pfwP contains invalid data\n", child);  in ad7124_parse_channel_config()
946 		st->channels[channel].nr = channel;  in ad7124_parse_channel_config()
947 		st->channels[channel].ain = AD7124_CHANNEL_AINP(ain[0]) |  in ad7124_parse_channel_config()
950 		cfg = &st->channels[channel].cfg;  in ad7124_parse_channel_config()
951 		cfg->bipolar = fwnode_property_read_bool(child, "bipolar");  in ad7124_parse_channel_config()
953 		ret = fwnode_property_read_u32(child, "adi,reference-select", &tmp);  in ad7124_parse_channel_config()
955 			cfg->refsel = AD7124_INT_REF;  in ad7124_parse_channel_config()
957 			cfg->refsel = tmp;  in ad7124_parse_channel_config()
959 		cfg->buf_positive =  in ad7124_parse_channel_config()
960 			fwnode_property_read_bool(child, "adi,buffered-positive");  in ad7124_parse_channel_config()
961 		cfg->buf_negative =  in ad7124_parse_channel_config()
962 			fwnode_property_read_bool(child, "adi,buffered-negative");  in ad7124_parse_channel_config()
972 		st->channels[num_channels] = (struct ad7124_channel) {  in ad7124_parse_channel_config()
1007 	struct device *dev = &st->sd.spi->dev;  in ad7124_setup()
1011 	fclk = clk_get_rate(st->mclk);  in ad7124_setup()
1013 		return dev_err_probe(dev, -EINVAL, "Failed to get mclk rate\n");  in ad7124_setup()
1020 		ret = clk_set_rate(st->mclk, fclk);  in ad7124_setup()
1026 	st->adc_control &= ~AD7124_ADC_CTRL_PWR_MSK;  in ad7124_setup()
1027 	st->adc_control |= AD7124_ADC_CTRL_PWR(power_mode);  in ad7124_setup()
1029 	st->adc_control &= ~AD7124_ADC_CTRL_MODE_MSK;  in ad7124_setup()
1030 	st->adc_control |= AD7124_ADC_CTRL_MODE(AD_SD_MODE_IDLE);  in ad7124_setup()
1032 	mutex_init(&st->cfgs_lock);  in ad7124_setup()
1033 	INIT_KFIFO(st->live_cfgs_fifo);  in ad7124_setup()
1034 	for (i = 0; i < st->num_channels; i++) {  in ad7124_setup()
1036 		ret = ad7124_init_config_vref(st, &st->channels[i].cfg);  in ad7124_setup()
1048 	ad7124_disable_all(&st->sd);  in ad7124_setup()
1050 	ret = ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL, 2, st->adc_control);  in ad7124_setup()
1065 	struct device *dev = &spi->dev;  in ad7124_probe()
1072 		return dev_err_probe(dev, -ENODEV, "Failed to get match data\n");  in ad7124_probe()
1074 	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));  in ad7124_probe()
1076 		return -ENOMEM;  in ad7124_probe()
1080 	st->chip_info = info;  in ad7124_probe()
1082 	indio_dev->name = st->chip_info->name;  in ad7124_probe()
1083 	indio_dev->modes = INDIO_DIRECT_MODE;  in ad7124_probe()
1084 	indio_dev->info = &ad7124_info;  in ad7124_probe()
1086 	ret = ad_sd_init(&st->sd, indio_dev, spi, &ad7124_sigma_delta_info);  in ad7124_probe()
1090 	ret = ad7124_parse_channel_config(indio_dev, &spi->dev);  in ad7124_probe()
1094 	for (i = 0; i < ARRAY_SIZE(st->vref); i++) {  in ad7124_probe()
1098 		st->vref[i] = devm_regulator_get_optional(&spi->dev,  in ad7124_probe()
1100 		if (PTR_ERR(st->vref[i]) == -ENODEV)  in ad7124_probe()
1102 		else if (IS_ERR(st->vref[i]))  in ad7124_probe()
1103 			return PTR_ERR(st->vref[i]);  in ad7124_probe()
1105 		ret = regulator_enable(st->vref[i]);  in ad7124_probe()
1109 		ret = devm_add_action_or_reset(&spi->dev, ad7124_reg_disable,  in ad7124_probe()
1110 					       st->vref[i]);  in ad7124_probe()
1115 	st->mclk = devm_clk_get_enabled(&spi->dev, "mclk");  in ad7124_probe()
1116 	if (IS_ERR(st->mclk))  in ad7124_probe()
1117 		return dev_err_probe(dev, PTR_ERR(st->mclk), "Failed to get mclk\n");  in ad7124_probe()
1131 	ret = devm_ad_sd_setup_buffer_and_trigger(&spi->dev, indio_dev);  in ad7124_probe()
1135 	ret = devm_iio_device_register(&spi->dev, indio_dev);  in ad7124_probe()
1143 	{ .compatible = "adi,ad7124-4",
1145 	{ .compatible = "adi,ad7124-8",
1152 	{ "ad7124-4", (kernel_ulong_t)&ad7124_chip_info_tbl[ID_AD7124_4] },
1153 	{ "ad7124-8", (kernel_ulong_t)&ad7124_chip_info_tbl[ID_AD7124_8] },