1 // SPDX-License-Identifier: GPL-2.0+
3  * ADXL380 3-Axis Digital Accelerometer core driver
194 	.temp_offset =  25 * 102 / 10 - 470,
212 	.temp_offset =  25 * 102 / 10 - 570,
268 static int adxl380_set_measure_en(struct adxl380_state *st, bool en)  in adxl380_set_measure_en()  argument
274 	if (en) {  in adxl380_set_measure_en()
275 		ret = regmap_read(st->regmap, ADXL380_ACT_INACT_CTL_REG, &act_inact_ctl);  in adxl380_set_measure_en()
287 	return regmap_update_bits(st->regmap, ADXL380_OP_MODE_REG,  in adxl380_set_measure_en()
296 	st->act_threshold = mult_frac(st->act_threshold,  in adxl380_scale_act_inact_thresholds()
299 	st->inact_threshold = mult_frac(st->inact_threshold,  in adxl380_scale_act_inact_thresholds()
312 		return -EINVAL;  in adxl380_write_act_inact_threshold()
314 	ret = regmap_write(st->regmap, reg + 1, th & GENMASK(7, 0));  in adxl380_write_act_inact_threshold()
318 	ret = regmap_update_bits(st->regmap, reg, GENMASK(2, 0), th >> 8);  in adxl380_write_act_inact_threshold()
323 		st->act_threshold = th;  in adxl380_write_act_inact_threshold()
325 		st->inact_threshold = th;  in adxl380_write_act_inact_threshold()
337 	guard(mutex)(&st->lock);  in adxl380_set_act_inact_threshold()
355 	guard(mutex)(&st->lock);  in adxl380_set_tap_threshold_value()
361 	ret = regmap_write(st->regmap, ADXL380_TAP_THRESH_REG, th);  in adxl380_set_tap_threshold_value()
365 	st->tap_threshold = th;  in adxl380_set_tap_threshold_value()
372 				      u32 us)  in _adxl380_write_tap_time_us()  argument
378 	/* scale factor for tap window is 1250us / LSB */  in _adxl380_write_tap_time_us()
379 	reg_val = DIV_ROUND_CLOSEST(us, 1250);  in _adxl380_write_tap_time_us()
383 	ret = regmap_write(st->regmap, reg, reg_val);  in _adxl380_write_tap_time_us()
388 		st->tap_window_us = us;  in _adxl380_write_tap_time_us()
390 		st->tap_latent_us = us;  in _adxl380_write_tap_time_us()
396 				     enum adxl380_tap_time_type tap_time_type, u32 us)  in adxl380_write_tap_time_us()  argument
400 	guard(mutex)(&st->lock);  in adxl380_write_tap_time_us()
406 	ret = _adxl380_write_tap_time_us(st, tap_time_type, us);  in adxl380_write_tap_time_us()
413 static int adxl380_write_tap_dur_us(struct iio_dev *indio_dev, u32 us)  in adxl380_write_tap_dur_us()  argument
419 	/* 625us per code is the scale factor of TAP_DUR register */  in adxl380_write_tap_dur_us()
420 	reg_val = DIV_ROUND_CLOSEST(us, 625);  in adxl380_write_tap_dur_us()
426 	ret = regmap_write(st->regmap, ADXL380_TAP_DUR_REG, reg_val);  in adxl380_write_tap_dur_us()
437 	guard(mutex)(&st->lock);  in adxl380_read_chn()
439 	ret = regmap_bulk_read(st->regmap, addr, &st->transf_buf, 2);  in adxl380_read_chn()
443 	return get_unaligned_be16(st->transf_buf);  in adxl380_read_chn()
451 	ret = regmap_read(st->regmap, ADXL380_TRIG_CFG_REG, &trig_cfg);  in adxl380_get_odr()
458 	*odr = st->chip_info->samp_freq_tbl[odr_idx];  in adxl380_get_odr()
476 	for (i = 0; i < ARRAY_SIZE(st->lpf_tbl); i++)  in adxl380_fill_lpf_tbl()
477 		st->lpf_tbl[i] = DIV_ROUND_CLOSEST(odr, adxl380_lpf_div[i]);  in adxl380_fill_lpf_tbl()
502 		st->hpf_tbl[i][0] = div;  in adxl380_fill_hpf_tbl()
503 		st->hpf_tbl[i][1] = div_u64(rem, MEGA * 100);  in adxl380_fill_hpf_tbl()
513 	guard(mutex)(&st->lock);  in adxl380_set_odr()
519 	ret = regmap_update_bits(st->regmap, ADXL380_TRIG_CFG_REG,  in adxl380_set_odr()
525 	ret = regmap_update_bits(st->regmap, ADXL380_TRIG_CFG_REG,  in adxl380_set_odr()
552 	return size - 1;  in adxl380_find_match_1d_tbl()
564 	return -EINVAL;  in adxl380_find_match_2d_tbl()
572 	guard(mutex)(&st->lock);  in adxl380_get_lpf()
574 	ret = regmap_read(st->regmap, ADXL380_FILTER_REG, &trig_cfg);  in adxl380_get_lpf()
580 	*lpf = st->lpf_tbl[lpf_idx];  in adxl380_get_lpf()
590 	guard(mutex)(&st->lock);  in adxl380_set_lpf()
599 	ret = regmap_update_bits(st->regmap, ADXL380_FILTER_REG,  in adxl380_set_lpf()
605 	ret = regmap_update_bits(st->regmap, ADXL380_FILTER_REG,  in adxl380_set_lpf()
619 	guard(mutex)(&st->lock);  in adxl380_get_hpf()
621 	ret = regmap_read(st->regmap, ADXL380_FILTER_REG, &trig_cfg);  in adxl380_get_hpf()
627 	*hpf_int = st->hpf_tbl[hpf_idx][0];  in adxl380_get_hpf()
628 	*hpf_frac = st->hpf_tbl[hpf_idx][1];  in adxl380_get_hpf()
638 	guard(mutex)(&st->lock);  in adxl380_set_hpf()
647 	ret = regmap_update_bits(st->regmap, ADXL380_FILTER_REG,  in adxl380_set_hpf()
653 	ret = regmap_update_bits(st->regmap, ADXL380_FILTER_REG,  in adxl380_set_hpf()
670 	/* 500us per code is the scale factor of TIME_ACT / TIME_INACT registers */  in _adxl380_set_act_inact_time_ms()
673 	put_unaligned_be24(reg_val, &st->transf_buf[0]);  in _adxl380_set_act_inact_time_ms()
675 	ret = regmap_bulk_write(st->regmap, reg, st->transf_buf, sizeof(st->transf_buf));  in _adxl380_set_act_inact_time_ms()
680 		st->act_time_ms = ms;  in _adxl380_set_act_inact_time_ms()
682 		st->inact_time_ms = ms;  in _adxl380_set_act_inact_time_ms()
693 	guard(mutex)(&st->lock);  in adxl380_set_act_inact_time_ms()
710 	guard(mutex)(&st->lock);  in adxl380_set_range()
716 	ret = regmap_update_bits(st->regmap, ADXL380_OP_MODE_REG,  in adxl380_set_range()
723 	adxl380_scale_act_inact_thresholds(st, st->range, range);  in adxl380_set_range()
727 						st->act_threshold);  in adxl380_set_range()
732 						st->inact_threshold);  in adxl380_set_range()
736 	st->range = range;  in adxl380_set_range()
743 				      bool en)  in adxl380_write_act_inact_en()  argument
746 		return regmap_update_bits(st->regmap, ADXL380_ACT_INACT_CTL_REG,  in adxl380_write_act_inact_en()
748 					  FIELD_PREP(ADXL380_ACT_EN_MSK, en));  in adxl380_write_act_inact_en()
750 	return regmap_update_bits(st->regmap, ADXL380_ACT_INACT_CTL_REG,  in adxl380_write_act_inact_en()
752 				  FIELD_PREP(ADXL380_INACT_EN_MSK, en));  in adxl380_write_act_inact_en()
757 				      bool *en)  in adxl380_read_act_inact_int()  argument
762 	guard(mutex)(&st->lock);  in adxl380_read_act_inact_int()
764 	ret = regmap_read(st->regmap, st->int_map[0], &reg_val);  in adxl380_read_act_inact_int()
769 		*en = FIELD_GET(ADXL380_INT_MAP0_ACT_INT0_MSK, reg_val);  in adxl380_read_act_inact_int()
771 		*en = FIELD_GET(ADXL380_INT_MAP0_INACT_INT0_MSK, reg_val);  in adxl380_read_act_inact_int()
778 				       bool en)  in adxl380_write_act_inact_int()  argument
781 		return regmap_update_bits(st->regmap, st->int_map[0],  in adxl380_write_act_inact_int()
783 					  FIELD_PREP(ADXL380_INT_MAP0_ACT_INT0_MSK, en));  in adxl380_write_act_inact_int()
785 	return regmap_update_bits(st->regmap, st->int_map[0],  in adxl380_write_act_inact_int()
787 				  FIELD_PREP(ADXL380_INT_MAP0_INACT_INT0_MSK, en));  in adxl380_write_act_inact_int()
792 				    bool en)  in adxl380_act_inact_config()  argument
796 	guard(mutex)(&st->lock);  in adxl380_act_inact_config()
802 	ret = adxl380_write_act_inact_en(st, type, en);  in adxl380_act_inact_config()
806 	ret = adxl380_write_act_inact_int(st, type, en);  in adxl380_act_inact_config()
818 	ret = regmap_update_bits(st->regmap, ADXL380_TAP_CFG_REG,  in adxl380_write_tap_axis()
825 	st->tap_axis_en = axis;  in adxl380_write_tap_axis()
830 static int adxl380_read_tap_int(struct adxl380_state *st, enum adxl380_tap_type type, bool *en)  in adxl380_read_tap_int()  argument
835 	ret = regmap_read(st->regmap, st->int_map[1], &reg_val);  in adxl380_read_tap_int()
840 		*en = FIELD_GET(ADXL380_INT_MAP1_SINGLE_TAP_INT0_MSK, reg_val);  in adxl380_read_tap_int()
842 		*en = FIELD_GET(ADXL380_INT_MAP1_DOUBLE_TAP_INT0_MSK, reg_val);  in adxl380_read_tap_int()
847 static int adxl380_write_tap_int(struct adxl380_state *st, enum adxl380_tap_type type, bool en)  in adxl380_write_tap_int()  argument
850 		return regmap_update_bits(st->regmap, st->int_map[1],  in adxl380_write_tap_int()
852 					  FIELD_PREP(ADXL380_INT_MAP1_SINGLE_TAP_INT0_MSK, en));  in adxl380_write_tap_int()
854 	return regmap_update_bits(st->regmap, st->int_map[1],  in adxl380_write_tap_int()
856 				  FIELD_PREP(ADXL380_INT_MAP1_DOUBLE_TAP_INT0_MSK, en));  in adxl380_write_tap_int()
862 			      bool en)  in adxl380_tap_config()  argument
866 	guard(mutex)(&st->lock);  in adxl380_tap_config()
876 	ret = adxl380_write_tap_int(st, type, en);  in adxl380_tap_config()
886 	u16 fifo_samples = st->watermark * st->fifo_set_size;  in adxl380_set_fifo_samples()
888 	ret = regmap_update_bits(st->regmap, ADXL380_FIFO_CONFIG_0_REG,  in adxl380_set_fifo_samples()
895 	return regmap_write(st->regmap, ADXL380_FIFO_CONFIG_1_REG,  in adxl380_set_fifo_samples()
904 	ret = regmap_bulk_read(st->regmap, ADXL380_STATUS_0_REG,  in adxl380_get_status()
905 			       &st->transf_buf, 2);  in adxl380_get_status()
909 	*status0 = st->transf_buf[0];  in adxl380_get_status()
910 	*status1 = st->transf_buf[1];  in adxl380_get_status()
919 	ret = regmap_bulk_read(st->regmap, ADXL380_FIFO_STATUS_0_REG,  in adxl380_get_fifo_entries()
920 			       &st->transf_buf, 2);  in adxl380_get_fifo_entries()
924 	*fifo_entries = st->transf_buf[0] | ((BIT(0) & st->transf_buf[1]) << 8);  in adxl380_get_fifo_entries()
965 	guard(mutex)(&st->lock);  in adxl380_irq_handler()
980 	for (i = 0; i < fifo_entries; i += st->fifo_set_size) {  in adxl380_irq_handler()
981 		ret = regmap_noinc_read(st->regmap, ADXL380_FIFO_DATA,  in adxl380_irq_handler()
982 					&st->fifo_buf[i],  in adxl380_irq_handler()
983 					2 * st->fifo_set_size);  in adxl380_irq_handler()
986 		iio_push_to_buffers(indio_dev, &st->fifo_buf[i]);  in adxl380_irq_handler()
998 	guard(mutex)(&st->lock);  in adxl380_write_calibbias_value()
1004 	ret = regmap_write(st->regmap, ADXL380_X_DSM_OFFSET_REG + chan_addr, calibbias);  in adxl380_write_calibbias_value()
1018 	guard(mutex)(&st->lock);  in adxl380_read_calibbias_value()
1020 	ret = regmap_read(st->regmap, ADXL380_X_DSM_OFFSET_REG + chan_addr, &reg_val);  in adxl380_read_calibbias_value()
1050 	return sysfs_emit(buf, "%d\n", st->watermark);  in adxl380_get_fifo_watermark()
1062 	ret = regmap_read(st->regmap, ADXL380_DIG_EN_REG, &reg_val);  in adxl380_get_fifo_enabled()
1091 	guard(mutex)(&st->lock);  in adxl380_buffer_postenable()
1097 	ret = regmap_update_bits(st->regmap,  in adxl380_buffer_postenable()
1098 				 st->int_map[0],  in adxl380_buffer_postenable()
1104 	for_each_clear_bit(i, indio_dev->active_scan_mask, ADXL380_CH_NUM) {  in adxl380_buffer_postenable()
1105 		ret = regmap_update_bits(st->regmap, ADXL380_DIG_EN_REG,  in adxl380_buffer_postenable()
1112 	st->fifo_set_size = bitmap_weight(indio_dev->active_scan_mask,  in adxl380_buffer_postenable()
1115 	if ((st->watermark * st->fifo_set_size) > ADXL380_FIFO_SAMPLES)  in adxl380_buffer_postenable()
1116 		st->watermark = (ADXL380_FIFO_SAMPLES  / st->fifo_set_size);  in adxl380_buffer_postenable()
1122 	ret = regmap_update_bits(st->regmap, ADXL380_DIG_EN_REG, ADXL380_FIFO_EN_MSK,  in adxl380_buffer_postenable()
1135 	guard(mutex)(&st->lock);  in adxl380_buffer_predisable()
1141 	ret = regmap_update_bits(st->regmap,  in adxl380_buffer_predisable()
1142 				 st->int_map[0],  in adxl380_buffer_predisable()
1148 	for (i = 0; i < indio_dev->num_channels; i++) {  in adxl380_buffer_predisable()
1149 		ret = regmap_update_bits(st->regmap, ADXL380_DIG_EN_REG,  in adxl380_buffer_predisable()
1156 	ret = regmap_update_bits(st->regmap, ADXL380_DIG_EN_REG, ADXL380_FIFO_EN_MSK,  in adxl380_buffer_predisable()
1182 		ret = adxl380_read_chn(st, chan->address);  in adxl380_read_raw()
1187 		*val = sign_extend32(ret >> chan->scan_type.shift,  in adxl380_read_raw()
1188 				     chan->scan_type.realbits - 1);  in adxl380_read_raw()
1191 		switch (chan->type) {  in adxl380_read_raw()
1193 			scoped_guard(mutex, &st->lock) {  in adxl380_read_raw()
1194 				*val = st->chip_info->scale_tbl[st->range][0];  in adxl380_read_raw()
1195 				*val2 = st->chip_info->scale_tbl[st->range][1];  in adxl380_read_raw()
1204 			return -EINVAL;  in adxl380_read_raw()
1207 		switch (chan->type) {  in adxl380_read_raw()
1209 			*val = st->chip_info->temp_offset;  in adxl380_read_raw()
1212 			return -EINVAL;  in adxl380_read_raw()
1215 		switch (chan->type) {  in adxl380_read_raw()
1217 			ret = adxl380_read_calibbias_value(st, chan->scan_index, val);  in adxl380_read_raw()
1222 			return -EINVAL;  in adxl380_read_raw()
1241 	return -EINVAL;  in adxl380_read_raw()
1251 	if (chan->type != IIO_ACCEL)  in adxl380_read_avail()
1252 		return -EINVAL;  in adxl380_read_avail()
1256 		*vals = (const int *)st->chip_info->scale_tbl;  in adxl380_read_avail()
1258 		*length = ARRAY_SIZE(st->chip_info->scale_tbl) * 2;  in adxl380_read_avail()
1261 		*vals = (const int *)st->chip_info->samp_freq_tbl;  in adxl380_read_avail()
1263 		*length = ARRAY_SIZE(st->chip_info->samp_freq_tbl);  in adxl380_read_avail()
1266 		*vals = (const int *)st->lpf_tbl;  in adxl380_read_avail()
1268 		*length = ARRAY_SIZE(st->lpf_tbl);  in adxl380_read_avail()
1271 		*vals = (const int *)st->hpf_tbl;  in adxl380_read_avail()
1274 		*length = ARRAY_SIZE(st->hpf_tbl) * 2;  in adxl380_read_avail()
1277 		return -EINVAL;  in adxl380_read_avail()
1290 		odr_index = adxl380_find_match_1d_tbl(st->chip_info->samp_freq_tbl,  in adxl380_write_raw()
1291 						      ARRAY_SIZE(st->chip_info->samp_freq_tbl),  in adxl380_write_raw()
1295 		return adxl380_write_calibbias_value(st, chan->scan_index, val);  in adxl380_write_raw()
1297 		lpf_index = adxl380_find_match_1d_tbl(st->lpf_tbl,  in adxl380_write_raw()
1298 						      ARRAY_SIZE(st->lpf_tbl),  in adxl380_write_raw()
1302 		hpf_index = adxl380_find_match_2d_tbl(st->hpf_tbl,  in adxl380_write_raw()
1303 						      ARRAY_SIZE(st->hpf_tbl),  in adxl380_write_raw()
1309 		range_index = adxl380_find_match_2d_tbl(st->chip_info->scale_tbl,  in adxl380_write_raw()
1310 							ARRAY_SIZE(st->chip_info->scale_tbl),  in adxl380_write_raw()
1316 		return -EINVAL;  in adxl380_write_raw()
1326 		if (chan->type != IIO_ACCEL)  in adxl380_write_raw_get_fmt()
1327 			return -EINVAL;  in adxl380_write_raw_get_fmt()
1345 	switch (chan->channel2) {  in adxl380_read_event_config()
1347 		tap_axis_en = st->tap_axis_en == ADXL380_X_AXIS;  in adxl380_read_event_config()
1350 		tap_axis_en = st->tap_axis_en == ADXL380_Y_AXIS;  in adxl380_read_event_config()
1353 		tap_axis_en = st->tap_axis_en == ADXL380_Z_AXIS;  in adxl380_read_event_config()
1356 		return -EINVAL;  in adxl380_read_event_config()
1381 		return -EINVAL;  in adxl380_read_event_config()
1394 	switch (chan->channel2) {  in adxl380_write_event_config()
1405 		return -EINVAL;  in adxl380_write_event_config()
1418 		return -EINVAL;  in adxl380_write_event_config()
1431 	guard(mutex)(&st->lock);  in adxl380_read_event_value()
1439 				*val = st->act_threshold;  in adxl380_read_event_value()
1442 				*val = st->inact_threshold;  in adxl380_read_event_value()
1445 				return -EINVAL;  in adxl380_read_event_value()
1451 				*val = st->act_time_ms;  in adxl380_read_event_value()
1455 				*val = st->inact_time_ms;  in adxl380_read_event_value()
1459 				return -EINVAL;  in adxl380_read_event_value()
1462 			return -EINVAL;  in adxl380_read_event_value()
1467 			*val = st->tap_threshold;  in adxl380_read_event_value()
1470 			*val = st->tap_window_us;  in adxl380_read_event_value()
1474 			*val = st->tap_latent_us;  in adxl380_read_event_value()
1478 			return -EINVAL;  in adxl380_read_event_value()
1481 		return -EINVAL;  in adxl380_read_event_value()
1493 	if (chan->type != IIO_ACCEL)  in adxl380_write_event_value()
1494 		return -EINVAL;  in adxl380_write_event_value()
1508 				return -EINVAL;  in adxl380_write_event_value()
1520 				return -EINVAL;  in adxl380_write_event_value()
1524 			return -EINVAL;  in adxl380_write_event_value()
1541 			return -EINVAL;  in adxl380_write_event_value()
1544 		return -EINVAL;  in adxl380_write_event_value()
1556 	guard(mutex)(&st->lock);  in in_accel_gesture_tap_maxtomin_time_show()
1558 	vals[0] = st->tap_duration_us;  in in_accel_gesture_tap_maxtomin_time_show()
1572 	guard(mutex)(&st->lock);  in in_accel_gesture_tap_maxtomin_time_store()
1578 	/* maximum value is 255 * 625 us = 0.159375 seconds */  in in_accel_gesture_tap_maxtomin_time_store()
1580 		return -EINVAL;  in in_accel_gesture_tap_maxtomin_time_store()
1608 		return regmap_read(st->regmap, reg, readval);  in adxl380_reg_access()
1610 	return regmap_write(st->regmap, reg, writeval);  in adxl380_reg_access()
1617 	st->watermark = min(val, ADXL380_FIFO_SAMPLES);  in adxl380_set_watermark()
1726 	st->irq = fwnode_irq_get_byname(dev_fwnode(st->dev), "INT0");  in adxl380_config_irq()
1727 	if (st->irq > 0) {  in adxl380_config_irq()
1728 		st->int_map[0] = ADXL380_INT0_MAP0_REG;  in adxl380_config_irq()
1729 		st->int_map[1] = ADXL380_INT0_MAP1_REG;  in adxl380_config_irq()
1731 		st->irq = fwnode_irq_get_byname(dev_fwnode(st->dev), "INT1");  in adxl380_config_irq()
1732 		if (st->irq > 0)  in adxl380_config_irq()
1733 			return dev_err_probe(st->dev, -ENODEV,  in adxl380_config_irq()
1735 		st->int_map[0] = ADXL380_INT1_MAP0_REG;  in adxl380_config_irq()
1736 		st->int_map[1] = ADXL380_INT1_MAP1_REG;  in adxl380_config_irq()
1739 	irq_type = irq_get_trigger_type(st->irq);  in adxl380_config_irq()
1747 		return dev_err_probe(st->dev, -EINVAL,  in adxl380_config_irq()
1752 	ret = regmap_update_bits(st->regmap, ADXL380_INT0_REG,  in adxl380_config_irq()
1758 	return devm_request_threaded_irq(st->dev, st->irq, NULL,  in adxl380_config_irq()
1760 					 indio_dev->name, indio_dev);  in adxl380_config_irq()
1770 	ret = regmap_read(st->regmap, ADXL380_DEVID_AD_REG, &reg_val);  in adxl380_setup()
1775 		dev_warn(st->dev, "Unknown chip id %x\n", reg_val);  in adxl380_setup()
1777 	ret = regmap_bulk_read(st->regmap, ADLX380_PART_ID_REG,  in adxl380_setup()
1778 			       &st->transf_buf, 2);  in adxl380_setup()
1782 	part_id = get_unaligned_be16(st->transf_buf);  in adxl380_setup()
1786 		dev_warn(st->dev, "Unknown part id %x\n", part_id);  in adxl380_setup()
1788 	ret = regmap_read(st->regmap, ADXL380_MISC_0_REG, &reg_val);  in adxl380_setup()
1798 	if (chip_id != st->chip_info->chip_id)  in adxl380_setup()
1799 		dev_warn(st->dev, "Unknown chip id %x\n", chip_id);  in adxl380_setup()
1801 	ret = regmap_write(st->regmap, ADXL380_RESET_REG, ADXL380_RESET_CODE);  in adxl380_setup()
1811 	for (i = 0; i < indio_dev->num_channels; i++) {  in adxl380_setup()
1812 		ret = regmap_update_bits(st->regmap, ADXL380_DIG_EN_REG,  in adxl380_setup()
1819 	ret = regmap_update_bits(st->regmap, ADXL380_FIFO_CONFIG_0_REG,  in adxl380_setup()
1826 	ret = regmap_update_bits(st->regmap, ADXL380_SNSR_AXIS_EN_REG,  in adxl380_setup()
1857 		return -ENOMEM;  in adxl380_probe()
1861 	st->dev = dev;  in adxl380_probe()
1862 	st->regmap = regmap;  in adxl380_probe()
1863 	st->chip_info = chip_info;  in adxl380_probe()
1865 	mutex_init(&st->lock);  in adxl380_probe()
1867 	indio_dev->channels = adxl380_channels;  in adxl380_probe()
1868 	indio_dev->num_channels = ARRAY_SIZE(adxl380_channels);  in adxl380_probe()
1869 	indio_dev->name = chip_info->name;  in adxl380_probe()
1870 	indio_dev->info = &adxl380_info;  in adxl380_probe()
1871 	indio_dev->modes = INDIO_DIRECT_MODE;  in adxl380_probe()
1875 		return dev_err_probe(st->dev, ret,  in adxl380_probe()
1878 	ret = devm_regulator_get_enable(st->dev, "vsupply");  in adxl380_probe()
1880 		return dev_err_probe(st->dev, ret,  in adxl380_probe()
1887 	ret = devm_iio_kfifo_buffer_setup_ext(st->dev, indio_dev,  in adxl380_probe()
1899 MODULE_DESCRIPTION("Analog Devices ADXL380 3-axis accelerometer driver");