Lines Matching +full:i2c +full:- +full:scl +full:- +full:hz
1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
7 #include <linux/dma-mapping.h>
8 #include <linux/dma/qcom-gpi-dma.h>
10 #include <linux/i2c.h>
17 #include <linux/soc/qcom/geni-se.h>
29 /* M_CMD OP codes for I2C */
36 /* M_CMD params for I2C */
47 /* I2C SCL COUNTER fields */
77 #define ABORT_TIMEOUT HZ
78 #define XFER_TIMEOUT HZ
79 #define RST_TIMEOUT HZ
118 [GP_IRQ0] = {-EIO, "Unknown I2C err GP_IRQ0"},
119 [NACK] = {-ENXIO, "NACK: slv unresponsive, check its power/reset-ln"},
120 [GP_IRQ2] = {-EIO, "Unknown I2C err GP IRQ2"},
121 [BUS_PROTO] = {-EPROTO, "Bus proto err, noisy/unexpected start/stop"},
122 [ARB_LOST] = {-EAGAIN, "Bus arbitration lost, clock line undriveable"},
123 [GP_IRQ5] = {-EIO, "Unknown I2C err GP IRQ5"},
124 [GENI_OVERRUN] = {-EIO, "Cmd overrun, check GENI cmd-state machine"},
125 [GENI_ILLEGAL_CMD] = {-EIO, "Illegal cmd, check GENI cmd-state machine"},
126 [GENI_ABORT_DONE] = {-ETIMEDOUT, "Abort after timeout successful"},
127 [GENI_TIMEOUT] = {-ETIMEDOUT, "I2C TXN timed out"},
140 * SCL clock cycle. Firmware uses some additional cycles excluded from the
144 * time of high period of SCL: t_high = (t_high_cnt * clk_div) / source_clock
145 * time of low period of SCL: t_low = (t_low_cnt * clk_div) / source_clock
146 * time of full period of SCL: t_cycle = (t_cycle_cnt * clk_div) / source_clock
169 if (clk_get_rate(gi2c->se.clk) == 32 * HZ_PER_MHZ) in geni_i2c_clk_map_idx()
174 while (itr->clk_freq_out != 0) { in geni_i2c_clk_map_idx()
175 if (itr->clk_freq_out == gi2c->clk_freq_out) { in geni_i2c_clk_map_idx()
176 gi2c->clk_fld = itr; in geni_i2c_clk_map_idx()
181 return -EINVAL; in geni_i2c_clk_map_idx()
186 const struct geni_i2c_clk_fld *itr = gi2c->clk_fld; in qcom_geni_i2c_conf()
189 writel_relaxed(0, gi2c->se.base + SE_GENI_CLK_SEL); in qcom_geni_i2c_conf()
191 val = (itr->clk_div << CLK_DIV_SHFT) | SER_CLK_EN; in qcom_geni_i2c_conf()
192 writel_relaxed(val, gi2c->se.base + GENI_SER_M_CLK_CFG); in qcom_geni_i2c_conf()
194 val = itr->t_high_cnt << HIGH_COUNTER_SHFT; in qcom_geni_i2c_conf()
195 val |= itr->t_low_cnt << LOW_COUNTER_SHFT; in qcom_geni_i2c_conf()
196 val |= itr->t_cycle_cnt; in qcom_geni_i2c_conf()
197 writel_relaxed(val, gi2c->se.base + SE_I2C_SCL_COUNTERS); in qcom_geni_i2c_conf()
202 u32 m_cmd = readl_relaxed(gi2c->se.base + SE_GENI_M_CMD0); in geni_i2c_err_misc()
203 u32 m_stat = readl_relaxed(gi2c->se.base + SE_GENI_M_IRQ_STATUS); in geni_i2c_err_misc()
204 u32 geni_s = readl_relaxed(gi2c->se.base + SE_GENI_STATUS); in geni_i2c_err_misc()
205 u32 geni_ios = readl_relaxed(gi2c->se.base + SE_GENI_IOS); in geni_i2c_err_misc()
206 u32 dma = readl_relaxed(gi2c->se.base + SE_GENI_DMA_MODE_EN); in geni_i2c_err_misc()
210 rx_st = readl_relaxed(gi2c->se.base + SE_DMA_RX_IRQ_STAT); in geni_i2c_err_misc()
211 tx_st = readl_relaxed(gi2c->se.base + SE_DMA_TX_IRQ_STAT); in geni_i2c_err_misc()
213 rx_st = readl_relaxed(gi2c->se.base + SE_GENI_RX_FIFO_STATUS); in geni_i2c_err_misc()
214 tx_st = readl_relaxed(gi2c->se.base + SE_GENI_TX_FIFO_STATUS); in geni_i2c_err_misc()
216 dev_dbg(gi2c->se.dev, "DMA:%d tx_stat:0x%x, rx_stat:0x%x, irq-stat:0x%x\n", in geni_i2c_err_misc()
218 dev_dbg(gi2c->se.dev, "m_cmd:0x%x, geni_status:0x%x, geni_ios:0x%x\n", in geni_i2c_err_misc()
224 if (!gi2c->err) in geni_i2c_err()
225 gi2c->err = gi2c_log[err].err; in geni_i2c_err()
226 if (gi2c->cur) in geni_i2c_err()
227 dev_dbg(gi2c->se.dev, "len:%d, slv-addr:0x%x, RD/WR:%d\n", in geni_i2c_err()
228 gi2c->cur->len, gi2c->cur->addr, gi2c->cur->flags); in geni_i2c_err()
232 gi2c->abort_done = true; in geni_i2c_err()
236 dev_dbg(gi2c->se.dev, "%s\n", gi2c_log[err].msg); in geni_i2c_err()
239 dev_err(gi2c->se.dev, "%s\n", gi2c_log[err].msg); in geni_i2c_err()
248 void __iomem *base = gi2c->se.base; in geni_i2c_irq()
258 spin_lock(&gi2c->lock); in geni_i2c_irq()
264 cur = gi2c->cur; in geni_i2c_irq()
288 dev_dbg(gi2c->se.dev, "i2c dma tx:0x%x, dma rx:0x%x\n", in geni_i2c_irq()
290 } else if (cur->flags & I2C_M_RD && in geni_i2c_irq()
297 while (gi2c->cur_rd < cur->len && p < sizeof(val)) { in geni_i2c_irq()
298 cur->buf[gi2c->cur_rd++] = val & 0xff; in geni_i2c_irq()
302 if (gi2c->cur_rd == cur->len) in geni_i2c_irq()
305 } else if (!(cur->flags & I2C_M_RD) && in geni_i2c_irq()
307 for (j = 0; j < gi2c->tx_wm; j++) { in geni_i2c_irq()
312 while (gi2c->cur_wr < cur->len && p < sizeof(val)) { in geni_i2c_irq()
313 temp = cur->buf[gi2c->cur_wr++]; in geni_i2c_irq()
319 if (gi2c->cur_wr == cur->len) { in geni_i2c_irq()
334 /* if this is err with done-bit not set, handle that through timeout. */ in geni_i2c_irq()
338 complete(&gi2c->done); in geni_i2c_irq()
340 spin_unlock(&gi2c->lock); in geni_i2c_irq()
350 spin_lock_irqsave(&gi2c->lock, flags); in geni_i2c_abort_xfer()
352 gi2c->cur = NULL; in geni_i2c_abort_xfer()
353 gi2c->abort_done = false; in geni_i2c_abort_xfer()
354 geni_se_abort_m_cmd(&gi2c->se); in geni_i2c_abort_xfer()
355 spin_unlock_irqrestore(&gi2c->lock, flags); in geni_i2c_abort_xfer()
358 time_left = wait_for_completion_timeout(&gi2c->done, time_left); in geni_i2c_abort_xfer()
359 } while (!gi2c->abort_done && time_left); in geni_i2c_abort_xfer()
362 dev_err(gi2c->se.dev, "Timeout abort_m_cmd\n"); in geni_i2c_abort_xfer()
370 writel_relaxed(1, gi2c->se.base + SE_DMA_RX_FSM_RST); in geni_i2c_rx_fsm_rst()
372 time_left = wait_for_completion_timeout(&gi2c->done, time_left); in geni_i2c_rx_fsm_rst()
373 val = readl_relaxed(gi2c->se.base + SE_DMA_RX_IRQ_STAT); in geni_i2c_rx_fsm_rst()
377 dev_err(gi2c->se.dev, "Timeout resetting RX_FSM\n"); in geni_i2c_rx_fsm_rst()
385 writel_relaxed(1, gi2c->se.base + SE_DMA_TX_FSM_RST); in geni_i2c_tx_fsm_rst()
387 time_left = wait_for_completion_timeout(&gi2c->done, time_left); in geni_i2c_tx_fsm_rst()
388 val = readl_relaxed(gi2c->se.base + SE_DMA_TX_IRQ_STAT); in geni_i2c_tx_fsm_rst()
392 dev_err(gi2c->se.dev, "Timeout resetting TX_FSM\n"); in geni_i2c_tx_fsm_rst()
398 gi2c->cur_rd = 0; in geni_i2c_rx_msg_cleanup()
399 if (gi2c->dma_buf) { in geni_i2c_rx_msg_cleanup()
400 if (gi2c->err) in geni_i2c_rx_msg_cleanup()
402 geni_se_rx_dma_unprep(&gi2c->se, gi2c->dma_addr, gi2c->xfer_len); in geni_i2c_rx_msg_cleanup()
403 i2c_put_dma_safe_msg_buf(gi2c->dma_buf, cur, !gi2c->err); in geni_i2c_rx_msg_cleanup()
410 gi2c->cur_wr = 0; in geni_i2c_tx_msg_cleanup()
411 if (gi2c->dma_buf) { in geni_i2c_tx_msg_cleanup()
412 if (gi2c->err) in geni_i2c_tx_msg_cleanup()
414 geni_se_tx_dma_unprep(&gi2c->se, gi2c->dma_addr, gi2c->xfer_len); in geni_i2c_tx_msg_cleanup()
415 i2c_put_dma_safe_msg_buf(gi2c->dma_buf, cur, !gi2c->err); in geni_i2c_tx_msg_cleanup()
425 struct geni_se *se = &gi2c->se; in geni_i2c_rx_one_msg()
426 size_t len = msg->len; in geni_i2c_rx_one_msg()
435 writel_relaxed(len, se->base + SE_I2C_RX_TRANS_LEN); in geni_i2c_rx_one_msg()
443 gi2c->xfer_len = len; in geni_i2c_rx_one_msg()
444 gi2c->dma_addr = rx_dma; in geni_i2c_rx_one_msg()
445 gi2c->dma_buf = dma_buf; in geni_i2c_rx_one_msg()
448 cur = gi2c->cur; in geni_i2c_rx_one_msg()
449 time_left = wait_for_completion_timeout(&gi2c->done, XFER_TIMEOUT); in geni_i2c_rx_one_msg()
455 return gi2c->err; in geni_i2c_rx_one_msg()
464 struct geni_se *se = &gi2c->se; in geni_i2c_tx_one_msg()
465 size_t len = msg->len; in geni_i2c_tx_one_msg()
474 writel_relaxed(len, se->base + SE_I2C_TX_TRANS_LEN); in geni_i2c_tx_one_msg()
482 gi2c->xfer_len = len; in geni_i2c_tx_one_msg()
483 gi2c->dma_addr = tx_dma; in geni_i2c_tx_one_msg()
484 gi2c->dma_buf = dma_buf; in geni_i2c_tx_one_msg()
488 writel_relaxed(1, se->base + SE_GENI_TX_WATERMARK_REG); in geni_i2c_tx_one_msg()
490 cur = gi2c->cur; in geni_i2c_tx_one_msg()
491 time_left = wait_for_completion_timeout(&gi2c->done, XFER_TIMEOUT); in geni_i2c_tx_one_msg()
497 return gi2c->err; in geni_i2c_tx_one_msg()
504 if (result->result != DMA_TRANS_NOERROR) { in i2c_gpi_cb_result()
505 dev_err(gi2c->se.dev, "DMA txn failed:%d\n", result->result); in i2c_gpi_cb_result()
506 gi2c->err = -EIO; in i2c_gpi_cb_result()
507 } else if (result->residue) { in i2c_gpi_cb_result()
508 dev_dbg(gi2c->se.dev, "DMA xfer has pending: %d\n", result->residue); in i2c_gpi_cb_result()
511 complete(&gi2c->done); in i2c_gpi_cb_result()
519 dma_unmap_single(gi2c->se.dev->parent, tx_addr, msg->len, DMA_TO_DEVICE); in geni_i2c_gpi_unmap()
520 i2c_put_dma_safe_msg_buf(tx_buf, msg, !gi2c->err); in geni_i2c_gpi_unmap()
524 dma_unmap_single(gi2c->se.dev->parent, rx_addr, msg->len, DMA_FROM_DEVICE); in geni_i2c_gpi_unmap()
525 i2c_put_dma_safe_msg_buf(rx_buf, msg, !gi2c->err); in geni_i2c_gpi_unmap()
542 peripheral = config->peripheral_config; in geni_i2c_gpi()
546 return -ENOMEM; in geni_i2c_gpi()
553 addr = dma_map_single(gi2c->se.dev->parent, dma_buf, msg->len, map_dirn); in geni_i2c_gpi()
554 if (dma_mapping_error(gi2c->se.dev->parent, addr)) { in geni_i2c_gpi()
556 return -ENOMEM; in geni_i2c_gpi()
560 peripheral->rx_len = msg->len; in geni_i2c_gpi()
561 peripheral->op = op; in geni_i2c_gpi()
565 dev_err(gi2c->se.dev, "dma config error: %d for op:%d\n", ret, op); in geni_i2c_gpi()
569 peripheral->set_config = 0; in geni_i2c_gpi()
570 peripheral->multi_msg = true; in geni_i2c_gpi()
578 desc = dmaengine_prep_slave_single(dma_chan, addr, msg->len, dma_dirn, flags); in geni_i2c_gpi()
580 dev_err(gi2c->se.dev, "prep_slave_sg failed\n"); in geni_i2c_gpi()
581 ret = -EIO; in geni_i2c_gpi()
585 desc->callback_result = i2c_gpi_cb_result; in geni_i2c_gpi()
586 desc->callback_param = gi2c; in geni_i2c_gpi()
595 dma_unmap_single(gi2c->se.dev->parent, addr, msg->len, map_dirn); in geni_i2c_gpi()
608 const struct geni_i2c_clk_fld *itr = gi2c->clk_fld; in geni_i2c_gpi_xfer()
614 peripheral.cycle_count = itr->t_cycle_cnt; in geni_i2c_gpi_xfer()
615 peripheral.high_count = itr->t_high_cnt; in geni_i2c_gpi_xfer()
616 peripheral.low_count = itr->t_low_cnt; in geni_i2c_gpi_xfer()
617 peripheral.clk_div = itr->clk_div; in geni_i2c_gpi_xfer()
622 gi2c->cur = &msgs[i]; in geni_i2c_gpi_xfer()
623 gi2c->err = 0; in geni_i2c_gpi_xfer()
624 dev_dbg(gi2c->se.dev, "msg[%d].len:%d\n", i, gi2c->cur->len); in geni_i2c_gpi_xfer()
627 if (i < num - 1) in geni_i2c_gpi_xfer()
633 &tx_addr, &tx_buf, I2C_WRITE, gi2c->tx_c); in geni_i2c_gpi_xfer()
639 &rx_addr, &rx_buf, I2C_READ, gi2c->rx_c); in geni_i2c_gpi_xfer()
643 dma_async_issue_pending(gi2c->rx_c); in geni_i2c_gpi_xfer()
646 dma_async_issue_pending(gi2c->tx_c); in geni_i2c_gpi_xfer()
648 time_left = wait_for_completion_timeout(&gi2c->done, XFER_TIMEOUT); in geni_i2c_gpi_xfer()
650 gi2c->err = -ETIMEDOUT; in geni_i2c_gpi_xfer()
652 if (gi2c->err) { in geni_i2c_gpi_xfer()
653 ret = gi2c->err; in geni_i2c_gpi_xfer()
663 dev_err(gi2c->se.dev, "GPI transfer failed: %d\n", ret); in geni_i2c_gpi_xfer()
664 dmaengine_terminate_sync(gi2c->rx_c); in geni_i2c_gpi_xfer()
665 dmaengine_terminate_sync(gi2c->tx_c); in geni_i2c_gpi_xfer()
676 u32 m_param = i < (num - 1) ? STOP_STRETCH : 0; in geni_i2c_fifo_xfer()
680 gi2c->cur = &msgs[i]; in geni_i2c_fifo_xfer()
700 gi2c->err = 0; in geni_i2c_xfer()
701 reinit_completion(&gi2c->done); in geni_i2c_xfer()
702 ret = pm_runtime_get_sync(gi2c->se.dev); in geni_i2c_xfer()
704 dev_err(gi2c->se.dev, "error turning SE resources:%d\n", ret); in geni_i2c_xfer()
705 pm_runtime_put_noidle(gi2c->se.dev); in geni_i2c_xfer()
707 pm_runtime_set_suspended(gi2c->se.dev); in geni_i2c_xfer()
713 if (gi2c->gpi_mode) in geni_i2c_xfer()
718 pm_runtime_mark_last_busy(gi2c->se.dev); in geni_i2c_xfer()
719 pm_runtime_put_autosuspend(gi2c->se.dev); in geni_i2c_xfer()
720 gi2c->cur = NULL; in geni_i2c_xfer()
721 gi2c->err = 0; in geni_i2c_xfer()
746 if (gi2c->rx_c) in release_gpi_dma()
747 dma_release_channel(gi2c->rx_c); in release_gpi_dma()
749 if (gi2c->tx_c) in release_gpi_dma()
750 dma_release_channel(gi2c->tx_c); in release_gpi_dma()
757 geni_se_select_mode(&gi2c->se, GENI_GPI_DMA); in setup_gpi_dma()
758 gi2c->tx_c = dma_request_chan(gi2c->se.dev, "tx"); in setup_gpi_dma()
759 if (IS_ERR(gi2c->tx_c)) { in setup_gpi_dma()
760 ret = dev_err_probe(gi2c->se.dev, PTR_ERR(gi2c->tx_c), in setup_gpi_dma()
765 gi2c->rx_c = dma_request_chan(gi2c->se.dev, "rx"); in setup_gpi_dma()
766 if (IS_ERR(gi2c->rx_c)) { in setup_gpi_dma()
767 ret = dev_err_probe(gi2c->se.dev, PTR_ERR(gi2c->rx_c), in setup_gpi_dma()
772 dev_dbg(gi2c->se.dev, "Grabbed GPI dma channels\n"); in setup_gpi_dma()
776 dma_release_channel(gi2c->tx_c); in setup_gpi_dma()
786 struct device *dev = &pdev->dev; in geni_i2c_probe()
791 return -ENOMEM; in geni_i2c_probe()
793 gi2c->se.dev = dev; in geni_i2c_probe()
794 gi2c->se.wrapper = dev_get_drvdata(dev->parent); in geni_i2c_probe()
795 gi2c->se.base = devm_platform_ioremap_resource(pdev, 0); in geni_i2c_probe()
796 if (IS_ERR(gi2c->se.base)) in geni_i2c_probe()
797 return PTR_ERR(gi2c->se.base); in geni_i2c_probe()
799 desc = device_get_match_data(&pdev->dev); in geni_i2c_probe()
801 if (desc && desc->has_core_clk) { in geni_i2c_probe()
802 gi2c->core_clk = devm_clk_get(dev, "core"); in geni_i2c_probe()
803 if (IS_ERR(gi2c->core_clk)) in geni_i2c_probe()
804 return PTR_ERR(gi2c->core_clk); in geni_i2c_probe()
807 gi2c->se.clk = devm_clk_get(dev, "se"); in geni_i2c_probe()
808 if (IS_ERR(gi2c->se.clk) && !has_acpi_companion(dev)) in geni_i2c_probe()
809 return PTR_ERR(gi2c->se.clk); in geni_i2c_probe()
811 ret = device_property_read_u32(dev, "clock-frequency", in geni_i2c_probe()
812 &gi2c->clk_freq_out); in geni_i2c_probe()
815 gi2c->clk_freq_out = KHZ(100); in geni_i2c_probe()
819 ACPI_COMPANION_SET(&gi2c->adap.dev, ACPI_COMPANION(dev)); in geni_i2c_probe()
821 gi2c->irq = platform_get_irq(pdev, 0); in geni_i2c_probe()
822 if (gi2c->irq < 0) in geni_i2c_probe()
823 return gi2c->irq; in geni_i2c_probe()
827 return dev_err_probe(dev, ret, "Invalid clk frequency %d Hz\n", in geni_i2c_probe()
828 gi2c->clk_freq_out); in geni_i2c_probe()
830 gi2c->adap.algo = &geni_i2c_algo; in geni_i2c_probe()
831 init_completion(&gi2c->done); in geni_i2c_probe()
832 spin_lock_init(&gi2c->lock); in geni_i2c_probe()
835 /* Keep interrupts disabled initially to allow for low-power modes */ in geni_i2c_probe()
836 ret = devm_request_irq(dev, gi2c->irq, geni_i2c_irq, IRQF_NO_AUTOEN, in geni_i2c_probe()
840 "Request_irq failed: %d\n", gi2c->irq); in geni_i2c_probe()
842 i2c_set_adapdata(&gi2c->adap, gi2c); in geni_i2c_probe()
843 gi2c->adap.dev.parent = dev; in geni_i2c_probe()
844 gi2c->adap.dev.of_node = dev->of_node; in geni_i2c_probe()
845 strscpy(gi2c->adap.name, "Geni-I2C", sizeof(gi2c->adap.name)); in geni_i2c_probe()
847 ret = geni_icc_get(&gi2c->se, desc ? desc->icc_ddr : "qup-memory"); in geni_i2c_probe()
855 gi2c->se.icc_paths[GENI_TO_CORE].avg_bw = GENI_DEFAULT_BW; in geni_i2c_probe()
856 gi2c->se.icc_paths[CPU_TO_GENI].avg_bw = GENI_DEFAULT_BW; in geni_i2c_probe()
857 if (!desc || desc->icc_ddr) in geni_i2c_probe()
858 gi2c->se.icc_paths[GENI_TO_DDR].avg_bw = Bps_to_icc(gi2c->clk_freq_out); in geni_i2c_probe()
860 ret = geni_icc_set_bw(&gi2c->se); in geni_i2c_probe()
864 ret = clk_prepare_enable(gi2c->core_clk); in geni_i2c_probe()
868 ret = geni_se_resources_on(&gi2c->se); in geni_i2c_probe()
873 proto = geni_se_read_proto(&gi2c->se); in geni_i2c_probe()
875 ret = dev_err_probe(dev, -ENXIO, "Invalid proto %d\n", proto); in geni_i2c_probe()
879 if (desc && desc->no_dma_support) in geni_i2c_probe()
882 fifo_disable = readl_relaxed(gi2c->se.base + GENI_IF_DISABLE_RO) & FIFO_IF_DISABLE; in geni_i2c_probe()
886 gi2c->gpi_mode = true; in geni_i2c_probe()
891 dev_dbg(dev, "Using GPI DMA mode for I2C\n"); in geni_i2c_probe()
893 gi2c->gpi_mode = false; in geni_i2c_probe()
894 tx_depth = geni_se_get_tx_fifo_depth(&gi2c->se); in geni_i2c_probe()
896 /* I2C Master Hub Serial Elements doesn't have the HW_PARAM_0 register */ in geni_i2c_probe()
898 tx_depth = desc->tx_fifo_depth; in geni_i2c_probe()
901 ret = dev_err_probe(dev, -EINVAL, in geni_i2c_probe()
906 gi2c->tx_wm = tx_depth - 1; in geni_i2c_probe()
907 geni_se_init(&gi2c->se, gi2c->tx_wm, tx_depth); in geni_i2c_probe()
908 geni_se_config_packing(&gi2c->se, BITS_PER_BYTE, in geni_i2c_probe()
911 dev_dbg(dev, "i2c fifo/se-dma mode. fifo depth:%d\n", tx_depth); in geni_i2c_probe()
914 clk_disable_unprepare(gi2c->core_clk); in geni_i2c_probe()
915 ret = geni_se_resources_off(&gi2c->se); in geni_i2c_probe()
921 ret = geni_icc_disable(&gi2c->se); in geni_i2c_probe()
925 gi2c->suspended = 1; in geni_i2c_probe()
926 pm_runtime_set_suspended(gi2c->se.dev); in geni_i2c_probe()
927 pm_runtime_set_autosuspend_delay(gi2c->se.dev, I2C_AUTO_SUSPEND_DELAY); in geni_i2c_probe()
928 pm_runtime_use_autosuspend(gi2c->se.dev); in geni_i2c_probe()
929 pm_runtime_enable(gi2c->se.dev); in geni_i2c_probe()
931 ret = i2c_add_adapter(&gi2c->adap); in geni_i2c_probe()
933 dev_err_probe(dev, ret, "Error adding i2c adapter\n"); in geni_i2c_probe()
934 pm_runtime_disable(gi2c->se.dev); in geni_i2c_probe()
938 dev_dbg(dev, "Geni-I2C adaptor successfully added\n"); in geni_i2c_probe()
943 geni_se_resources_off(&gi2c->se); in geni_i2c_probe()
945 clk_disable_unprepare(gi2c->core_clk); in geni_i2c_probe()
959 i2c_del_adapter(&gi2c->adap); in geni_i2c_remove()
961 pm_runtime_disable(gi2c->se.dev); in geni_i2c_remove()
968 /* Make client i2c transfers start failing */ in geni_i2c_shutdown()
969 i2c_mark_adapter_suspended(&gi2c->adap); in geni_i2c_shutdown()
977 disable_irq(gi2c->irq); in geni_i2c_runtime_suspend()
978 ret = geni_se_resources_off(&gi2c->se); in geni_i2c_runtime_suspend()
980 enable_irq(gi2c->irq); in geni_i2c_runtime_suspend()
984 gi2c->suspended = 1; in geni_i2c_runtime_suspend()
987 clk_disable_unprepare(gi2c->core_clk); in geni_i2c_runtime_suspend()
989 return geni_icc_disable(&gi2c->se); in geni_i2c_runtime_suspend()
997 ret = geni_icc_enable(&gi2c->se); in geni_i2c_runtime_resume()
1001 ret = clk_prepare_enable(gi2c->core_clk); in geni_i2c_runtime_resume()
1005 ret = geni_se_resources_on(&gi2c->se); in geni_i2c_runtime_resume()
1009 enable_irq(gi2c->irq); in geni_i2c_runtime_resume()
1010 gi2c->suspended = 0; in geni_i2c_runtime_resume()
1015 clk_disable_unprepare(gi2c->core_clk); in geni_i2c_runtime_resume()
1017 geni_icc_disable(&gi2c->se); in geni_i2c_runtime_resume()
1026 i2c_mark_adapter_suspended(&gi2c->adap); in geni_i2c_suspend_noirq()
1028 if (!gi2c->suspended) { in geni_i2c_suspend_noirq()
1041 i2c_mark_adapter_resumed(&gi2c->adap); in geni_i2c_resume_noirq()
1059 { .compatible = "qcom,geni-i2c" },
1060 { .compatible = "qcom,geni-i2c-master-hub", .data = &i2c_master_hub },
1079 MODULE_DESCRIPTION("I2C Controller Driver for GENI based QUP cores");