1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/i2c.h>
117 	uint8_t time_div;	/* Post-prescale divider */
120 /* Internal divider settings for high-speed mode */
131 	uint8_t time_div;	/* Post-prescale divider */
162 	dev_dbg(dev->device, "%s, %d\n", __func__, cmd);  in bcm_kona_i2c_send_cmd_to_ctrl()
168 		       dev->base + CS_OFFSET);  in bcm_kona_i2c_send_cmd_to_ctrl()
175 		       dev->base + CS_OFFSET);  in bcm_kona_i2c_send_cmd_to_ctrl()
182 		       dev->base + CS_OFFSET);  in bcm_kona_i2c_send_cmd_to_ctrl()
188 		       dev->base + CS_OFFSET);  in bcm_kona_i2c_send_cmd_to_ctrl()
192 		dev_err(dev->device, "Unknown command %d\n", cmd);  in bcm_kona_i2c_send_cmd_to_ctrl()
198 	writel(readl(dev->base + CLKEN_OFFSET) | CLKEN_CLKEN_MASK,  in bcm_kona_i2c_enable_clock()
199 	       dev->base + CLKEN_OFFSET);  in bcm_kona_i2c_enable_clock()
204 	writel(readl(dev->base + CLKEN_OFFSET) & ~CLKEN_CLKEN_MASK,  in bcm_kona_i2c_disable_clock()
205 	       dev->base + CLKEN_OFFSET);  in bcm_kona_i2c_disable_clock()
211 	uint32_t status = readl(dev->base + ISR_OFFSET);  in bcm_kona_i2c_isr()
219 		       dev->base + TXFCR_OFFSET);  in bcm_kona_i2c_isr()
221 	writel(status & ~ISR_RESERVED_MASK, dev->base + ISR_OFFSET);  in bcm_kona_i2c_isr()
222 	complete(&dev->done);  in bcm_kona_i2c_isr()
232 	while (readl(dev->base + ISR_OFFSET) & ISR_CMDBUSY_MASK)  in bcm_kona_i2c_wait_if_busy()
234 			dev_err(dev->device, "CMDBUSY timeout\n");  in bcm_kona_i2c_wait_if_busy()
235 			return -ETIMEDOUT;  in bcm_kona_i2c_wait_if_busy()
241 /* Send command to I2C bus */
254 	writel(IER_I2C_INT_EN_MASK, dev->base + IER_OFFSET);  in bcm_kona_send_i2c_cmd()
257 	reinit_completion(&dev->done);  in bcm_kona_send_i2c_cmd()
263 	time_left = wait_for_completion_timeout(&dev->done, time_left);  in bcm_kona_send_i2c_cmd()
266 	writel(0, dev->base + IER_OFFSET);  in bcm_kona_send_i2c_cmd()
269 		dev_err(dev->device, "controller timed out\n");  in bcm_kona_send_i2c_cmd()
270 		rc = -ETIMEDOUT;  in bcm_kona_send_i2c_cmd()
279 /* Read a single RX FIFO worth of data from the i2c bus */
287 	reinit_completion(&dev->done);  in bcm_kona_i2c_read_fifo_single()
290 	writel(IER_READ_COMPLETE_INT_MASK, dev->base + IER_OFFSET);  in bcm_kona_i2c_read_fifo_single()
295 		dev->base + RXFCR_OFFSET);  in bcm_kona_i2c_read_fifo_single()
298 	time_left = wait_for_completion_timeout(&dev->done, time_left);  in bcm_kona_i2c_read_fifo_single()
301 	writel(0, dev->base + IER_OFFSET);  in bcm_kona_i2c_read_fifo_single()
304 		dev_err(dev->device, "RX FIFO time out\n");  in bcm_kona_i2c_read_fifo_single()
305 		return -EREMOTEIO;  in bcm_kona_i2c_read_fifo_single()
309 	for (; len > 0; len--, buf++)  in bcm_kona_i2c_read_fifo_single()
310 		*buf = readl(dev->base + RXFIFORDOUT_OFFSET);  in bcm_kona_i2c_read_fifo_single()
315 /* Read any amount of data using the RX FIFO from the i2c bus */
324 	uint8_t *tmp_buf = msg->buf;  in bcm_kona_i2c_read_fifo()
326 	while (bytes_read < msg->len) {  in bcm_kona_i2c_read_fifo()
327 		if (msg->len - bytes_read <= MAX_RX_FIFO_SIZE) {  in bcm_kona_i2c_read_fifo()
329 			bytes_to_read = msg->len - bytes_read;  in bcm_kona_i2c_read_fifo()
335 			return -EREMOTEIO;  in bcm_kona_i2c_read_fifo()
344 /* Write a single byte of data to the i2c bus */
358 	writel(ISR_SES_DONE_MASK, dev->base + ISR_OFFSET);  in bcm_kona_i2c_write_byte()
361 	writel(IER_I2C_INT_EN_MASK, dev->base + IER_OFFSET);  in bcm_kona_i2c_write_byte()
364 	reinit_completion(&dev->done);  in bcm_kona_i2c_write_byte()
367 	writel(data, dev->base + DAT_OFFSET);  in bcm_kona_i2c_write_byte()
370 	time_left = wait_for_completion_timeout(&dev->done, time_left);  in bcm_kona_i2c_write_byte()
373 	writel(0, dev->base + IER_OFFSET);  in bcm_kona_i2c_write_byte()
376 		dev_dbg(dev->device, "controller timed out\n");  in bcm_kona_i2c_write_byte()
377 		return -ETIMEDOUT;  in bcm_kona_i2c_write_byte()
380 	nak_received = readl(dev->base + CS_OFFSET) & CS_ACK_MASK ? 1 : 0;  in bcm_kona_i2c_write_byte()
383 		dev_dbg(dev->device, "unexpected NAK/ACK\n");  in bcm_kona_i2c_write_byte()
384 		return -EREMOTEIO;  in bcm_kona_i2c_write_byte()
390 /* Write a single TX FIFO worth of data to the i2c bus */
399 	reinit_completion(&dev->done);  in bcm_kona_i2c_write_fifo_single()
403 	       dev->base + IER_OFFSET);  in bcm_kona_i2c_write_fifo_single()
406 	disable_irq(dev->irq);  in bcm_kona_i2c_write_fifo_single()
410 		writel(buf[k], (dev->base + DAT_OFFSET));  in bcm_kona_i2c_write_fifo_single()
413 	enable_irq(dev->irq);  in bcm_kona_i2c_write_fifo_single()
417 		time_left = wait_for_completion_timeout(&dev->done, time_left);  in bcm_kona_i2c_write_fifo_single()
418 		fifo_status = readl(dev->base + FIFO_STATUS_OFFSET);  in bcm_kona_i2c_write_fifo_single()
422 	writel(0, dev->base + IER_OFFSET);  in bcm_kona_i2c_write_fifo_single()
425 	if (readl(dev->base + CS_OFFSET) & CS_ACK_MASK) {  in bcm_kona_i2c_write_fifo_single()
426 		dev_err(dev->device, "unexpected NAK\n");  in bcm_kona_i2c_write_fifo_single()
427 		return -EREMOTEIO;  in bcm_kona_i2c_write_fifo_single()
432 		dev_err(dev->device, "completion timed out\n");  in bcm_kona_i2c_write_fifo_single()
433 		return -EREMOTEIO;  in bcm_kona_i2c_write_fifo_single()
440 /* Write any amount of data using TX FIFO to the i2c bus */
448 	uint8_t *tmp_buf = msg->buf;  in bcm_kona_i2c_write_fifo()
450 	while (bytes_written < msg->len) {  in bcm_kona_i2c_write_fifo()
451 		if (msg->len - bytes_written <= MAX_TX_FIFO_SIZE)  in bcm_kona_i2c_write_fifo()
452 			bytes_to_write = msg->len - bytes_written;  in bcm_kona_i2c_write_fifo()
457 			return -EREMOTEIO;  in bcm_kona_i2c_write_fifo()
466 /* Send i2c address */
472 	if (msg->flags & I2C_M_TEN) {  in bcm_kona_i2c_do_addr()
474 		addr = 0xF0 | ((msg->addr & 0x300) >> 7);  in bcm_kona_i2c_do_addr()
476 			return -EREMOTEIO;  in bcm_kona_i2c_do_addr()
479 		addr = msg->addr & 0xFF;  in bcm_kona_i2c_do_addr()
481 			return -EREMOTEIO;  in bcm_kona_i2c_do_addr()
483 		if (msg->flags & I2C_M_RD) {  in bcm_kona_i2c_do_addr()
486 				return -EREMOTEIO;  in bcm_kona_i2c_do_addr()
488 			/* Then re-send the first byte with the read bit set */  in bcm_kona_i2c_do_addr()
489 			addr = 0xF0 | ((msg->addr & 0x300) >> 7) | 0x01;  in bcm_kona_i2c_do_addr()
491 				return -EREMOTEIO;  in bcm_kona_i2c_do_addr()
497 			return -EREMOTEIO;  in bcm_kona_i2c_do_addr()
505 	writel(readl(dev->base + CLKEN_OFFSET) & ~CLKEN_AUTOSENSE_OFF_MASK,  in bcm_kona_i2c_enable_autosense()
506 	       dev->base + CLKEN_OFFSET);  in bcm_kona_i2c_enable_autosense()
511 	writel(readl(dev->base + HSTIM_OFFSET) & ~HSTIM_HS_MODE_MASK,  in bcm_kona_i2c_config_timing()
512 	       dev->base + HSTIM_OFFSET);  in bcm_kona_i2c_config_timing()
514 	writel((dev->std_cfg->prescale << TIM_PRESCALE_SHIFT) |  in bcm_kona_i2c_config_timing()
515 	       (dev->std_cfg->time_p << TIM_P_SHIFT) |  in bcm_kona_i2c_config_timing()
516 	       (dev->std_cfg->no_div << TIM_NO_DIV_SHIFT) |  in bcm_kona_i2c_config_timing()
517 	       (dev->std_cfg->time_div	<< TIM_DIV_SHIFT),  in bcm_kona_i2c_config_timing()
518 	       dev->base + TIM_OFFSET);  in bcm_kona_i2c_config_timing()
520 	writel((dev->std_cfg->time_m << CLKEN_M_SHIFT) |  in bcm_kona_i2c_config_timing()
521 	       (dev->std_cfg->time_n << CLKEN_N_SHIFT) |  in bcm_kona_i2c_config_timing()
523 	       dev->base + CLKEN_OFFSET);  in bcm_kona_i2c_config_timing()
528 	writel((dev->hs_cfg->prescale << TIM_PRESCALE_SHIFT) |  in bcm_kona_i2c_config_timing_hs()
529 	       (dev->hs_cfg->time_p << TIM_P_SHIFT) |  in bcm_kona_i2c_config_timing_hs()
530 	       (dev->hs_cfg->no_div << TIM_NO_DIV_SHIFT) |  in bcm_kona_i2c_config_timing_hs()
531 	       (dev->hs_cfg->time_div << TIM_DIV_SHIFT),  in bcm_kona_i2c_config_timing_hs()
532 	       dev->base + TIM_OFFSET);  in bcm_kona_i2c_config_timing_hs()
534 	writel((dev->hs_cfg->hs_hold << HSTIM_HS_HOLD_SHIFT) |  in bcm_kona_i2c_config_timing_hs()
535 	       (dev->hs_cfg->hs_high_phase << HSTIM_HS_HIGH_PHASE_SHIFT) |  in bcm_kona_i2c_config_timing_hs()
536 	       (dev->hs_cfg->hs_setup << HSTIM_HS_SETUP_SHIFT),  in bcm_kona_i2c_config_timing_hs()
537 	       dev->base + HSTIM_OFFSET);  in bcm_kona_i2c_config_timing_hs()
539 	writel(readl(dev->base + HSTIM_OFFSET) | HSTIM_HS_MODE_MASK,  in bcm_kona_i2c_config_timing_hs()
540 	       dev->base + HSTIM_OFFSET);  in bcm_kona_i2c_config_timing_hs()
555 	rc = clk_set_rate(dev->external_clk, HS_EXT_CLK_FREQ);  in bcm_kona_i2c_switch_to_hs()
557 		dev_err(dev->device, "%s: clk_set_rate returned %d\n",  in bcm_kona_i2c_switch_to_hs()
568 		dev_err(dev->device, "High speed restart command failed\n");  in bcm_kona_i2c_switch_to_hs()
581 	rc = clk_set_rate(dev->external_clk, STD_EXT_CLK_FREQ);  in bcm_kona_i2c_switch_to_std()
583 		dev_err(dev->device, "%s: clk_set_rate returned %d\n",  in bcm_kona_i2c_switch_to_std()
598 	rc = clk_prepare_enable(dev->external_clk);  in bcm_kona_i2c_xfer()
600 		dev_err(dev->device, "%s: peri clock enable failed. err %d\n",  in bcm_kona_i2c_xfer()
606 	writel(0, dev->base + PADCTL_OFFSET);  in bcm_kona_i2c_xfer()
614 		dev_err(dev->device, "Start command failed rc = %d\n", rc);  in bcm_kona_i2c_xfer()
619 	if (dev->hs_cfg) {  in bcm_kona_i2c_xfer()
630 		if ((i != 0) && ((pmsg->flags & I2C_M_NOSTART) == 0)) {  in bcm_kona_i2c_xfer()
633 				dev_err(dev->device,  in bcm_kona_i2c_xfer()
640 		if (!(pmsg->flags & I2C_M_NOSTART)) {  in bcm_kona_i2c_xfer()
643 				dev_err(dev->device,  in bcm_kona_i2c_xfer()
645 					pmsg->addr, i, rc);  in bcm_kona_i2c_xfer()
651 		if (pmsg->flags & I2C_M_RD) {  in bcm_kona_i2c_xfer()
654 				dev_err(dev->device, "read failure\n");  in bcm_kona_i2c_xfer()
660 				dev_err(dev->device, "write failure");  in bcm_kona_i2c_xfer()
673 	if (dev->hs_cfg) {  in bcm_kona_i2c_xfer()
682 	writel(PADCTL_PAD_OUT_EN_MASK, dev->base + PADCTL_OFFSET);  in bcm_kona_i2c_xfer()
687 	clk_disable_unprepare(dev->external_clk);  in bcm_kona_i2c_xfer()
706 	int ret = of_property_read_u32(dev->device->of_node, "clock-frequency",  in bcm_kona_i2c_assign_bus_speed()
709 		dev_err(dev->device, "missing clock-frequency property\n");  in bcm_kona_i2c_assign_bus_speed()
710 		return -ENODEV;  in bcm_kona_i2c_assign_bus_speed()
715 		dev->std_cfg = &std_cfg_table[BCM_SPD_100K];  in bcm_kona_i2c_assign_bus_speed()
718 		dev->std_cfg = &std_cfg_table[BCM_SPD_400K];  in bcm_kona_i2c_assign_bus_speed()
721 		dev->std_cfg = &std_cfg_table[BCM_SPD_1MHZ];  in bcm_kona_i2c_assign_bus_speed()
725 		dev->std_cfg = &std_cfg_table[BCM_SPD_100K];  in bcm_kona_i2c_assign_bus_speed()
726 		dev->hs_cfg = &hs_cfg_table[BCM_SPD_3P4MHZ];  in bcm_kona_i2c_assign_bus_speed()
731 		return -EINVAL;  in bcm_kona_i2c_assign_bus_speed()
744 	dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);  in bcm_kona_i2c_probe()
746 		return -ENOMEM;  in bcm_kona_i2c_probe()
749 	dev->device = &pdev->dev;  in bcm_kona_i2c_probe()
750 	init_completion(&dev->done);  in bcm_kona_i2c_probe()
753 	dev->base = devm_platform_ioremap_resource(pdev, 0);  in bcm_kona_i2c_probe()
754 	if (IS_ERR(dev->base))  in bcm_kona_i2c_probe()
755 		return PTR_ERR(dev->base);  in bcm_kona_i2c_probe()
758 	dev->external_clk = devm_clk_get(dev->device, NULL);  in bcm_kona_i2c_probe()
759 	if (IS_ERR(dev->external_clk)) {  in bcm_kona_i2c_probe()
760 		dev_err(dev->device, "couldn't get clock\n");  in bcm_kona_i2c_probe()
761 		return -ENODEV;  in bcm_kona_i2c_probe()
764 	rc = clk_set_rate(dev->external_clk, STD_EXT_CLK_FREQ);  in bcm_kona_i2c_probe()
766 		dev_err(dev->device, "%s: clk_set_rate returned %d\n",  in bcm_kona_i2c_probe()
771 	rc = clk_prepare_enable(dev->external_clk);  in bcm_kona_i2c_probe()
773 		dev_err(dev->device, "couldn't enable clock\n");  in bcm_kona_i2c_probe()
789 	writel(0, dev->base + TOUT_OFFSET);  in bcm_kona_i2c_probe()
796 	       dev->base + TXFCR_OFFSET);  in bcm_kona_i2c_probe()
799 	writel(0, dev->base + IER_OFFSET);  in bcm_kona_i2c_probe()
808 	       dev->base + ISR_OFFSET);  in bcm_kona_i2c_probe()
811 	dev->irq = platform_get_irq(pdev, 0);  in bcm_kona_i2c_probe()
812 	if (dev->irq < 0) {  in bcm_kona_i2c_probe()
813 		rc = dev->irq;  in bcm_kona_i2c_probe()
818 	rc = devm_request_irq(&pdev->dev, dev->irq, bcm_kona_i2c_isr,  in bcm_kona_i2c_probe()
819 			      IRQF_SHARED, pdev->name, dev);  in bcm_kona_i2c_probe()
821 		dev_err(dev->device, "failed to request irq %i\n", dev->irq);  in bcm_kona_i2c_probe()
829 	writel(PADCTL_PAD_OUT_EN_MASK, dev->base + PADCTL_OFFSET);  in bcm_kona_i2c_probe()
835 	clk_disable_unprepare(dev->external_clk);  in bcm_kona_i2c_probe()
837 	/* Add the i2c adapter */  in bcm_kona_i2c_probe()
838 	adap = &dev->adapter;  in bcm_kona_i2c_probe()
840 	adap->owner = THIS_MODULE;  in bcm_kona_i2c_probe()
841 	strscpy(adap->name, "Broadcom I2C adapter", sizeof(adap->name));  in bcm_kona_i2c_probe()
842 	adap->algo = &bcm_algo;  in bcm_kona_i2c_probe()
843 	adap->dev.parent = &pdev->dev;  in bcm_kona_i2c_probe()
844 	adap->dev.of_node = pdev->dev.of_node;  in bcm_kona_i2c_probe()
850 	dev_info(dev->device, "device registered successfully\n");  in bcm_kona_i2c_probe()
856 	clk_disable_unprepare(dev->external_clk);  in bcm_kona_i2c_probe()
865 	i2c_del_adapter(&dev->adapter);  in bcm_kona_i2c_remove()
869 	{.compatible = "brcm,kona-i2c",},
876 		   .name = "bcm-kona-i2c",
885 MODULE_DESCRIPTION("Broadcom Kona I2C Driver");