Lines Matching +full:0 +full:- +full:datasheet
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * w83791d.c - Part of lm_sensors, Linux kernel modules for hardware
6 * Copyright (C) 2006-2007 Charles Spirakis <[email protected]>
13 * w83791d 10 5 5 3 0x71 0x5ca3 yes no
19 * The w83791g chip is the same as the w83791d but lead-free.
27 #include <linux/hwmon-vid.h>
28 #include <linux/hwmon-sysfs.h>
39 static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f,
45 module_param_array(force_subclients, short, NULL, 0);
50 module_param(reset, bool, 0);
54 module_param(init, bool, 0);
59 0x20, /* VCOREA in DataSheet */
60 0x21, /* VINR0 in DataSheet */
61 0x22, /* +3.3VIN in DataSheet */
62 0x23, /* VDD5V in DataSheet */
63 0x24, /* +12VIN in DataSheet */
64 0x25, /* -12VIN in DataSheet */
65 0x26, /* -5VIN in DataSheet */
66 0xB0, /* 5VSB in DataSheet */
67 0xB1, /* VBAT in DataSheet */
68 0xB2 /* VINR1 in DataSheet */
72 0x2B, /* VCOREA High Limit in DataSheet */
73 0x2D, /* VINR0 High Limit in DataSheet */
74 0x2F, /* +3.3VIN High Limit in DataSheet */
75 0x31, /* VDD5V High Limit in DataSheet */
76 0x33, /* +12VIN High Limit in DataSheet */
77 0x35, /* -12VIN High Limit in DataSheet */
78 0x37, /* -5VIN High Limit in DataSheet */
79 0xB4, /* 5VSB High Limit in DataSheet */
80 0xB6, /* VBAT High Limit in DataSheet */
81 0xB8 /* VINR1 High Limit in DataSheet */
84 0x2C, /* VCOREA Low Limit in DataSheet */
85 0x2E, /* VINR0 Low Limit in DataSheet */
86 0x30, /* +3.3VIN Low Limit in DataSheet */
87 0x32, /* VDD5V Low Limit in DataSheet */
88 0x34, /* +12VIN Low Limit in DataSheet */
89 0x36, /* -12VIN Low Limit in DataSheet */
90 0x38, /* -5VIN Low Limit in DataSheet */
91 0xB5, /* 5VSB Low Limit in DataSheet */
92 0xB7, /* VBAT Low Limit in DataSheet */
93 0xB9 /* VINR1 Low Limit in DataSheet */
96 0x28, /* FAN 1 Count in DataSheet */
97 0x29, /* FAN 2 Count in DataSheet */
98 0x2A, /* FAN 3 Count in DataSheet */
99 0xBA, /* FAN 4 Count in DataSheet */
100 0xBB, /* FAN 5 Count in DataSheet */
103 0x3B, /* FAN 1 Count Low Limit in DataSheet */
104 0x3C, /* FAN 2 Count Low Limit in DataSheet */
105 0x3D, /* FAN 3 Count Low Limit in DataSheet */
106 0xBC, /* FAN 4 Count Low Limit in DataSheet */
107 0xBD, /* FAN 5 Count Low Limit in DataSheet */
111 0x81, /* PWM 1 duty cycle register in DataSheet */
112 0x83, /* PWM 2 duty cycle register in DataSheet */
113 0x94, /* PWM 3 duty cycle register in DataSheet */
114 0xA0, /* PWM 4 duty cycle register in DataSheet */
115 0xA1, /* PWM 5 duty cycle register in DataSheet */
119 0x85, /* PWM 1 target temperature for temp 1 */
120 0x86, /* PWM 2 target temperature for temp 2 */
121 0x96, /* PWM 3 target temperature for temp 3 */
125 0x87, /* PWM 1/2 temperature tolerance */
126 0x97, /* PWM 3 temperature tolerance */
130 0x84, /* FAN 1/2 configuration */
131 0x95, /* FAN 3 configuration */
135 0x47, /* contains FAN1 and FAN2 Divisor */
136 0x4b, /* contains FAN3 Divisor */
137 0x5C, /* contains FAN4 and FAN5 Divisor */
140 #define W83791D_REG_BANK 0x4E
141 #define W83791D_REG_TEMP2_CONFIG 0xC2
142 #define W83791D_REG_TEMP3_CONFIG 0xCA
145 0x27, /* TEMP 1 in DataSheet */
146 0x39, /* TEMP 1 Over in DataSheet */
147 0x3A, /* TEMP 1 Hyst in DataSheet */
151 {0xC0, /* TEMP 2 in DataSheet */
152 0xC1, /* TEMP 2(0.5 deg) in DataSheet */
153 0xC5, /* TEMP 2 Over High part in DataSheet */
154 0xC6, /* TEMP 2 Over Low part in DataSheet */
155 0xC3, /* TEMP 2 Thyst High part in DataSheet */
156 0xC4}, /* TEMP 2 Thyst Low part in DataSheet */
157 {0xC8, /* TEMP 3 in DataSheet */
158 0xC9, /* TEMP 3(0.5 deg) in DataSheet */
159 0xCD, /* TEMP 3 Over High part in DataSheet */
160 0xCE, /* TEMP 3 Over Low part in DataSheet */
161 0xCB, /* TEMP 3 Thyst High part in DataSheet */
162 0xCC} /* TEMP 3 Thyst Low part in DataSheet */
165 #define W83791D_REG_BEEP_CONFIG 0x4D
168 0x56, /* BEEP Control Register 1 */
169 0x57, /* BEEP Control Register 2 */
170 0xA3, /* BEEP Control Register 3 */
173 #define W83791D_REG_GPIO 0x15
174 #define W83791D_REG_CONFIG 0x40
175 #define W83791D_REG_VID_FANDIV 0x47
176 #define W83791D_REG_DID_VID4 0x49
177 #define W83791D_REG_WCHIPID 0x58
178 #define W83791D_REG_CHIPMAN 0x4F
179 #define W83791D_REG_PIN 0x4B
180 #define W83791D_REG_I2C_SUBADDR 0x4A
182 #define W83791D_REG_ALARM1 0xA9 /* realtime status register1 */
183 #define W83791D_REG_ALARM2 0xAA /* realtime status register2 */
184 #define W83791D_REG_ALARM3 0xAB /* realtime status register3 */
186 #define W83791D_REG_VBAT 0x5D
187 #define W83791D_REG_I2C_ADDR 0x48
191 * (index 0x4e), but the driver only accesses registers in bank 0. Since
210 #define IN_TO_REG(val) (clamp_val((((val) + 8) / 16), 0, 255))
215 if (rpm == 0) in fan_to_reg()
221 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : \
222 ((val) == 255 ? 0 : \
225 /* for temp1 which is 8-bit resolution, LSB = 1 degree Celsius */
227 #define TEMP1_TO_REG(val) ((val) <= -128000 ? -128 : \
229 (val) < 0 ? ((val) - 500) / 1000 : \
233 * for temp2 and temp3 which are 9-bit resolution, LSB = 0.5 degree Celsius
239 #define TEMP23_TO_REG(val) (DIV_ROUND_CLOSEST(clamp_val((val), -128000, \
242 /* for thermal cruise target temp, 7-bits, LSB = 1 degree Celsius */
243 #define TARGET_TEMP_TO_REG(val) DIV_ROUND_CLOSEST(clamp_val((val), 0, 127000), \
246 /* for thermal cruise temp tolerance, 4-bits, LSB = 1 degree Celsius */
247 #define TOL_TEMP_TO_REG(val) DIV_ROUND_CLOSEST(clamp_val((val), 0, 15000), \
250 #define BEEP_MASK_TO_REG(val) ((val) & 0xffffff)
251 #define BEEP_MASK_FROM_REG(val) ((val) & 0xffffff)
261 for (i = 0; i < 7; i++) { in div_to_reg()
262 if (val == 0) in div_to_reg()
300 u8 pwm_enable[3]; /* pwm enable status for fan 1-3
301 * (fan 4-5 only support manual mode)
304 u8 temp_target[3]; /* pwm 1-3 target temperature */
305 u8 temp_tolerance[3]; /* pwm 1-3 temperature tolerance */
312 u8 vrm; /* hwmon-vid */
356 int nr = sensor_attr->index; \
357 return sprintf(buf, "%d\n", IN_FROM_REG(data->reg[nr])); \
373 int nr = sensor_attr->index; \
378 mutex_lock(&data->update_lock); \
379 data->in_##reg[nr] = IN_TO_REG(val); \
380 w83791d_write(client, W83791D_REG_IN_##REG[nr], data->in_##reg[nr]); \
381 mutex_unlock(&data->update_lock); \
389 SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),
402 SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),
415 SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),
434 int bitnr = sensor_attr->index; in show_beep()
436 return sprintf(buf, "%d\n", (data->beep_mask >> bitnr) & 1); in show_beep()
446 int bitnr = sensor_attr->index; in store_beep()
455 val = val ? 1 : 0; in store_beep()
457 mutex_lock(&data->update_lock); in store_beep()
459 data->beep_mask &= ~(0xff << (bytenr * 8)); in store_beep()
460 data->beep_mask |= w83791d_read(client, W83791D_REG_BEEP_CTRL[bytenr]) in store_beep()
463 data->beep_mask &= ~(1 << bitnr); in store_beep()
464 data->beep_mask |= val << bitnr; in store_beep()
467 (data->beep_mask >> (bytenr * 8)) & 0xff); in store_beep()
469 mutex_unlock(&data->update_lock); in store_beep()
480 int bitnr = sensor_attr->index; in show_alarm()
482 return sprintf(buf, "%d\n", (data->alarms >> bitnr) & 1); in show_alarm()
490 SENSOR_ATTR(in0_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 0),
503 SENSOR_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0),
522 int nr = sensor_attr->index; \
524 FAN_FROM_REG(data->reg[nr], DIV_FROM_REG(data->fan_div[nr]))); \
536 int nr = sensor_attr->index; in store_fan_min()
544 mutex_lock(&data->update_lock); in store_fan_min()
545 data->fan_min[nr] = fan_to_reg(val, DIV_FROM_REG(data->fan_div[nr])); in store_fan_min()
546 w83791d_write(client, W83791D_REG_FAN_MIN[nr], data->fan_min[nr]); in store_fan_min()
547 mutex_unlock(&data->update_lock); in store_fan_min()
556 int nr = sensor_attr->index; in show_fan_div()
558 return sprintf(buf, "%u\n", DIV_FROM_REG(data->fan_div[nr])); in show_fan_div()
573 int nr = sensor_attr->index; in store_fan_div()
578 int indx = 0; in store_fan_div()
579 u8 keep_mask = 0; in store_fan_div()
580 u8 new_shift = 0; in store_fan_div()
589 min = FAN_FROM_REG(data->fan_min[nr], DIV_FROM_REG(data->fan_div[nr])); in store_fan_div()
591 mutex_lock(&data->update_lock); in store_fan_div()
592 data->fan_div[nr] = div_to_reg(nr, val); in store_fan_div()
595 case 0: in store_fan_div()
596 indx = 0; in store_fan_div()
597 keep_mask = 0xcf; in store_fan_div()
601 indx = 0; in store_fan_div()
602 keep_mask = 0x3f; in store_fan_div()
607 keep_mask = 0x3f; in store_fan_div()
612 keep_mask = 0xf8; in store_fan_div()
613 new_shift = 0; in store_fan_div()
617 keep_mask = 0x8f; in store_fan_div()
623 count = -EINVAL; in store_fan_div()
630 tmp_fan_div = (data->fan_div[nr] << new_shift) & ~keep_mask; in store_fan_div()
635 /* Bit 2 of fans 0-2 is stored in the vbat register (bits 5-7) */ in store_fan_div()
640 tmp_fan_div = (data->fan_div[nr] << (3 + nr)) & ~keep_mask; in store_fan_div()
646 data->fan_min[nr] = fan_to_reg(min, DIV_FROM_REG(data->fan_div[nr])); in store_fan_div()
647 w83791d_write(client, W83791D_REG_FAN_MIN[nr], data->fan_min[nr]); in store_fan_div()
652 mutex_unlock(&data->update_lock); in store_fan_div()
658 SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
667 show_fan_min, store_fan_min, 0),
680 show_fan_div, store_fan_div, 0),
712 int nr = sensor_attr->index; in show_pwm()
714 return sprintf(buf, "%u\n", data->pwm[nr]); in show_pwm()
723 int nr = sensor_attr->index; in store_pwm()
727 return -EINVAL; in store_pwm()
729 mutex_lock(&data->update_lock); in store_pwm()
730 data->pwm[nr] = clamp_val(val, 0, 255); in store_pwm()
731 w83791d_write(client, W83791D_REG_PWM[nr], data->pwm[nr]); in store_pwm()
732 mutex_unlock(&data->update_lock); in store_pwm()
738 show_pwm, store_pwm, 0),
753 int nr = sensor_attr->index; in show_pwmenable()
755 return sprintf(buf, "%u\n", data->pwm_enable[nr] + 1); in show_pwmenable()
764 int nr = sensor_attr->index; in store_pwmenable()
767 u8 reg_idx = 0; in store_pwmenable()
768 u8 val_shift = 0; in store_pwmenable()
769 u8 keep_mask = 0; in store_pwmenable()
774 return -EINVAL; in store_pwmenable()
776 mutex_lock(&data->update_lock); in store_pwmenable()
777 data->pwm_enable[nr] = val - 1; in store_pwmenable()
779 case 0: in store_pwmenable()
780 reg_idx = 0; in store_pwmenable()
782 keep_mask = 0xf3; in store_pwmenable()
785 reg_idx = 0; in store_pwmenable()
787 keep_mask = 0xcf; in store_pwmenable()
792 keep_mask = 0xf3; in store_pwmenable()
798 data->pwm_enable[nr] << val_shift; in store_pwmenable()
801 mutex_unlock(&data->update_lock); in store_pwmenable()
807 show_pwmenable, store_pwmenable, 0),
820 int nr = sensor_attr->index; in show_temp_target()
821 return sprintf(buf, "%d\n", TEMP1_FROM_REG(data->temp_target[nr])); in show_temp_target()
830 int nr = sensor_attr->index; in store_temp_target()
835 return -EINVAL; in store_temp_target()
837 mutex_lock(&data->update_lock); in store_temp_target()
838 data->temp_target[nr] = TARGET_TEMP_TO_REG(val); in store_temp_target()
840 W83791D_REG_TEMP_TARGET[nr]) & 0x80; in store_temp_target()
842 data->temp_target[nr] | target_mask); in store_temp_target()
843 mutex_unlock(&data->update_lock); in store_temp_target()
849 show_temp_target, store_temp_target, 0),
861 int nr = sensor_attr->index; in show_temp_tolerance()
862 return sprintf(buf, "%d\n", TEMP1_FROM_REG(data->temp_tolerance[nr])); in show_temp_tolerance()
871 int nr = sensor_attr->index; in store_temp_tolerance()
874 u8 reg_idx = 0; in store_temp_tolerance()
875 u8 val_shift = 0; in store_temp_tolerance()
876 u8 keep_mask = 0; in store_temp_tolerance()
879 return -EINVAL; in store_temp_tolerance()
882 case 0: in store_temp_tolerance()
883 reg_idx = 0; in store_temp_tolerance()
884 val_shift = 0; in store_temp_tolerance()
885 keep_mask = 0xf0; in store_temp_tolerance()
888 reg_idx = 0; in store_temp_tolerance()
890 keep_mask = 0x0f; in store_temp_tolerance()
894 val_shift = 0; in store_temp_tolerance()
895 keep_mask = 0xf0; in store_temp_tolerance()
899 mutex_lock(&data->update_lock); in store_temp_tolerance()
900 data->temp_tolerance[nr] = TOL_TEMP_TO_REG(val); in store_temp_tolerance()
904 (data->temp_tolerance[nr] << val_shift) | target_mask); in store_temp_tolerance()
905 mutex_unlock(&data->update_lock); in store_temp_tolerance()
911 show_temp_tolerance, store_temp_tolerance, 0),
924 return sprintf(buf, "%d\n", TEMP1_FROM_REG(data->temp1[attr->index])); in show_temp1()
933 int nr = attr->index; in store_temp1()
941 mutex_lock(&data->update_lock); in store_temp1()
942 data->temp1[nr] = TEMP1_TO_REG(val); in store_temp1()
943 w83791d_write(client, W83791D_REG_TEMP1[nr], data->temp1[nr]); in store_temp1()
944 mutex_unlock(&data->update_lock); in store_temp1()
948 /* read/write temperature2-3, includes measured value and limits */
954 int nr = attr->nr; in show_temp23()
955 int index = attr->index; in show_temp23()
956 return sprintf(buf, "%d\n", TEMP23_FROM_REG(data->temp_add[nr][index])); in show_temp23()
968 int nr = attr->nr; in store_temp23()
969 int index = attr->index; in store_temp23()
975 mutex_lock(&data->update_lock); in store_temp23()
976 data->temp_add[nr][index] = TEMP23_TO_REG(val); in store_temp23()
978 data->temp_add[nr][index] >> 8); in store_temp23()
980 data->temp_add[nr][index] & 0x80); in store_temp23()
981 mutex_unlock(&data->update_lock); in store_temp23()
987 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp1, NULL, 0, 0),
988 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp23, NULL, 0, 0),
989 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp23, NULL, 1, 0),
994 show_temp1, store_temp1, 0, 1),
996 show_temp23, store_temp23, 0, 1),
1003 show_temp1, store_temp1, 0, 2),
1005 show_temp23, store_temp23, 0, 2),
1031 return sprintf(buf, "%u\n", data->alarms); in alarms_show()
1045 return sprintf(buf, "%d\n", data->beep_enable); in show_beep_enable()
1052 return sprintf(buf, "%d\n", BEEP_MASK_FROM_REG(data->beep_mask)); in show_beep_mask()
1070 mutex_lock(&data->update_lock); in store_beep_mask()
1076 data->beep_mask = BEEP_MASK_TO_REG(val) & ~GLOBAL_BEEP_ENABLE_MASK; in store_beep_mask()
1077 data->beep_mask |= (data->beep_enable << GLOBAL_BEEP_ENABLE_SHIFT); in store_beep_mask()
1079 val = data->beep_mask; in store_beep_mask()
1081 for (i = 0; i < 3; i++) { in store_beep_mask()
1082 w83791d_write(client, W83791D_REG_BEEP_CTRL[i], (val & 0xff)); in store_beep_mask()
1086 mutex_unlock(&data->update_lock); in store_beep_mask()
1104 mutex_lock(&data->update_lock); in store_beep_enable()
1106 data->beep_enable = val ? 1 : 0; in store_beep_enable()
1109 data->beep_mask &= ~GLOBAL_BEEP_ENABLE_MASK; in store_beep_enable()
1110 data->beep_mask |= (data->beep_enable << GLOBAL_BEEP_ENABLE_SHIFT); in store_beep_enable()
1116 val = (data->beep_mask >> 8) & 0xff; in store_beep_enable()
1120 mutex_unlock(&data->update_lock); in store_beep_enable()
1127 show_beep_enable, store_beep_enable, 0),
1137 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm)); in cpu0_vid_show()
1146 return sprintf(buf, "%d\n", data->vrm); in vrm_show()
1167 return -EINVAL; in vrm_store()
1169 data->vrm = val; in vrm_store()
1197 IN_UNIT_ATTRS(0),
1207 FAN_UNIT_ATTRS(0),
1210 TEMP_UNIT_ATTRS(0),
1214 &sda_beep_ctrl[0].dev_attr.attr,
1218 &sda_pwm[0].dev_attr.attr,
1221 &sda_pwmenable[0].dev_attr.attr,
1224 &sda_temp_target[0].dev_attr.attr,
1227 &sda_temp_tolerance[0].dev_attr.attr,
1238 * Separate group of attributes for fan/pwm 4-5. Their pins can also be
1239 * in use for GPIO in which case their sysfs-interface should not be made
1256 struct i2c_adapter *adapter = client->adapter; in w83791d_detect_subclients()
1257 int address = client->addr; in w83791d_detect_subclients()
1262 if (force_subclients[0] == id && force_subclients[1] == address) { in w83791d_detect_subclients()
1264 if (force_subclients[i] < 0x48 || in w83791d_detect_subclients()
1265 force_subclients[i] > 0x4f) { in w83791d_detect_subclients()
1266 dev_err(&client->dev, in w83791d_detect_subclients()
1268 "address %d; must be 0x48-0x4f\n", in w83791d_detect_subclients()
1270 return -ENODEV; in w83791d_detect_subclients()
1274 (force_subclients[2] & 0x07) | in w83791d_detect_subclients()
1275 ((force_subclients[3] & 0x07) << 4)); in w83791d_detect_subclients()
1280 if (!(val & 0x88) && (val & 0x7) == ((val >> 4) & 0x7)) { in w83791d_detect_subclients()
1281 dev_err(&client->dev, in w83791d_detect_subclients()
1282 "duplicate addresses 0x%x, use force_subclient\n", 0x48 + (val & 0x7)); in w83791d_detect_subclients()
1283 return -ENODEV; in w83791d_detect_subclients()
1286 if (!(val & 0x08)) in w83791d_detect_subclients()
1287 devm_i2c_new_dummy_device(&client->dev, adapter, 0x48 + (val & 0x7)); in w83791d_detect_subclients()
1289 if (!(val & 0x80)) in w83791d_detect_subclients()
1290 devm_i2c_new_dummy_device(&client->dev, adapter, 0x48 + ((val >> 4) & 0x7)); in w83791d_detect_subclients()
1292 return 0; in w83791d_detect_subclients()
1296 /* Return 0 if detection is successful, -ENODEV otherwise */
1300 struct i2c_adapter *adapter = client->adapter; in w83791d_detect()
1302 unsigned short address = client->addr; in w83791d_detect()
1305 return -ENODEV; in w83791d_detect()
1307 if (w83791d_read(client, W83791D_REG_CONFIG) & 0x80) in w83791d_detect()
1308 return -ENODEV; in w83791d_detect()
1312 /* Check for Winbond ID if in bank 0 */ in w83791d_detect()
1313 if (!(val1 & 0x07)) { in w83791d_detect()
1314 if ((!(val1 & 0x80) && val2 != 0xa3) || in w83791d_detect()
1315 ((val1 & 0x80) && val2 != 0x5c)) { in w83791d_detect()
1316 return -ENODEV; in w83791d_detect()
1324 return -ENODEV; in w83791d_detect()
1326 /* We want bank 0 and Vendor ID high byte */ in w83791d_detect()
1327 val1 = w83791d_read(client, W83791D_REG_BANK) & 0x78; in w83791d_detect()
1328 w83791d_write(client, W83791D_REG_BANK, val1 | 0x80); in w83791d_detect()
1333 if (val1 != 0x71 || val2 != 0x5c) in w83791d_detect()
1334 return -ENODEV; in w83791d_detect()
1336 strscpy(info->type, "w83791d", I2C_NAME_SIZE); in w83791d_detect()
1338 return 0; in w83791d_detect()
1344 struct device *dev = &client->dev; in w83791d_probe()
1351 dev_dbg(dev, "Device ID version: %d.%d (0x%02x)\n", in w83791d_probe()
1352 (val1 >> 5) & 0x07, (val1 >> 1) & 0x0f, val1); in w83791d_probe()
1355 data = devm_kzalloc(&client->dev, sizeof(struct w83791d_data), in w83791d_probe()
1358 return -ENOMEM; in w83791d_probe()
1361 mutex_init(&data->update_lock); in w83791d_probe()
1374 for (i = 0; i < NUMBER_OF_FANIN; i++) in w83791d_probe()
1375 data->fan_min[i] = w83791d_read(client, W83791D_REG_FAN_MIN[i]); in w83791d_probe()
1378 err = sysfs_create_group(&client->dev.kobj, &w83791d_group); in w83791d_probe()
1382 /* Check if pins of fan/pwm 4-5 are in use as GPIO */ in w83791d_probe()
1383 has_fanpwm45 = w83791d_read(client, W83791D_REG_GPIO) & 0x10; in w83791d_probe()
1385 err = sysfs_create_group(&client->dev.kobj, in w83791d_probe()
1392 data->hwmon_dev = hwmon_device_register(dev); in w83791d_probe()
1393 if (IS_ERR(data->hwmon_dev)) { in w83791d_probe()
1394 err = PTR_ERR(data->hwmon_dev); in w83791d_probe()
1398 return 0; in w83791d_probe()
1402 sysfs_remove_group(&client->dev.kobj, &w83791d_group_fanpwm45); in w83791d_probe()
1404 sysfs_remove_group(&client->dev.kobj, &w83791d_group); in w83791d_probe()
1412 hwmon_device_unregister(data->hwmon_dev); in w83791d_remove()
1413 sysfs_remove_group(&client->dev.kobj, &w83791d_group); in w83791d_remove()
1424 * does a hard reset of the chip via index 0x40, bit 7, in w83791d_init_client()
1427 * thing (which is why the default is reset=0, init=0), in w83791d_init_client()
1433 * the hard reset puts everything into a power-on state so I'm in w83791d_init_client()
1442 w83791d_write(client, W83791D_REG_CONFIG, 0x80); in w83791d_init_client()
1445 /* ... disable power-on abnormal beep */ in w83791d_init_client()
1446 w83791d_write(client, W83791D_REG_BEEP_CONFIG, old_beep | 0x80); in w83791d_init_client()
1450 w83791d_write(client, W83791D_REG_BEEP_CTRL[1], tmp & 0xef); in w83791d_init_client()
1453 /* Make sure monitoring is turned on for add-ons */ in w83791d_init_client()
1457 tmp & 0xfe); in w83791d_init_client()
1463 tmp & 0xfe); in w83791d_init_client()
1467 tmp = w83791d_read(client, W83791D_REG_CONFIG) & 0xf7; in w83791d_init_client()
1468 w83791d_write(client, W83791D_REG_CONFIG, tmp | 0x01); in w83791d_init_client()
1472 data->vrm = vid_which_vrm(); in w83791d_init_client()
1483 mutex_lock(&data->update_lock); in w83791d_update_device()
1485 if (time_after(jiffies, data->last_updated + (HZ * 3)) in w83791d_update_device()
1486 || !data->valid) { in w83791d_update_device()
1490 for (i = 0; i < NUMBER_OF_VIN; i++) { in w83791d_update_device()
1491 data->in[i] = w83791d_read(client, in w83791d_update_device()
1493 data->in_max[i] = w83791d_read(client, in w83791d_update_device()
1495 data->in_min[i] = w83791d_read(client, in w83791d_update_device()
1500 for (i = 0; i < NUMBER_OF_FANIN; i++) { in w83791d_update_device()
1502 data->fan[i] = w83791d_read(client, in w83791d_update_device()
1504 data->fan_min[i] = w83791d_read(client, in w83791d_update_device()
1509 for (i = 0; i < 3; i++) { in w83791d_update_device()
1513 data->fan_div[0] = (reg_array_tmp[0] >> 4) & 0x03; in w83791d_update_device()
1514 data->fan_div[1] = (reg_array_tmp[0] >> 6) & 0x03; in w83791d_update_device()
1515 data->fan_div[2] = (reg_array_tmp[1] >> 6) & 0x03; in w83791d_update_device()
1516 data->fan_div[3] = reg_array_tmp[2] & 0x07; in w83791d_update_device()
1517 data->fan_div[4] = (reg_array_tmp[2] >> 4) & 0x07; in w83791d_update_device()
1520 * The fan divisor for fans 0-2 get bit 2 from in w83791d_update_device()
1521 * bits 5-7 respectively of vbat register in w83791d_update_device()
1524 for (i = 0; i < 3; i++) in w83791d_update_device()
1525 data->fan_div[i] |= (vbat_reg >> (3 + i)) & 0x04; in w83791d_update_device()
1528 for (i = 0; i < NUMBER_OF_PWM; i++) { in w83791d_update_device()
1529 data->pwm[i] = w83791d_read(client, in w83791d_update_device()
1534 for (i = 0; i < 2; i++) { in w83791d_update_device()
1538 data->pwm_enable[0] = (reg_array_tmp[0] >> 2) & 0x03; in w83791d_update_device()
1539 data->pwm_enable[1] = (reg_array_tmp[0] >> 4) & 0x03; in w83791d_update_device()
1540 data->pwm_enable[2] = (reg_array_tmp[1] >> 2) & 0x03; in w83791d_update_device()
1543 for (i = 0; i < 3; i++) { in w83791d_update_device()
1544 data->temp_target[i] = w83791d_read(client, in w83791d_update_device()
1545 W83791D_REG_TEMP_TARGET[i]) & 0x7f; in w83791d_update_device()
1549 for (i = 0; i < 2; i++) { in w83791d_update_device()
1553 data->temp_tolerance[0] = reg_array_tmp[0] & 0x0f; in w83791d_update_device()
1554 data->temp_tolerance[1] = (reg_array_tmp[0] >> 4) & 0x0f; in w83791d_update_device()
1555 data->temp_tolerance[2] = reg_array_tmp[1] & 0x0f; in w83791d_update_device()
1558 for (i = 0; i < 3; i++) { in w83791d_update_device()
1559 data->temp1[i] = w83791d_read(client, in w83791d_update_device()
1564 for (i = 0; i < 2; i++) { in w83791d_update_device()
1565 for (j = 0; j < 3; j++) { in w83791d_update_device()
1566 data->temp_add[i][j] = in w83791d_update_device()
1575 data->alarms = in w83791d_update_device()
1581 data->beep_mask = in w83791d_update_device()
1582 w83791d_read(client, W83791D_REG_BEEP_CTRL[0]) + in w83791d_update_device()
1587 data->beep_enable = in w83791d_update_device()
1588 (data->beep_mask >> GLOBAL_BEEP_ENABLE_SHIFT) & 0x01; in w83791d_update_device()
1592 data->vid = i & 0x0f; in w83791d_update_device()
1593 data->vid |= (w83791d_read(client, W83791D_REG_DID_VID4) & 0x01) in w83791d_update_device()
1596 data->last_updated = jiffies; in w83791d_update_device()
1597 data->valid = true; in w83791d_update_device()
1600 mutex_unlock(&data->update_lock); in w83791d_update_device()
1612 int i = 0, j = 0; in w83791d_print_debug()
1616 for (i = 0; i < NUMBER_OF_VIN; i++) { in w83791d_print_debug()
1617 dev_dbg(dev, "vin[%d] is: 0x%02x\n", i, data->in[i]); in w83791d_print_debug()
1618 dev_dbg(dev, "vin[%d] min is: 0x%02x\n", i, data->in_min[i]); in w83791d_print_debug()
1619 dev_dbg(dev, "vin[%d] max is: 0x%02x\n", i, data->in_max[i]); in w83791d_print_debug()
1622 for (i = 0; i < NUMBER_OF_FANIN; i++) { in w83791d_print_debug()
1623 dev_dbg(dev, "fan[%d] is: 0x%02x\n", i, data->fan[i]); in w83791d_print_debug()
1624 dev_dbg(dev, "fan[%d] min is: 0x%02x\n", i, data->fan_min[i]); in w83791d_print_debug()
1625 dev_dbg(dev, "fan_div[%d] is: 0x%02x\n", i, data->fan_div[i]); in w83791d_print_debug()
1633 for (i = 0; i < 3; i++) in w83791d_print_debug()
1634 dev_dbg(dev, "temp1[%d] is: 0x%02x\n", i, (u8) data->temp1[i]); in w83791d_print_debug()
1635 for (i = 0; i < 2; i++) { in w83791d_print_debug()
1636 for (j = 0; j < 3; j++) { in w83791d_print_debug()
1637 dev_dbg(dev, "temp_add[%d][%d] is: 0x%04x\n", i, j, in w83791d_print_debug()
1638 (u16) data->temp_add[i][j]); in w83791d_print_debug()
1643 dev_dbg(dev, "alarm is: 0x%08x\n", data->alarms); in w83791d_print_debug()
1644 dev_dbg(dev, "beep_mask is: 0x%08x\n", data->beep_mask); in w83791d_print_debug()
1645 dev_dbg(dev, "beep_enable is: %d\n", data->beep_enable); in w83791d_print_debug()
1646 dev_dbg(dev, "vid is: 0x%02x\n", data->vid); in w83791d_print_debug()
1647 dev_dbg(dev, "vrm is: 0x%02x\n", data->vrm); in w83791d_print_debug()