Lines Matching +full:2 +full:nd
88 /* Touch Device Interrupt Cause register Format Configuration Register 2 */
139 /* THC Read PRD Base Address Low for the 2nd RXDMA */
141 /* THC Read PRD Base Address High for the 2nd RXDMA */
143 /* THC Read PRD Control for the 2nd RXDMA */
145 /* THC Read DMA Control for the 2nd RXDMA */
147 /* THC Read Interrupt Status for the 2nd RXDMA */
149 /* THC Read DMA Error Register for the 2nd RXDMA */
151 /* Touch Sequencer GuC Tail Offset Address Low for the 2nd RXDMA */
153 /* Touch Sequencer GuC Tail Offset Address High for the 2nd RXDMA */
155 /* Touch Host Controller GuC Work Queue Item Size for the 2nd RXDMA */
157 /* Touch Host Controller GuC Control register for the 2nd RXDMA */
159 /* Touch Sequencer Control for the 2nd DMA */
161 /* Touch Sequencer GuC Doorbell Address Low for the 2nd RXDMA */
163 /* Touch Sequencer GuC Doorbell Address High for the 2nd RXDMA */
167 /* Touch Sequencer GuC Tail Offset Initial Value for the 2nd RXDMA */
169 /* THC Device Address for the bulk/touch data read for the 2nd RXDMA */
171 /* THC Gfx/SW Doorbell Count from the 2nd Stream RXDMA on this port */
173 /* THC Frame Count from the 2nd Stream RXDMA on this port */
175 /* THC Micro Frame Count from the 2nd Stream RXDMA on this port */
177 /* THC Packet Count from the 2nd Stream RXDMA on this port */
180 * THC Software Interrupt Count from the 2nd Stream RXDMA
184 /* Touch Sequencer Frame Drop Counter for the 2nd RXDMA */
186 /* THC Coaescing 2 */
212 /* THC timing based Frame/Interrupt caolescing control register for 2nd RXDMA */
216 /* Touch Sequencer PRD Table Empty Counter for the 2nd RXDM */
220 /* THC coalescing status to reflect the current coalescing FSM state for 2nd RXDMA */
251 #define THC_CFG_STS_CMD_BME BIT(2)
282 #define THC_CFG_BAR0_LOW_TYP GENMASK(2, 1)
298 #define THC_CFG_UR_STS_CTL_FD BIT(2)
307 #define THC_CFG_MSIMA_MADDR GENMASK(31, 2)
350 #define THC_CFG_PCE_D3HE BIT(2)
361 #define THC_M_CMN_DEVIDLECTRL_DEVIDLE BIT(2)
368 #define THC_M_CMN_LTR_CTRL_LP_LTR_REQ BIT(2)
378 #define THC_M_PRT_CONTROL_THC_DEVINT_QUIESCE_HW_STS BIT(2)
390 #define THC_M_PRT_SPI_CFG_SPI_TRMODE GENMASK(3, 2)
404 #define THC_M_PRT_INT_EN_SIDR BIT(2)
463 #define THC_M_PRT_WRITE_DMA_CNTRL_THC_WRDMA_IE_IOC BIT(2)
470 #define THC_M_PRT_WRITE_INT_STS_THC_WRDMA_IOC_STS BIT(2)
517 #define THC_M_PRT_READ_DMA_CNTRL_IE_IOC BIT(2)
531 #define THC_M_PRT_READ_DMA_INT_STS_IOC_STS BIT(2)
546 #define THC_M_PRT_TSEQ_CNTRL_1_RGD BIT(2)
555 #define THC_M_PRT_GUC_DB_ADDR_LOW_1_GUC_DB_ADDR_LOW GENMASK(31, 2)
595 #define THC_M_PRT_TSEQ_CNTRL_2_RGD BIT(2)
599 #define THC_M_PRT_GUC_DB_ADDR_LOW_2_GUC_DB_ADDR_LOW GENMASK(31, 2)
651 #define THC_ARB_POLICY_FRAME_BOUNDARY 2
665 /* MFS unit in power of 2 */
666 #define THC_UNIT_MICROFRAME_SIZE 2
668 #define THC_BITMASK_INVALID_TYPE_DATA 2
676 * Scale is geometric progression of 2^5 step, starting from 2^0.
677 * For example, THC_LTR_SCALE_2(2) means 2^(5 * 2) = 1024, unit is ns.
681 #define THC_LTR_SCALE_2 2
717 * @THC_DUAL_IO: dual IO mode, 1(opcode) - 2(address) - 2(data)
724 THC_QUAD_IO = 2,
744 THC_SPI_FRQ_DIV_2 = 2,
826 THC_I2C_FAST_AND_PLUS = 2,
833 #define THC_I2C_IC_ENABLE_TX_CMD_BLOCK BIT(2)
840 #define THC_I2C_IC_CON_SPEED GENMASK(2, 1)
864 #define THC_I2C_IC_INTR_MASK_M_RX_FULL BIT(2)