Lines Matching +full:0 +full:- +full:31
1 /* SPDX-License-Identifier: GPL-2.0 */
11 #define THC_M_PRT_CONTROL_OFFSET 0x1008
13 #define THC_M_PRT_SPI_CFG_OFFSET 0x1010
15 #define THC_M_PRT_SPI_ICRRD_OPCODE_OFFSET 0x1014
17 #define THC_M_PRT_SPI_DMARD_OPCODE_OFFSET 0x1018
19 #define THC_M_PRT_SPI_WR_OPCODE_OFFSET 0x101C
21 #define THC_M_PRT_INT_EN_OFFSET 0x1020
23 #define THC_M_PRT_INT_STATUS_OFFSET 0x1024
25 #define THC_M_PRT_ERR_CAUSE_OFFSET 0x1028
27 #define THC_M_PRT_SW_SEQ_CNTRL_OFFSET 0x1040
29 #define THC_M_PRT_SW_SEQ_STS_OFFSET 0x1044
31 #define THC_M_PRT_SW_SEQ_DATA0_ADDR_OFFSET 0x1048
33 #define THC_M_PRT_SW_SEQ_DATA1_OFFSET 0x104C
35 #define THC_M_PRT_SW_SEQ_DATA2_OFFSET 0x1050
37 #define THC_M_PRT_SW_SEQ_DATA3_OFFSET 0x1054
39 #define THC_M_PRT_SW_SEQ_DATA4_OFFSET 0x1058
41 #define THC_M_PRT_SW_SEQ_DATA5_OFFSET 0x105C
43 #define THC_M_PRT_SW_SEQ_DATA6_OFFSET 0x1060
45 #define THC_M_PRT_SW_SEQ_DATA7_OFFSET 0x1064
47 #define THC_M_PRT_SW_SEQ_DATA8_OFFSET 0x1068
49 #define THC_M_PRT_SW_SEQ_DATA9_OFFSET 0x106C
51 #define THC_M_PRT_SW_SEQ_DATA10_OFFSET 0x1070
53 #define THC_M_PRT_SW_SEQ_DATA11_OFFSET 0x1074
55 #define THC_M_PRT_SW_SEQ_DATA12_OFFSET 0x1078
57 #define THC_M_PRT_SW_SEQ_DATA13_OFFSET 0x107C
59 #define THC_M_PRT_SW_SEQ_DATA14_OFFSET 0x1080
61 #define THC_M_PRT_SW_SEQ_DATA15_OFFSET 0x1084
63 #define THC_M_PRT_SW_SEQ_DATA16_OFFSET 0x1088
65 #define THC_M_PRT_WPRD_BA_LOW_OFFSET 0x1090
67 #define THC_M_PRT_WPRD_BA_HI_OFFSET 0x1094
69 #define THC_M_PRT_WRITE_DMA_CNTRL_OFFSET 0x1098
71 #define THC_M_PRT_WRITE_INT_STS_OFFSET 0x109C
73 #define THC_M_PRT_WRITE_DMA_ERR_OFFSET 0x10A0
75 #define THC_M_PRT_WR_BULK_ADDR_OFFSET 0x10B4
77 #define THC_M_PRT_DEV_INT_CAUSE_ADDR_OFFSET 0x10B8
79 #define THC_M_PRT_DEV_INT_CAUSE_REG_VAL_OFFSET 0x10BC
81 #define THC_M_PRT_TX_FRM_CNT_OFFSET 0x10E0
83 #define THC_M_PRT_TXDMA_PKT_CNT_OFFSET 0x10E4
85 #define THC_M_PRT_DEVINT_CNT_OFFSET 0x10E8
87 #define THC_M_PRT_DEVINT_CFG_1_OFFSET 0x10EC
89 #define THC_M_PRT_DEVINT_CFG_2_OFFSET 0x10F0
91 #define THC_M_PRT_RPRD_BA_LOW_1_OFFSET 0x1100
93 #define THC_M_PRT_RPRD_BA_HI_1_OFFSET 0x1104
95 #define THC_M_PRT_RPRD_CNTRL_1_OFFSET 0x1108
97 #define THC_M_PRT_READ_DMA_CNTRL_1_OFFSET 0x110C
99 #define THC_M_PRT_READ_DMA_INT_STS_1_OFFSET 0x1110
101 #define THC_M_PRT_READ_DMA_ERR_1_OFFSET 0x1114
103 #define THC_M_PRT_GUC_OFFSET_LOW_1_OFFSET 0x1118
105 #define THC_M_PRT_GUC_OFFSET_HI_1_OFFSET 0x111C
107 #define THC_M_PRT_GUC_WORKQ_ITEM_SZ_1_OFFSET 0x1120
109 #define THC_M_PRT_GUC_WORKQ_SZ_1_OFFSET 0x1124
111 #define THC_M_PRT_TSEQ_CNTRL_1_OFFSET 0x1128
113 #define THC_M_PRT_GUC_DB_ADDR_LOW_1_OFFSET 0x1130
115 #define THC_M_PRT_GUC_DB_ADDR_HI_1_OFFSET 0x1134
117 #define THC_M_PRT_GUC_DB_DATA_1_OFFSET 0x1138
119 #define THC_M_PRT_GUC_OFFSET_INITVAL_1_OFFSET 0x1140
121 #define THC_M_PRT_RD_BULK_ADDR_1_OFFSET 0x1170
123 #define THC_M_PRT_DB_CNT_1_OFFSET 0x11A0
125 #define THC_M_PRT_FRM_CNT_1_OFFSET 0x11A4
127 #define THC_M_PRT_UFRM_CNT_1_OFFSET 0x11A8
129 #define THC_M_PRT_RXDMA_PKT_CNT_1_OFFSET 0x11AC
134 #define THC_M_PRT_SWINT_CNT_1_OFFSET 0x11B0
136 #define THC_M_PRT_FRAME_DROP_CNT_1_OFFSET 0x11B4
138 #define THC_M_PRT_COALESCE_1_OFFSET 0x11B8
140 #define THC_M_PRT_RPRD_BA_LOW_2_OFFSET 0x1200
142 #define THC_M_PRT_RPRD_BA_HI_2_OFFSET 0x1204
144 #define THC_M_PRT_RPRD_CNTRL_2_OFFSET 0x1208
146 #define THC_M_PRT_READ_DMA_CNTRL_2_OFFSET 0x120C
148 #define THC_M_PRT_READ_DMA_INT_STS_2_OFFSET 0x1210
150 #define THC_M_PRT_READ_DMA_ERR_2_OFFSET 0x1214
152 #define THC_M_PRT_GUC_OFFSET_LOW_2_OFFSET 0x1218
154 #define THC_M_PRT_GUC_OFFSET_HI_2_OFFSET 0x121C
156 #define THC_M_PRT_GUC_WORKQ_ITEM_SZ_2_OFFSET 0x1220
158 #define THC_M_PRT_GUC_WORKQ_SZ_2_OFFSET 0x1224
160 #define THC_M_PRT_TSEQ_CNTRL_2_OFFSET 0x1228
162 #define THC_M_PRT_GUC_DB_ADDR_LOW_2_OFFSET 0x1230
164 #define THC_M_PRT_GUC_DB_ADDR_HI_2_OFFSET 0x1234
166 #define THC_M_PRT_GUC_DB_DATA_2_OFFSET 0x1238
168 #define THC_M_PRT_GUC_OFFSET_INITVAL_2_OFFSET 0x1240
170 #define THC_M_PRT_RD_BULK_ADDR_2_OFFSET 0x1270
172 #define THC_M_PRT_DB_CNT_2_OFFSET 0x12A0
174 #define THC_M_PRT_FRM_CNT_2_OFFSET 0x12A4
176 #define THC_M_PRT_UFRM_CNT_2_OFFSET 0x12A8
178 #define THC_M_PRT_RXDMA_PKT_CNT_2_OFFSET 0x12AC
183 #define THC_M_PRT_SWINT_CNT_2_OFFSET 0x12B0
185 #define THC_M_PRT_FRAME_DROP_CNT_2_OFFSET 0x12B4
187 #define THC_M_PRT_COALESCE_2_OFFSET 0x12B8
189 #define THC_M_PRT_SPARE_REG_OFFSET 0x12BC
191 #define THC_M_PRT_RPRD_BA_LOW_SW_OFFSET 0x12C0
193 #define THC_M_PRT_RPRD_BA_HI_SW_OFFSET 0x12C4
195 #define THC_M_PRT_RPRD_CNTRL_SW_OFFSET 0x12C8
197 #define THC_M_PRT_READ_DMA_CNTRL_SW_OFFSET 0x12CC
199 #define THC_M_PRT_READ_DMA_INT_STS_SW_OFFSET 0x12D0
201 #define THC_M_PRT_TSEQ_CNTRL_SW_OFFSET 0x12D4
203 #define THC_M_PRT_RD_BULK_ADDR_SW_OFFSET 0x12D8
205 #define THC_M_PRT_FRM_CNT_SW_OFFSET 0x12DC
207 #define THC_M_PRT_RXDMA_PKT_CNT_SW_OFFSET 0x12E0
209 #define THC_M_PRT_SW_DMA_PRD_TABLE_LEN_OFFSET 0x12E4
211 #define THC_M_PRT_COALESCE_CNTRL_1_OFFSET 0x12E8
213 #define THC_M_PRT_COALESCE_CNTRL_2_OFFSET 0x12EC
215 #define THC_M_PRT_PRD_EMPTY_CNT_1_OFFSET 0x12F0
217 #define THC_M_PRT_PRD_EMPTY_CNT_2_OFFSET 0x12F4
219 #define THC_M_PRT_COALESCE_STS_1_OFFSET 0x12F8
221 #define THC_M_PRT_COALESCE_STS_2_OFFSET 0x12FC
223 #define THC_M_PRT_SPI_DUTYC_CFG_OFFSET 0x1300
225 #define THC_M_PRT_SW_SEQ_I2C_WR_CNTRL_OFFSET 0x1304
227 #define THC_M_PRT_TIMESTAMP_1_OFFSET 0x1308
229 #define THC_M_PRT_TIMESTAMP_2_OFFSET 0x130C
231 #define THC_M_PRT_SYNC_TIMESTAMP_OFFSET 0x1310
233 #define THC_M_PRT_DISP_SYNC_OFFSET 0x1314
235 #define THC_M_PRT_DISP_SYNC_2_OFFSET 0x1318
237 #define THC_M_PRT_I2C_CFG_OFFSET 0x131C
246 #define THC_CFG_DID_VID_VID GENMASK(15, 0)
247 #define THC_CFG_DID_VID_DID GENMASK(31, 16)
249 #define THC_CFG_STS_CMD_IOSE BIT(0)
269 #define THC_CFG_STS_CMD_DPE BIT(31)
271 #define THC_CFG_CC_RID_RID GENMASK(7, 0)
274 #define THC_CFG_CC_RID_BCC GENMASK(31, 24)
276 #define THC_CFG_BIST_HTYPE_LT_CLS_CLSZ GENMASK(7, 0)
281 #define THC_CFG_BAR0_LOW_MEMSPACE BIT(0)
285 #define THC_CFG_BAR0_LOW_MEMBAR GENMASK(31, 15)
286 #define THC_CFG_BAR0_HI_MEMBAR GENMASK(31, 0)
288 #define THC_CFG_SID_SVID_SSVID GENMASK(15, 0)
289 #define THC_CFG_SID_SVID_SSID GENMASK(31, 16)
291 #define THC_CFG_CAPP_CP GENMASK(7, 0)
293 #define THC_CFG_INT_ILINE GENMASK(7, 0)
296 #define THC_CFG_UR_STS_CTL_URRE BIT(0)
300 #define THC_CFG_MSIMC_MSINP_MSICID_CAPID GENMASK(7, 0)
307 #define THC_CFG_MSIMA_MADDR GENMASK(31, 2)
308 #define THC_CFG_MSIMUA_MAUDDR GENMASK(31, 0)
309 #define THC_CFG_MSIMD_MDAT GENMASK(15, 0)
311 #define THC_CFG_PMCAP_PMNP_PMCID_CAPP GENMASK(7, 0)
319 #define THC_CFG_PMCAP_PMNP_PMCID_PMES GENMASK(31, 27)
321 #define THC_CFG_PMD_PMCSRBSE_PMCSR_PWRST GENMASK(1, 0)
328 #define THC_CFG_DEVIDLE_CAPPID GENMASK(7, 0)
332 #define THC_CFG_DEVIDLE_VID GENMASK(31, 28)
334 #define THC_CFG_VSHDR_VSECID GENMASK(15, 0)
336 #define THC_CFG_VSHDR_VSECL GENMASK(31, 20)
338 #define THC_CFG_SWLTRPTR_VALID BIT(0)
340 #define THC_CFG_SWLTRPTR_SWLTRLOC GENMASK(31, 4)
342 #define THC_CFG_DEVIDLEPTR_VALID BIT(0)
344 #define THC_CFG_DEVIDLEPTR_DEVIDLELOC GENMASK(31, 4)
345 #define THC_CFG_DEVIDLEPOL_POLV GENMASK(9, 0)
348 #define THC_CFG_PCE_SPE BIT(0)
354 #define THC_CFG_MANID_PROC GENMASK(7, 0)
359 #define THC_M_CMN_DEVIDLECTRL_CIP BIT(0)
365 #define THC_M_CMN_LTR_CTRL_OFFSET 0x14
366 #define THC_M_CMN_LTR_CTRL_ACTIVE_LTR_REQ BIT(0)
374 #define THC_M_CMN_LTR_CTRL_LAST_LTR_SENT GENMASK(31, 30)
376 #define THC_M_PRT_CONTROL_TSFTRST BIT(0)
387 #define THC_M_PRT_CONTROL_PORT_TYPE GENMASK(31, 30)
389 #define THC_M_PRT_SPI_CFG_SPI_TRDC GENMASK(1, 0)
396 #define THC_M_PRT_SPI_CFG_SPI_WR_MPS GENMASK(31, 24)
398 #define THC_M_PRT_SPI_ICRRD_OPCODE_SPI_SIO GENMASK(31, 24)
402 #define THC_M_PRT_INT_EN_SIPE BIT(0)
424 #define THC_M_PRT_INT_EN_GBL_INT_EN BIT(31)
448 #define THC_M_PRT_SW_SEQ_CNTRL_TSSGO BIT(0)
451 #define THC_M_PRT_SW_SEQ_CNTRL_THC_SS_BC GENMASK(31, 16)
452 #define THC_M_PRT_SW_SEQ_STS_TSSDONE BIT(0)
455 #define THC_M_PRT_SW_SEQ_DATA0_ADDR_THC_SW_SEQ_DATA0_ADDR GENMASK(31, 0)
456 #define THC_M_PRT_SW_SEQ_DATA1_THC_SW_SEQ_DATA1 GENMASK(31, 0)
458 #define THC_M_PRT_WPRD_BA_LOW_THC_M_PRT_WPRD_BA_LOW GENMASK(31, 12)
459 #define THC_M_PRT_WPRD_BA_HI_THC_M_PRT_WPRD_BA_HI GENMASK(31, 0)
461 #define THC_M_PRT_WRITE_DMA_CNTRL_THC_WRDMA_START BIT(0)
466 #define THC_M_PRT_WRITE_DMA_CNTRL_THC_WRDMA_PTEC GENMASK(31, 24)
468 #define THC_M_PRT_WRITE_INT_STS_THC_WRDMA_CMPL_STATUS BIT(0)
473 #define THC_M_PRT_WR_BULK_ADDR_THC_M_PRT_WR_BULK_ADDR GENMASK(31, 0)
475 #define THC_M_PRT_DEV_INT_CAUSE_ADDR_THC_M_PRT_DEV_INT_CAUSE_ADDR GENMASK(31, 0)
476 #define THC_M_PRT_DEV_INT_CAUSE_REG_VAL_INTERRUPT_TYPE GENMASK(3, 0)
480 #define THC_M_PRT_DEV_INT_CAUSE_REG_VAL_FRAME_TYPE BIT(31)
482 #define THC_M_PRT_TX_FRM_CNT_THC_M_PRT_TX_FRM_CNT GENMASK(30, 0)
483 #define THC_M_PRT_TX_FRM_CNT_THC_M_PRT_TX_FRM_CNT_RST BIT(31)
485 #define THC_M_PRT_TXDMA_PKT_CNT_THC_M_PRT_TXDMA_PKT_CNT GENMASK(30, 0)
486 #define THC_M_PRT_TXDMA_PKT_CNT_THC_M_PRT_TXDMA_PKT_CNT_RST BIT(31)
488 #define THC_M_PRT_DEVINT_CNT_THC_M_PRT_DEVINT_CNT GENMASK(30, 0)
489 #define THC_M_PRT_DEVINT_CNT_THC_M_PRT_DEVINT_CNT_RST BIT(31)
491 #define THC_M_PRT_DEVINT_CFG_1_THC_M_PRT_INTTYP_OFFSET GENMASK(4, 0)
495 #define THC_M_PRT_DEVINT_CFG_1_THC_M_PRT_INTTYP_DATA_VAL GENMASK(31, 16)
497 #define THC_M_PRT_DEVINT_CFG_2_THC_M_PRT_UFSIZE_OFFSET GENMASK(4, 0)
508 #define THC_M_PRT_RPRD_BA_LOW_1_THC_M_PRT_RPRD_BA_LOW GENMASK(31, 12)
509 #define THC_M_PRT_RPRD_BA_HI_1_THC_M_PRT_RPRD_BA_HI GENMASK(31, 0)
511 #define THC_M_PRT_RPRD_CNTRL_PCD GENMASK(6, 0)
515 #define THC_M_PRT_READ_DMA_CNTRL_START BIT(0)
527 #define THC_M_PRT_READ_DMA_CNTRL_TPCPR BIT(31)
529 #define THC_M_PRT_READ_DMA_INT_STS_DMACPL_STS BIT(0)
537 #define THC_M_PRT_READ_DMA_ERR_1_DLERR BIT(0)
539 #define THC_M_PRT_GUC_OFFSET_LOW_1_THC_M_PRT_GUC_OFFSET_LOW GENMASK(31, 3)
540 #define THC_M_PRT_GUC_OFFSET_HI_1_THC_M_PRT_GUC_OFFSET_HI GENMASK(31, 0)
541 #define THC_M_PRT_GUC_WORKQ_ITEM_SZ_1_WORKQ_ITEM_SZ GENMASK(23, 0)
542 #define THC_M_PRT_GUC_WORKQ_SZ_1_WORKQ_SZ GENMASK(23, 0)
544 #define THC_M_PRT_GUC_WORKQ_SZ_1_GIC GENMASK(31, 28)
553 #define THC_M_PRT_TSEQ_CNTRL_1_INT_EDG_DET_EN BIT(31)
555 #define THC_M_PRT_GUC_DB_ADDR_LOW_1_GUC_DB_ADDR_LOW GENMASK(31, 2)
556 #define THC_M_PRT_GUC_DB_ADDR_HI_1_GUC_DB_ADDR_HI GENMASK(31, 0)
557 #define THC_M_PRT_GUC_DB_DATA_1_GUC_DB_DATA GENMASK(31, 0)
558 #define THC_M_PRT_GUC_OFFSET_INITVAL_1_THC_M_PRT_GUC_OFFSET_INITVAL GENMASK(31, 0)
560 #define THC_M_PRT_RD_BULK_ADDR_1_THC_M_PRT_RD_BULK_ADDR GENMASK(31, 0)
562 #define THC_M_PRT_DB_CNT_1_THC_M_PRT_DB_CNT GENMASK(30, 0)
563 #define THC_M_PRT_DB_CNT_1_THC_M_PRT_DB_CNT_RST BIT(31)
565 #define THC_M_PRT_FRM_CNT_1_THC_M_PRT_FRM_CNT GENMASK(30, 0)
566 #define THC_M_PRT_FRM_CNT_1_THC_M_PRT_FRM_CNT_RST BIT(31)
568 #define THC_M_PRT_UFRM_CNT_1_THC_M_PRT_UFRM_CNT GENMASK(30, 0)
569 #define THC_M_PRT_UFRM_CNT_1_THC_M_PRT_UFRM_CNT_RST BIT(31)
571 #define THC_M_PRT_RXDMA_PKT_CNT_1_THC_M_PRT_RXDMA_PKT_CNT GENMASK(30, 0)
572 #define THC_M_PRT_RXDMA_PKT_CNT_1_THC_M_PRT_RXDMA_PKT_CNT_RST BIT(31)
574 #define THC_M_PRT_SWINT_CNT_1_THC_M_PRT_SWINT_CNT GENMASK(30, 0)
575 #define THC_M_PRT_SWINT_CNT_1_THC_M_PRT_SWINT_CNT_RST BIT(31)
577 #define THC_M_PRT_FRAME_DROP_CNT_1_NOFD GENMASK(30, 0)
578 #define THC_M_PRT_FRAME_DROP_CNT_1_RFDC BIT(31)
580 #define THC_M_PRT_COALESCE_1_COALESCE_TIMEOUT GENMASK(6, 0)
582 #define THC_M_PRT_RPRD_BA_LOW_2_THC_M_PRT_RPRD_BA_LOW GENMASK(31, 12)
583 #define THC_M_PRT_RPRD_BA_HI_2_THC_M_PRT_RPRD_BA_HI GENMASK(31, 0)
585 #define THC_M_PRT_READ_DMA_ERR_2_DLERR BIT(0)
587 #define THC_M_PRT_GUC_OFFSET_LOW_2_THC_M_PRT_GUC_OFFSET_LOW GENMASK(31, 3)
588 #define THC_M_PRT_GUC_OFFSET_HI_2_THC_M_PRT_GUC_OFFSET_HI GENMASK(31, 0)
590 #define THC_M_PRT_GUC_WORKQ_ITEM_SZ_2_WORKQ_ITEM_SZ GENMASK(23, 0)
591 #define THC_M_PRT_GUC_WORKQ_SZ_2_WORKQ_SZ GENMASK(23, 0)
593 #define THC_M_PRT_GUC_WORKQ_SZ_2_GIC GENMASK(31, 28)
599 #define THC_M_PRT_GUC_DB_ADDR_LOW_2_GUC_DB_ADDR_LOW GENMASK(31, 2)
600 #define THC_M_PRT_GUC_DB_ADDR_HI_2_GUC_DB_ADDR_HI GENMASK(31, 0)
602 #define THC_M_PRT_GUC_DB_DATA_2_GUC_DB_DATA GENMASK(31, 0)
604 #define THC_M_PRT_GUC_OFFSET_INITVAL_2_THC_M_PRT_GUC_OFFSET_INITVAL GENMASK(31, 0)
606 #define THC_M_PRT_RD_BULK_ADDR_2_THC_M_PRT_RD_BULK_ADDR GENMASK(31, 0)
608 #define THC_M_PRT_DB_CNT_2_THC_M_PRT_DB_CNT GENMASK(30, 0)
609 #define THC_M_PRT_DB_CNT_2_THC_M_PRT_DB_CNT_RST BIT(31)
611 #define THC_M_PRT_FRM_CNT_2_THC_M_PRT_FRM_CNT GENMASK(30, 0)
612 #define THC_M_PRT_FRM_CNT_2_THC_M_PRT_FRM_CNT_RST BIT(31)
614 #define THC_M_PRT_UFRM_CNT_2_THC_M_PRT_UFRM_CNT GENMASK(30, 0)
615 #define THC_M_PRT_UFRM_CNT_2_THC_M_PRT_UFRM_CNT_RST BIT(31)
617 #define THC_M_PRT_RXDMA_PKT_CNT_2_THC_M_PRT_RXDMA_PKT_CNT GENMASK(30, 0)
618 #define THC_M_PRT_RXDMA_PKT_CNT_2_THC_M_PRT_RXDMA_PKT_CNT_RST BIT(31)
620 #define THC_M_PRT_SWINT_CNT_2_THC_M_PRT_SWINT_CNT GENMASK(30, 0)
621 #define THC_M_PRT_SWINT_CNT_2_THC_M_PRT_SWINT_CNT_RST BIT(31)
623 #define THC_M_PRT_FRAME_DROP_CNT_2_NOFD GENMASK(30, 0)
624 #define THC_M_PRT_FRAME_DROP_CNT_2_RFDC BIT(31)
626 #define THC_M_PRT_COALESCE_2_COALESCE_TIMEOUT GENMASK(6, 0)
629 #define THC_M_PRT_SW_SEQ_I2C_WR_CNTRL_THC_PIO_I2C_WBC GENMASK(31, 26)
632 #define THC_M_PRT_RPRD_CNTRL_SW_THC_SWDMA_I2C_WBC GENMASK(31, 26)
634 #define THC_M_PRT_PRD_EMPTY_CNT_1_RPTEC BIT(31)
635 #define THC_M_PRT_PRD_EMPTY_CNT_2_RPTEC BIT(31)
637 #define THC_M_PRT_SW_DMA_PRD_TABLE_LEN_THC_M_PRT_SW_DMA_PRD_TABLE_LEN GENMASK(23, 0)
639 #define THC_M_PRT_SPI_DUTYC_CFG_SPI_CSA_CK_DELAY_VAL GENMASK(3, 0)
647 #define THC_ARB_POLICY_PACKET_BOUNDARY 0
676 * Scale is geometric progression of 2^5 step, starting from 2^0.
679 #define THC_LTR_SCALE_0 0
685 #define THC_LTR_MODE_ACTIVE 0
705 THC_PIO_OP_SPI_TIC_READ = 0x4,
706 THC_PIO_OP_SPI_TIC_WRITE = 0x6,
707 THC_PIO_OP_I2C_SUBSYSTEM_READ = 0x12,
708 THC_PIO_OP_I2C_SUBSYSTEM_WRITE = 0x13,
709 THC_PIO_OP_I2C_TIC_READ = 0x14,
710 THC_PIO_OP_I2C_TIC_WRITE = 0x18,
711 THC_PIO_OP_I2C_TIC_WRITE_AND_READ = 0x1C,
716 * @THC_SINGLE_IO: single IO mode, 1(opcode) - 1(address) - 1(data)
717 * @THC_DUAL_IO: dual IO mode, 1(opcode) - 2(address) - 2(data)
718 * @THC_QUAD_IO: quad IO mode, 1(opcode) - 4(address) - 4(data)
719 * @THC_QUAD_PARALLEL_IO: parallel quad IO mode, 4(opcode) - 4(address) - 4(data)
722 THC_SINGLE_IO = 0,
742 THC_SPI_FRQ_RESERVED = 0,
752 /* THC I2C sub-system registers */
753 #define THC_I2C_IC_CON_OFFSET 0x0
754 #define THC_I2C_IC_TAR_OFFSET 0x4
755 #define THC_I2C_IC_SAR_OFFSET 0x8
756 #define THC_I2C_IC_HS_MADDR_OFFSET 0xC
757 #define THC_I2C_IC_DATA_CMD_OFFSET 0x10
758 #define THC_I2C_IC_SS_SCL_HCNT_OFFSET 0x14
759 #define THC_I2C_IC_UFM_SCL_HCNT_OFFSET 0x14
760 #define THC_I2C_IC_SS_SCL_LCNT_OFFSET 0x18
761 #define THC_I2C_IC_UFM_SCL_LCNT_OFFSET 0x18
762 #define THC_I2C_IC_FS_SCL_HCNT_OFFSET 0x1C
763 #define THC_I2C_IC_UFM_TBUF_CNT_OFFSET 0x1C
764 #define THC_I2C_IC_FS_SCL_LCNT_OFFSET 0x20
765 #define THC_I2C_IC_HS_SCL_HCNT_OFFSET 0x24
766 #define THC_I2C_IC_HS_SCL_LCNT_OFFSET 0x28
767 #define THC_I2C_IC_INTR_STAT_OFFSET 0x2C
768 #define THC_I2C_IC_INTR_MASK_OFFSET 0x30
769 #define THC_I2C_IC_RAW_INTR_STAT_OFFSET 0x34
770 #define THC_I2C_IC_RX_TL_OFFSET 0x38
771 #define THC_I2C_IC_TX_TL_OFFSET 0x3C
772 #define THC_I2C_IC_CLR_INTR_OFFSET 0x40
773 #define THC_I2C_IC_CLR_RX_UNDER_OFFSET 0x44
774 #define THC_I2C_IC_CLR_RX_OVER_OFFSET 0x48
775 #define THC_I2C_IC_CLR_TX_OVER_OFFSET 0x4C
776 #define THC_I2C_IC_CLR_RD_REQ_OFFSET 0x50
777 #define THC_I2C_IC_CLR_TX_ABRT_OFFSET 0x54
778 #define THC_I2C_IC_CLR_RX_DONE_OFFSET 0x58
779 #define THC_I2C_IC_CLR_ACTIVITY_OFFSET 0x5C
780 #define THC_I2C_IC_CLR_STOP_DET_OFFSET 0x60
781 #define THC_I2C_IC_CLR_START_DET_OFFSET 0x64
782 #define THC_I2C_IC_CLR_GEN_CALL_OFFSET 0x68
783 #define THC_I2C_IC_ENABLE_OFFSET 0x6C
784 #define THC_I2C_IC_STATUS_OFFSET 0x70
785 #define THC_I2C_IC_TXFLR_OFFSET 0x74
786 #define THC_I2C_IC_RXFLR_OFFSET 0x78
787 #define THC_I2C_IC_SDA_HOLD_OFFSET 0x7C
788 #define THC_I2C_IC_TX_ABRT_SOURCE_OFFSET 0x80
789 #define THC_I2C_IC_SLV_DATA_NACK_ONLY_OFFSET 0x84
790 #define THC_I2C_IC_DMA_CR_OFFSET 0x88
791 #define THC_I2C_IC_DMA_TDLR_OFFSET 0x8C
792 #define THC_I2C_IC_DMA_RDLR_OFFSET 0x90
793 #define THC_I2C_IC_SDA_SETUP_OFFSET 0x94
794 #define THC_I2C_IC_ACK_GENERAL_CALL_OFFSET 0x98
795 #define THC_I2C_IC_ENABLE_STATUS_OFFSET 0x9C
796 #define THC_I2C_IC_FS_SPKLEN_OFFSET 0xA0
797 #define THC_I2C_IC_UFM_SPKLEN_OFFSET 0xA0
798 #define THC_I2C_IC_HS_SPKLEN_OFFSET 0xA4
799 #define THC_I2C_IC_CLR_RESTART_DET_OFFSET 0xA8
800 #define THC_I2C_IC_SCL_STUCK_AT_LOW_TIMEOUT_OFFSET 0xAC
801 #define THC_I2C_IC_SDA_STUCK_AT_LOW_TIMEOUT_OFFSET 0xB0
802 #define THC_I2C_IC_CLR_SCL_STUCK_DET_OFFSET 0xB4
803 #define THC_I2C_IC_DEVICE_ID_OFFSET 0xB8
804 #define THC_I2C_IC_SMBUS_CLK_LOW_SEXT_OFFSET 0xBC
805 #define THC_I2C_IC_SMBUS_CLK_LOW_MEXT_OFFSET 0xC0
806 #define THC_I2C_IC_SMBUS_THIGH_MAX_IDLE_COUNT_OFFSET 0xC4
807 #define THC_I2C_IC_SMBUS_INTR_STAT_OFFSET 0xC8
808 #define THC_I2C_IC_SMBUS_INTR_MASK_OFFSET 0xCC
809 #define THC_I2C_IC_SMBUS_RAW_INTR_STAT_OFFSET 0xD0
810 #define THC_I2C_IC_CLR_SMBUS_INTR_OFFSET 0xD4
811 #define THC_I2C_IC_OPTIONAL_SAR_OFFSET 0xD8
812 #define THC_I2C_IC_SMBUS_UDID_LSB_OFFSET 0xDC
813 #define THC_I2C_IC_SMBUS_UDID_WORD0_OFFSET 0xDC
814 #define THC_I2C_IC_SMBUS_UDID_WORD1_OFFSET 0xE0
815 #define THC_I2C_IC_SMBUS_UDID_WORD2_OFFSET 0xE4
816 #define THC_I2C_IC_SMBUS_UDID_WORD3_OFFSET 0xE8
817 #define THC_I2C_IC_COMP_PARAM_1_OFFSET 0xF4
818 #define THC_I2C_IC_COMP_VERSION_OFFSET 0xF8
819 #define THC_I2C_IC_COMP_TYPE_OFFSET 0xFC
822 * THC I2C sub-system supported speed mode
830 /* THC I2C sub-system register bits definition */
831 #define THC_I2C_IC_ENABLE_ENABLE BIT(0)
839 #define THC_I2C_IC_CON_MASTER_MODE BIT(0)
855 #define THC_I2C_IC_TAR_IC_TAR GENMASK(9, 0)
862 #define THC_I2C_IC_INTR_MASK_M_RX_UNDER BIT(0)
878 #define THC_I2C_IC_DMA_CR_RDMAE BIT(0)