Lines Matching full:tile
201 * @tile: tile to get info for
215 * NOTE: multi-tile bases will include the tile offset.
218 static int tile_vram_size(struct xe_tile *tile, u64 *vram_size, in tile_vram_size() argument
221 struct xe_device *xe = tile_to_xe(tile); in tile_vram_size()
222 struct xe_gt *gt = tile->primary_gt; in tile_vram_size()
233 for_each_if(t->id < tile->id) in tile_vram_size()
261 offset = xe_mmio_read64_2x32(&tile->mmio, GSMBASE); in tile_vram_size()
264 /* remove the tile offset so we have just the available size */ in tile_vram_size()
275 struct xe_tile *tile; in vram_fini() local
283 for_each_tile(tile, xe, id) in vram_fini()
284 tile->mem.vram.mapping = NULL; in vram_fini()
297 struct xe_tile *tile; in xe_vram_probe() local
310 /* Get the size of the root tile's vram for later accessibility comparison */ in xe_vram_probe()
311 tile = xe_device_get_root_tile(xe); in xe_vram_probe()
312 err = tile_vram_size(tile, &vram_size, &tile_size, &tile_offset); in xe_vram_probe()
325 /* tile specific ranges */ in xe_vram_probe()
326 for_each_tile(tile, xe, id) { in xe_vram_probe()
327 err = tile_vram_size(tile, &vram_size, &tile_size, &tile_offset); in xe_vram_probe()
331 tile->mem.vram.actual_physical_size = tile_size; in xe_vram_probe()
332 tile->mem.vram.io_start = xe->mem.vram.io_start + tile_offset; in xe_vram_probe()
333 tile->mem.vram.io_size = min_t(u64, vram_size, io_size); in xe_vram_probe()
335 if (!tile->mem.vram.io_size) { in xe_vram_probe()
336 drm_err(&xe->drm, "Tile without any CPU visible VRAM. Aborting.\n"); in xe_vram_probe()
340 tile->mem.vram.dpa_base = xe->mem.vram.dpa_base + tile_offset; in xe_vram_probe()
341 tile->mem.vram.usable_size = vram_size; in xe_vram_probe()
342 tile->mem.vram.mapping = xe->mem.vram.mapping + tile_offset; in xe_vram_probe()
344 if (tile->mem.vram.io_size < tile->mem.vram.usable_size) in xe_vram_probe()
347 …tile->id, &tile->mem.vram.actual_physical_size, &tile->mem.vram.usable_size, &tile->mem.vram.io_si… in xe_vram_probe()
348 drm_info(&xe->drm, "VRAM[%u, %u]: DPA range: [%pa-%llx], io range: [%pa-%llx]\n", id, tile->id, in xe_vram_probe()
349 &tile->mem.vram.dpa_base, tile->mem.vram.dpa_base + (u64)tile->mem.vram.actual_physical_size, in xe_vram_probe()
350 &tile->mem.vram.io_start, tile->mem.vram.io_start + (u64)tile->mem.vram.io_size); in xe_vram_probe()
352 /* calculate total size using tile size to get the correct HW sizing */ in xe_vram_probe()