Lines Matching +full:render +full:- +full:max
1 // SPDX-License-Identifier: MIT
62 * including frequency management, Render-C states management, and various
75 * Render-C States:
78 * Render-C states is also a GuC PC feature that is now enabled in Xe for
90 return &pc_to_guc(pc)->ct; in pc_to_ct()
105 return &pc->bo->vmap; in pc_to_maps()
137 wait = timeout_us - slept; in wait_for_pc_state()
140 return -ETIMEDOUT; in wait_for_pc_state()
149 xe_bo_ggtt_addr(pc->bo), in pc_action_reset()
168 xe_bo_ggtt_addr(pc->bo), in pc_action_query_task_state()
175 return -EAGAIN; in pc_action_query_task_state()
199 return -EAGAIN; in pc_action_set_param()
216 struct xe_guc_ct *ct = &pc_to_guc(pc)->ct; in pc_action_unset_param()
221 return -EAGAIN; in pc_action_unset_param()
275 xe_mmio_write32(>->mmio, RP_CONTROL, state); in pc_set_manual_rp_ctrl()
287 xe_mmio_write32(>->mmio, RPNSWREQ, rpnswreq); in pc_set_cur_freq()
298 * Let's only check for the rpn-rp0 range. If max < min, in pc_set_min_freq()
301 if (freq < pc->rpn_freq || freq > pc->rp0_freq) in pc_set_min_freq()
302 return -EINVAL; in pc_set_min_freq()
309 freq < pc->rpe_freq); in pc_set_min_freq()
329 * Let's only check for the rpn-rp0 range. If max < min, in pc_set_max_freq()
333 if (freq < pc->rpn_freq || freq > pc->rp0_freq) in pc_set_max_freq()
334 return -EINVAL; in pc_set_max_freq()
347 reg = xe_mmio_read32(>->mmio, MTL_MPA_FREQUENCY); in mtl_update_rpa_value()
349 reg = xe_mmio_read32(>->mmio, MTL_GT_RPA_FREQUENCY); in mtl_update_rpa_value()
351 pc->rpa_freq = decode_freq(REG_FIELD_GET(MTL_RPA_MASK, reg)); in mtl_update_rpa_value()
360 reg = xe_mmio_read32(>->mmio, MTL_MPE_FREQUENCY); in mtl_update_rpe_value()
362 reg = xe_mmio_read32(>->mmio, MTL_GT_RPE_FREQUENCY); in mtl_update_rpe_value()
364 pc->rpe_freq = decode_freq(REG_FIELD_GET(MTL_RPE_MASK, reg)); in mtl_update_rpe_value()
378 if (xe->info.platform == XE_PVC) in tgl_update_rpa_value()
379 reg = xe_mmio_read32(>->mmio, PVC_RP_STATE_CAP); in tgl_update_rpa_value()
381 reg = xe_mmio_read32(>->mmio, FREQ_INFO_REC); in tgl_update_rpa_value()
383 pc->rpa_freq = REG_FIELD_GET(RPA_MASK, reg) * GT_FREQUENCY_MULTIPLIER; in tgl_update_rpa_value()
397 if (xe->info.platform == XE_PVC) in tgl_update_rpe_value()
398 reg = xe_mmio_read32(>->mmio, PVC_RP_STATE_CAP); in tgl_update_rpe_value()
400 reg = xe_mmio_read32(>->mmio, FREQ_INFO_REC); in tgl_update_rpe_value()
402 pc->rpe_freq = REG_FIELD_GET(RPE_MASK, reg) * GT_FREQUENCY_MULTIPLIER; in tgl_update_rpe_value()
423 pc->rpn_freq = min(pc->rpn_freq, pc->rpe_freq); in pc_update_rp_values()
427 * xe_guc_pc_get_act_freq - Get Actual running frequency
430 * Returns: The Actual running frequency. Which might be 0 if GT is in Render-C sleep state (RC6).
440 freq = xe_mmio_read32(>->mmio, MTL_MIRROR_TARGET_WP1); in xe_guc_pc_get_act_freq()
443 freq = xe_mmio_read32(>->mmio, GT_PERF_STATUS); in xe_guc_pc_get_act_freq()
456 freq = xe_mmio_read32(>->mmio, RPNSWREQ); in get_cur_freq()
462 * xe_guc_pc_get_cur_freq - Get Current requested frequency
467 * -EAGAIN if GuC PC not ready (likely in middle of a reset).
481 return -ETIMEDOUT; in xe_guc_pc_get_cur_freq()
491 * xe_guc_pc_get_rp0_freq - Get the RP0 freq
498 return pc->rp0_freq; in xe_guc_pc_get_rp0_freq()
502 * xe_guc_pc_get_rpa_freq - Get the RPa freq
511 return pc->rpa_freq; in xe_guc_pc_get_rpa_freq()
515 * xe_guc_pc_get_rpe_freq - Get the RPe freq
524 return pc->rpe_freq; in xe_guc_pc_get_rpe_freq()
528 * xe_guc_pc_get_rpn_freq - Get the RPn freq
535 return pc->rpn_freq; in xe_guc_pc_get_rpn_freq()
539 * xe_guc_pc_get_min_freq - Get the min operational frequency
544 * -EAGAIN if GuC PC not ready (likely in middle of a reset).
552 mutex_lock(&pc->freq_lock); in xe_guc_pc_get_min_freq()
553 if (!pc->freq_ready) { in xe_guc_pc_get_min_freq()
555 ret = -EAGAIN; in xe_guc_pc_get_min_freq()
566 mutex_unlock(&pc->freq_lock); in xe_guc_pc_get_min_freq()
571 * xe_guc_pc_set_min_freq - Set the minimal operational frequency
576 * -EAGAIN if GuC PC not ready (likely in middle of a reset),
577 * -EINVAL if value out of bounds.
583 mutex_lock(&pc->freq_lock); in xe_guc_pc_set_min_freq()
584 if (!pc->freq_ready) { in xe_guc_pc_set_min_freq()
586 ret = -EAGAIN; in xe_guc_pc_set_min_freq()
594 pc->user_requested_min = freq; in xe_guc_pc_set_min_freq()
597 mutex_unlock(&pc->freq_lock); in xe_guc_pc_set_min_freq()
602 * xe_guc_pc_get_max_freq - Get Maximum operational frequency
607 * -EAGAIN if GuC PC not ready (likely in middle of a reset).
613 mutex_lock(&pc->freq_lock); in xe_guc_pc_get_max_freq()
614 if (!pc->freq_ready) { in xe_guc_pc_get_max_freq()
616 ret = -EAGAIN; in xe_guc_pc_get_max_freq()
627 mutex_unlock(&pc->freq_lock); in xe_guc_pc_get_max_freq()
632 * xe_guc_pc_set_max_freq - Set the maximum operational frequency
637 * -EAGAIN if GuC PC not ready (likely in middle of a reset),
638 * -EINVAL if value out of bounds.
644 mutex_lock(&pc->freq_lock); in xe_guc_pc_set_max_freq()
645 if (!pc->freq_ready) { in xe_guc_pc_set_max_freq()
647 ret = -EAGAIN; in xe_guc_pc_set_max_freq()
655 pc->user_requested_max = freq; in xe_guc_pc_set_max_freq()
658 mutex_unlock(&pc->freq_lock); in xe_guc_pc_set_max_freq()
663 * xe_guc_pc_c_status - get the current GT C state
672 reg = xe_mmio_read32(>->mmio, MTL_MIRROR_TARGET_WP1); in xe_guc_pc_c_status()
675 reg = xe_mmio_read32(>->mmio, GT_CORE_STATUS); in xe_guc_pc_c_status()
690 * xe_guc_pc_rc6_residency - rc6 residency counter
698 reg = xe_mmio_read32(>->mmio, GT_GFX_RC6); in xe_guc_pc_rc6_residency()
704 * xe_guc_pc_mc6_residency - mc6 residency counter
712 reg = xe_mmio_read32(>->mmio, MTL_MEDIA_MC6); in xe_guc_pc_mc6_residency()
725 reg = xe_mmio_read32(>->mmio, MTL_MEDIAP_STATE_CAP); in mtl_init_fused_rp_values()
727 reg = xe_mmio_read32(>->mmio, MTL_RP_STATE_CAP); in mtl_init_fused_rp_values()
729 pc->rp0_freq = decode_freq(REG_FIELD_GET(MTL_RP0_CAP_MASK, reg)); in mtl_init_fused_rp_values()
731 pc->rpn_freq = decode_freq(REG_FIELD_GET(MTL_RPN_CAP_MASK, reg)); in mtl_init_fused_rp_values()
742 if (xe->info.platform == XE_PVC) in tgl_init_fused_rp_values()
743 reg = xe_mmio_read32(>->mmio, PVC_RP_STATE_CAP); in tgl_init_fused_rp_values()
745 reg = xe_mmio_read32(>->mmio, RP_STATE_CAP); in tgl_init_fused_rp_values()
746 pc->rp0_freq = REG_FIELD_GET(RP0_MASK, reg) * GT_FREQUENCY_MULTIPLIER; in tgl_init_fused_rp_values()
747 pc->rpn_freq = REG_FIELD_GET(RPN_MASK, reg) * GT_FREQUENCY_MULTIPLIER; in tgl_init_fused_rp_values()
767 return min(LNL_MERT_FREQ_CAP, pc->rp0_freq); in pc_max_freq_cap()
769 return min(BMG_MERT_FREQ_CAP, pc->rp0_freq); in pc_max_freq_cap()
771 return pc->rp0_freq; in pc_max_freq_cap()
776 * xe_guc_pc_raise_unslice - Initialize RPx values and request a higher GT
789 * xe_guc_pc_init_early - Initialize RPx values
804 lockdep_assert_held(&pc->freq_lock); in pc_adjust_freq_bounds()
815 if (pc_get_max_freq(pc) > pc->rp0_freq) { in pc_adjust_freq_bounds()
816 ret = pc_set_max_freq(pc, pc->rp0_freq); in pc_adjust_freq_bounds()
825 if (pc_get_min_freq(pc) > pc->rp0_freq) in pc_adjust_freq_bounds()
826 ret = pc_set_min_freq(pc, pc->rp0_freq); in pc_adjust_freq_bounds()
836 lockdep_assert_held(&pc->freq_lock); in pc_adjust_requested_freq()
838 if (pc->user_requested_min != 0) { in pc_adjust_requested_freq()
839 ret = pc_set_min_freq(pc, pc->user_requested_min); in pc_adjust_requested_freq()
844 if (pc->user_requested_max != 0) { in pc_adjust_requested_freq()
845 ret = pc_set_max_freq(pc, pc->user_requested_max); in pc_adjust_requested_freq()
859 * Get updated min/max and stash them. in pc_set_mert_freq_cap()
861 ret = xe_guc_pc_get_min_freq(pc, &pc->stashed_min_freq); in pc_set_mert_freq_cap()
863 ret = xe_guc_pc_get_max_freq(pc, &pc->stashed_max_freq); in pc_set_mert_freq_cap()
868 * Ensure min and max are bound by MERT_FREQ_CAP until driver loads. in pc_set_mert_freq_cap()
870 mutex_lock(&pc->freq_lock); in pc_set_mert_freq_cap()
871 ret = pc_set_min_freq(pc, min(pc->rpe_freq, pc_max_freq_cap(pc))); in pc_set_mert_freq_cap()
873 ret = pc_set_max_freq(pc, min(pc->rp0_freq, pc_max_freq_cap(pc))); in pc_set_mert_freq_cap()
874 mutex_unlock(&pc->freq_lock); in pc_set_mert_freq_cap()
881 * xe_guc_pc_restore_stashed_freq - Set min/max back to stashed values
891 if (IS_SRIOV_VF(pc_to_xe(pc)) || pc_to_xe(pc)->info.skip_guc_pc) in xe_guc_pc_restore_stashed_freq()
894 mutex_lock(&pc->freq_lock); in xe_guc_pc_restore_stashed_freq()
895 ret = pc_set_max_freq(pc, pc->stashed_max_freq); in xe_guc_pc_restore_stashed_freq()
897 ret = pc_set_min_freq(pc, pc->stashed_min_freq); in xe_guc_pc_restore_stashed_freq()
898 mutex_unlock(&pc->freq_lock); in xe_guc_pc_restore_stashed_freq()
904 * xe_guc_pc_gucrc_disable - Disable GuC RC
918 if (xe->info.skip_guc_pc) in xe_guc_pc_gucrc_disable()
928 return -ETIMEDOUT; in xe_guc_pc_gucrc_disable()
939 * xe_guc_pc_override_gucrc_mode - override GUCRC mode
957 * xe_guc_pc_unset_gucrc_mode - unset GUCRC mode override
975 u32 min = DIV_ROUND_CLOSEST(pc->rpn_freq, GT_FREQUENCY_MULTIPLIER); in pc_init_pcode_freq()
976 u32 max = DIV_ROUND_CLOSEST(pc->rp0_freq, GT_FREQUENCY_MULTIPLIER); in pc_init_pcode_freq() local
978 XE_WARN_ON(xe_pcode_init_min_freq_table(gt_to_tile(pc_to_gt(pc)), min, max)); in pc_init_pcode_freq()
985 mutex_lock(&pc->freq_lock); in pc_init_freqs()
1003 pc->freq_ready = true; in pc_init_freqs()
1006 mutex_unlock(&pc->freq_lock); in pc_init_freqs()
1011 * xe_guc_pc_start - Start GuC's Power Conservation component
1028 return -ETIMEDOUT; in xe_guc_pc_start()
1031 if (xe->info.skip_guc_pc) { in xe_guc_pc_start()
1032 if (xe->info.platform != XE_PVC) in xe_guc_pc_start()
1035 /* Request max possible since dynamic freq mgmt is not enabled */ in xe_guc_pc_start()
1042 memset(pc->bo->vmap.vaddr, 0, size); in xe_guc_pc_start()
1059 ret = -EIO; in xe_guc_pc_start()
1075 if (xe->info.platform == XE_PVC) { in xe_guc_pc_start()
1089 * xe_guc_pc_stop - Stop GuC's Power Conservation component
1096 if (xe->info.skip_guc_pc) { in xe_guc_pc_stop()
1101 mutex_lock(&pc->freq_lock); in xe_guc_pc_stop()
1102 pc->freq_ready = false; in xe_guc_pc_stop()
1103 mutex_unlock(&pc->freq_lock); in xe_guc_pc_stop()
1109 * xe_guc_pc_fini_hw - Finalize GuC's Power Conservation component
1126 pc_set_cur_freq(pc, min(pc_max_freq_cap(pc), pc->rpe_freq)); in xe_guc_pc_fini_hw()
1132 * xe_guc_pc_init - Initialize GuC's Power Conservation component
1144 if (xe->info.skip_guc_pc) in xe_guc_pc_init()
1147 err = drmm_mutex_init(&xe->drm, &pc->freq_lock); in xe_guc_pc_init()
1158 pc->bo = bo; in xe_guc_pc_init()
1160 return devm_add_action_or_reset(xe->drm.dev, xe_guc_pc_fini_hw, pc); in xe_guc_pc_init()