Lines Matching +full:tegra20 +full:- +full:gr3d
1 // SPDX-License-Identifier: GPL-2.0-only
24 #include "gr3d.h"
40 struct gr3d { struct
54 static inline struct gr3d *to_gr3d(struct tegra_drm_client *client) in to_gr3d() argument
56 return container_of(client, struct gr3d, client); in to_gr3d()
62 struct drm_device *dev = dev_get_drvdata(client->host); in gr3d_init()
64 struct gr3d *gr3d = to_gr3d(drm); in gr3d_init() local
67 gr3d->channel = host1x_channel_request(client); in gr3d_init()
68 if (!gr3d->channel) in gr3d_init()
69 return -ENOMEM; in gr3d_init()
71 client->syncpts[0] = host1x_syncpt_request(client, flags); in gr3d_init()
72 if (!client->syncpts[0]) { in gr3d_init()
73 err = -ENOMEM; in gr3d_init()
74 dev_err(client->dev, "failed to request syncpoint: %d\n", err); in gr3d_init()
80 dev_err(client->dev, "failed to attach to domain: %d\n", err); in gr3d_init()
84 err = tegra_drm_register_client(dev->dev_private, drm); in gr3d_init()
86 dev_err(client->dev, "failed to register client: %d\n", err); in gr3d_init()
95 host1x_syncpt_put(client->syncpts[0]); in gr3d_init()
97 host1x_channel_put(gr3d->channel); in gr3d_init()
104 struct drm_device *dev = dev_get_drvdata(client->host); in gr3d_exit()
105 struct gr3d *gr3d = to_gr3d(drm); in gr3d_exit() local
108 err = tegra_drm_unregister_client(dev->dev_private, drm); in gr3d_exit()
112 pm_runtime_dont_use_autosuspend(client->dev); in gr3d_exit()
113 pm_runtime_force_suspend(client->dev); in gr3d_exit()
116 host1x_syncpt_put(client->syncpts[0]); in gr3d_exit()
117 host1x_channel_put(gr3d->channel); in gr3d_exit()
119 gr3d->channel = NULL; in gr3d_exit()
132 struct gr3d *gr3d = to_gr3d(client); in gr3d_open_channel() local
134 context->channel = host1x_channel_get(gr3d->channel); in gr3d_open_channel()
135 if (!context->channel) in gr3d_open_channel()
136 return -ENOMEM; in gr3d_open_channel()
143 host1x_channel_put(context->channel); in gr3d_close_channel()
148 struct gr3d *gr3d = dev_get_drvdata(dev); in gr3d_is_addr_reg() local
161 if (test_bit(offset, gr3d->addr_regs)) in gr3d_is_addr_reg()
196 { .compatible = "nvidia,tegra114-gr3d", .data = &tegra114_gr3d_soc },
197 { .compatible = "nvidia,tegra30-gr3d", .data = &tegra30_gr3d_soc },
198 { .compatible = "nvidia,tegra20-gr3d", .data = &tegra20_gr3d_soc },
311 struct gr3d *gr3d = dev_get_drvdata(dev); in gr3d_power_up_legacy_domain() local
318 * Tegra20 device-tree doesn't specify 3d clock name and there is only in gr3d_power_up_legacy_domain()
319 * one clock for Tegra20. Tegra30+ device-trees always specified names in gr3d_power_up_legacy_domain()
322 if (gr3d->nclocks == 1) { in gr3d_power_up_legacy_domain()
326 clk = gr3d->clocks[0].clk; in gr3d_power_up_legacy_domain()
328 for (i = 0; i < gr3d->nclocks; i++) { in gr3d_power_up_legacy_domain()
329 if (WARN_ON(!gr3d->clocks[i].id)) in gr3d_power_up_legacy_domain()
332 if (!strcmp(gr3d->clocks[i].id, name)) { in gr3d_power_up_legacy_domain()
333 clk = gr3d->clocks[i].clk; in gr3d_power_up_legacy_domain()
338 if (WARN_ON(i == gr3d->nclocks)) in gr3d_power_up_legacy_domain()
339 return -EINVAL; in gr3d_power_up_legacy_domain()
366 * while GENPD not. Hence keep clock-enable balanced. in gr3d_power_up_legacy_domain()
373 static int gr3d_init_power(struct device *dev, struct gr3d *gr3d) in gr3d_init_power() argument
382 err = of_count_phandle_with_args(dev->of_node, "power-domains", in gr3d_init_power()
383 "#power-domain-cells"); in gr3d_init_power()
385 if (err != -ENOENT) in gr3d_init_power()
389 * Older device-trees don't use GENPD. In this case we should in gr3d_init_power()
408 * on Tegra20 and two domains on Tegra30+. in gr3d_init_power()
410 if (dev->pm_domain) in gr3d_init_power()
413 err = devm_pm_domain_attach_list(dev, &pd_data, &gr3d->pd_list); in gr3d_init_power()
420 static int gr3d_get_clocks(struct device *dev, struct gr3d *gr3d) in gr3d_get_clocks() argument
424 err = devm_clk_bulk_get_all(dev, &gr3d->clocks); in gr3d_get_clocks()
429 gr3d->nclocks = err; in gr3d_get_clocks()
431 if (gr3d->nclocks != gr3d->soc->num_clocks) { in gr3d_get_clocks()
432 dev_err(dev, "invalid number of clocks: %u\n", gr3d->nclocks); in gr3d_get_clocks()
433 return -ENOENT; in gr3d_get_clocks()
439 static int gr3d_get_resets(struct device *dev, struct gr3d *gr3d) in gr3d_get_resets() argument
443 gr3d->resets[RST_MC].id = "mc"; in gr3d_get_resets()
444 gr3d->resets[RST_MC2].id = "mc2"; in gr3d_get_resets()
445 gr3d->resets[RST_GR3D].id = "3d"; in gr3d_get_resets()
446 gr3d->resets[RST_GR3D2].id = "3d2"; in gr3d_get_resets()
447 gr3d->nresets = gr3d->soc->num_resets; in gr3d_get_resets()
450 dev, gr3d->nresets, gr3d->resets); in gr3d_get_resets()
456 if (WARN_ON(!gr3d->resets[RST_GR3D].rstc) || in gr3d_get_resets()
457 WARN_ON(!gr3d->resets[RST_GR3D2].rstc && gr3d->nresets == 4)) in gr3d_get_resets()
458 return -ENOENT; in gr3d_get_resets()
466 struct gr3d *gr3d; in gr3d_probe() local
470 gr3d = devm_kzalloc(&pdev->dev, sizeof(*gr3d), GFP_KERNEL); in gr3d_probe()
471 if (!gr3d) in gr3d_probe()
472 return -ENOMEM; in gr3d_probe()
474 platform_set_drvdata(pdev, gr3d); in gr3d_probe()
476 gr3d->soc = of_device_get_match_data(&pdev->dev); in gr3d_probe()
478 syncpts = devm_kzalloc(&pdev->dev, sizeof(*syncpts), GFP_KERNEL); in gr3d_probe()
480 return -ENOMEM; in gr3d_probe()
482 err = gr3d_get_clocks(&pdev->dev, gr3d); in gr3d_probe()
486 err = gr3d_get_resets(&pdev->dev, gr3d); in gr3d_probe()
490 err = gr3d_init_power(&pdev->dev, gr3d); in gr3d_probe()
494 INIT_LIST_HEAD(&gr3d->client.base.list); in gr3d_probe()
495 gr3d->client.base.ops = &gr3d_client_ops; in gr3d_probe()
496 gr3d->client.base.dev = &pdev->dev; in gr3d_probe()
497 gr3d->client.base.class = HOST1X_CLASS_GR3D; in gr3d_probe()
498 gr3d->client.base.syncpts = syncpts; in gr3d_probe()
499 gr3d->client.base.num_syncpts = 1; in gr3d_probe()
501 INIT_LIST_HEAD(&gr3d->client.list); in gr3d_probe()
502 gr3d->client.version = gr3d->soc->version; in gr3d_probe()
503 gr3d->client.ops = &gr3d_ops; in gr3d_probe()
505 err = devm_tegra_core_dev_init_opp_table_common(&pdev->dev); in gr3d_probe()
509 err = host1x_client_register(&gr3d->client.base); in gr3d_probe()
511 dev_err(&pdev->dev, "failed to register host1x client: %d\n", in gr3d_probe()
518 set_bit(gr3d_addr_regs[i], gr3d->addr_regs); in gr3d_probe()
525 struct gr3d *gr3d = platform_get_drvdata(pdev); in gr3d_remove() local
527 pm_runtime_disable(&pdev->dev); in gr3d_remove()
528 host1x_client_unregister(&gr3d->client.base); in gr3d_remove()
533 struct gr3d *gr3d = dev_get_drvdata(dev); in gr3d_runtime_suspend() local
536 host1x_channel_stop(gr3d->channel); in gr3d_runtime_suspend()
538 err = reset_control_bulk_assert(gr3d->nresets, gr3d->resets); in gr3d_runtime_suspend()
547 * Older device-trees don't specify MC resets and power-gating can't in gr3d_runtime_suspend()
549 * for older DTBs. For newer DTBs, GENPD will perform the power-gating. in gr3d_runtime_suspend()
552 clk_bulk_disable_unprepare(gr3d->nclocks, gr3d->clocks); in gr3d_runtime_suspend()
553 reset_control_bulk_release(gr3d->nresets, gr3d->resets); in gr3d_runtime_suspend()
560 struct gr3d *gr3d = dev_get_drvdata(dev); in gr3d_runtime_resume() local
563 err = reset_control_bulk_acquire(gr3d->nresets, gr3d->resets); in gr3d_runtime_resume()
569 err = clk_bulk_prepare_enable(gr3d->nclocks, gr3d->clocks); in gr3d_runtime_resume()
575 err = reset_control_bulk_deassert(gr3d->nresets, gr3d->resets); in gr3d_runtime_resume()
588 clk_bulk_disable_unprepare(gr3d->nclocks, gr3d->clocks); in gr3d_runtime_resume()
590 reset_control_bulk_release(gr3d->nresets, gr3d->resets); in gr3d_runtime_resume()
603 .name = "tegra-gr3d",