Lines Matching full:hdmi
47 struct sun4i_hdmi *hdmi = drm_connector_to_sun4i_hdmi(connector); in sun4i_hdmi_write_infoframe() local
57 writeb(buffer[i], hdmi->base + SUN4I_HDMI_AVI_INFOFRAME_REG(i)); in sun4i_hdmi_write_infoframe()
66 struct sun4i_hdmi *hdmi = drm_encoder_to_sun4i_hdmi(encoder); in sun4i_hdmi_disable() local
69 DRM_DEBUG_DRIVER("Disabling the HDMI Output\n"); in sun4i_hdmi_disable()
71 val = readl(hdmi->base + SUN4I_HDMI_VID_CTRL_REG); in sun4i_hdmi_disable()
73 writel(val, hdmi->base + SUN4I_HDMI_VID_CTRL_REG); in sun4i_hdmi_disable()
75 clk_disable_unprepare(hdmi->tmds_clk); in sun4i_hdmi_disable()
82 struct sun4i_hdmi *hdmi = drm_encoder_to_sun4i_hdmi(encoder); in sun4i_hdmi_enable() local
83 struct drm_connector *connector = &hdmi->connector; in sun4i_hdmi_enable()
87 unsigned long long tmds_rate = conn_state->hdmi.tmds_char_rate; in sun4i_hdmi_enable()
91 DRM_DEBUG_DRIVER("Enabling the HDMI Output\n"); in sun4i_hdmi_enable()
93 clk_set_rate(hdmi->mod_clk, tmds_rate); in sun4i_hdmi_enable()
94 clk_set_rate(hdmi->tmds_clk, tmds_rate); in sun4i_hdmi_enable()
98 hdmi->base + SUN4I_HDMI_UNKNOWN_REG); in sun4i_hdmi_enable()
110 val = readl(hdmi->base + SUN4I_HDMI_PAD_CTRL1_REG); in sun4i_hdmi_enable()
112 val |= hdmi->variant->pad_ctrl1_init_val; in sun4i_hdmi_enable()
113 writel(val, hdmi->base + SUN4I_HDMI_PAD_CTRL1_REG); in sun4i_hdmi_enable()
114 val = readl(hdmi->base + SUN4I_HDMI_PAD_CTRL1_REG); in sun4i_hdmi_enable()
119 hdmi->base + SUN4I_HDMI_VID_TIMING_ACT_REG); in sun4i_hdmi_enable()
124 hdmi->base + SUN4I_HDMI_VID_TIMING_BP_REG); in sun4i_hdmi_enable()
129 hdmi->base + SUN4I_HDMI_VID_TIMING_FP_REG); in sun4i_hdmi_enable()
134 hdmi->base + SUN4I_HDMI_VID_TIMING_SPW_REG); in sun4i_hdmi_enable()
143 writel(val, hdmi->base + SUN4I_HDMI_VID_TIMING_POL_REG); in sun4i_hdmi_enable()
145 clk_prepare_enable(hdmi->tmds_clk); in sun4i_hdmi_enable()
151 writel(val, hdmi->base + SUN4I_HDMI_PKT_CTRL_REG(0)); in sun4i_hdmi_enable()
157 writel(val, hdmi->base + SUN4I_HDMI_VID_CTRL_REG); in sun4i_hdmi_enable()
170 const struct sun4i_hdmi *hdmi = drm_connector_to_sun4i_hdmi(connector); in sun4i_hdmi_connector_clock_valid() local
171 unsigned long diff = div_u64(clock, 200); /* +-0.5% allowed by HDMI spec */ in sun4i_hdmi_connector_clock_valid()
177 /* 165 MHz is the typical max pixelclock frequency for HDMI <= 1.2 */ in sun4i_hdmi_connector_clock_valid()
181 rounded_rate = clk_round_rate(hdmi->tmds_clk, clock); in sun4i_hdmi_connector_clock_valid()
192 struct sun4i_hdmi *hdmi = drm_connector_to_sun4i_hdmi(connector); in sun4i_hdmi_get_modes() local
196 drm_edid = drm_edid_read_ddc(connector, hdmi->ddc_i2c ?: hdmi->i2c); in sun4i_hdmi_get_modes()
199 cec_s_phys_addr(hdmi->cec_adap, in sun4i_hdmi_get_modes()
206 connector->display_info.is_hdmi ? "an HDMI" : "a DVI"); in sun4i_hdmi_get_modes()
251 struct sun4i_hdmi *hdmi = drm_connector_to_sun4i_hdmi(connector); in sun4i_hdmi_connector_detect() local
254 reg = readl(hdmi->base + SUN4I_HDMI_HPD_REG); in sun4i_hdmi_connector_detect()
256 cec_phys_addr_invalidate(hdmi->cec_adap); in sun4i_hdmi_connector_detect()
280 struct sun4i_hdmi *hdmi = cec_get_drvdata(adap); in sun4i_hdmi_cec_pin_read() local
282 return readl(hdmi->base + SUN4I_HDMI_CEC) & SUN4I_HDMI_CEC_RX; in sun4i_hdmi_cec_pin_read()
287 struct sun4i_hdmi *hdmi = cec_get_drvdata(adap); in sun4i_hdmi_cec_pin_low() local
290 writel(SUN4I_HDMI_CEC_ENABLE, hdmi->base + SUN4I_HDMI_CEC); in sun4i_hdmi_cec_pin_low()
295 struct sun4i_hdmi *hdmi = cec_get_drvdata(adap); in sun4i_hdmi_cec_pin_high() local
301 writel(0, hdmi->base + SUN4I_HDMI_CEC); in sun4i_hdmi_cec_pin_high()
488 struct sun4i_hdmi *hdmi; in sun4i_hdmi_bind() local
492 hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL); in sun4i_hdmi_bind()
493 if (!hdmi) in sun4i_hdmi_bind()
495 dev_set_drvdata(dev, hdmi); in sun4i_hdmi_bind()
496 hdmi->dev = dev; in sun4i_hdmi_bind()
497 hdmi->drv = drv; in sun4i_hdmi_bind()
499 hdmi->variant = of_device_get_match_data(dev); in sun4i_hdmi_bind()
500 if (!hdmi->variant) in sun4i_hdmi_bind()
503 hdmi->base = devm_platform_ioremap_resource(pdev, 0); in sun4i_hdmi_bind()
504 if (IS_ERR(hdmi->base)) { in sun4i_hdmi_bind()
505 dev_err(dev, "Couldn't map the HDMI encoder registers\n"); in sun4i_hdmi_bind()
506 return PTR_ERR(hdmi->base); in sun4i_hdmi_bind()
509 if (hdmi->variant->has_reset_control) { in sun4i_hdmi_bind()
510 hdmi->reset = devm_reset_control_get(dev, NULL); in sun4i_hdmi_bind()
511 if (IS_ERR(hdmi->reset)) { in sun4i_hdmi_bind()
512 dev_err(dev, "Couldn't get the HDMI reset control\n"); in sun4i_hdmi_bind()
513 return PTR_ERR(hdmi->reset); in sun4i_hdmi_bind()
516 ret = reset_control_deassert(hdmi->reset); in sun4i_hdmi_bind()
518 dev_err(dev, "Couldn't deassert HDMI reset\n"); in sun4i_hdmi_bind()
523 hdmi->bus_clk = devm_clk_get(dev, "ahb"); in sun4i_hdmi_bind()
524 if (IS_ERR(hdmi->bus_clk)) { in sun4i_hdmi_bind()
525 dev_err(dev, "Couldn't get the HDMI bus clock\n"); in sun4i_hdmi_bind()
526 ret = PTR_ERR(hdmi->bus_clk); in sun4i_hdmi_bind()
529 clk_prepare_enable(hdmi->bus_clk); in sun4i_hdmi_bind()
531 hdmi->mod_clk = devm_clk_get(dev, "mod"); in sun4i_hdmi_bind()
532 if (IS_ERR(hdmi->mod_clk)) { in sun4i_hdmi_bind()
533 dev_err(dev, "Couldn't get the HDMI mod clock\n"); in sun4i_hdmi_bind()
534 ret = PTR_ERR(hdmi->mod_clk); in sun4i_hdmi_bind()
537 clk_prepare_enable(hdmi->mod_clk); in sun4i_hdmi_bind()
539 hdmi->pll0_clk = devm_clk_get(dev, "pll-0"); in sun4i_hdmi_bind()
540 if (IS_ERR(hdmi->pll0_clk)) { in sun4i_hdmi_bind()
541 dev_err(dev, "Couldn't get the HDMI PLL 0 clock\n"); in sun4i_hdmi_bind()
542 ret = PTR_ERR(hdmi->pll0_clk); in sun4i_hdmi_bind()
546 hdmi->pll1_clk = devm_clk_get(dev, "pll-1"); in sun4i_hdmi_bind()
547 if (IS_ERR(hdmi->pll1_clk)) { in sun4i_hdmi_bind()
548 dev_err(dev, "Couldn't get the HDMI PLL 1 clock\n"); in sun4i_hdmi_bind()
549 ret = PTR_ERR(hdmi->pll1_clk); in sun4i_hdmi_bind()
553 hdmi->regmap = devm_regmap_init_mmio(dev, hdmi->base, in sun4i_hdmi_bind()
555 if (IS_ERR(hdmi->regmap)) { in sun4i_hdmi_bind()
556 dev_err(dev, "Couldn't create HDMI encoder regmap\n"); in sun4i_hdmi_bind()
557 ret = PTR_ERR(hdmi->regmap); in sun4i_hdmi_bind()
561 ret = sun4i_tmds_create(hdmi); in sun4i_hdmi_bind()
567 if (hdmi->variant->has_ddc_parent_clk) { in sun4i_hdmi_bind()
568 hdmi->ddc_parent_clk = devm_clk_get(dev, "ddc"); in sun4i_hdmi_bind()
569 if (IS_ERR(hdmi->ddc_parent_clk)) { in sun4i_hdmi_bind()
570 dev_err(dev, "Couldn't get the HDMI DDC clock\n"); in sun4i_hdmi_bind()
571 ret = PTR_ERR(hdmi->ddc_parent_clk); in sun4i_hdmi_bind()
575 hdmi->ddc_parent_clk = hdmi->tmds_clk; in sun4i_hdmi_bind()
578 writel(SUN4I_HDMI_CTRL_ENABLE, hdmi->base + SUN4I_HDMI_CTRL_REG); in sun4i_hdmi_bind()
580 writel(hdmi->variant->pad_ctrl0_init_val, in sun4i_hdmi_bind()
581 hdmi->base + SUN4I_HDMI_PAD_CTRL0_REG); in sun4i_hdmi_bind()
583 reg = readl(hdmi->base + SUN4I_HDMI_PLL_CTRL_REG); in sun4i_hdmi_bind()
585 reg |= hdmi->variant->pll_ctrl_init_val; in sun4i_hdmi_bind()
586 writel(reg, hdmi->base + SUN4I_HDMI_PLL_CTRL_REG); in sun4i_hdmi_bind()
588 ret = sun4i_hdmi_i2c_create(dev, hdmi); in sun4i_hdmi_bind()
590 dev_err(dev, "Couldn't create the HDMI I2C adapter\n"); in sun4i_hdmi_bind()
594 hdmi->ddc_i2c = sun4i_hdmi_get_ddc(dev); in sun4i_hdmi_bind()
595 if (IS_ERR(hdmi->ddc_i2c)) { in sun4i_hdmi_bind()
596 ret = PTR_ERR(hdmi->ddc_i2c); in sun4i_hdmi_bind()
598 hdmi->ddc_i2c = NULL; in sun4i_hdmi_bind()
603 drm_encoder_helper_add(&hdmi->encoder, in sun4i_hdmi_bind()
605 ret = drm_simple_encoder_init(drm, &hdmi->encoder, in sun4i_hdmi_bind()
608 dev_err(dev, "Couldn't initialise the HDMI encoder\n"); in sun4i_hdmi_bind()
612 hdmi->encoder.possible_crtcs = drm_of_find_possible_crtcs(drm, in sun4i_hdmi_bind()
614 if (!hdmi->encoder.possible_crtcs) { in sun4i_hdmi_bind()
620 hdmi->cec_adap = cec_pin_allocate_adapter(&sun4i_hdmi_cec_pin_ops, in sun4i_hdmi_bind()
621 hdmi, "sun4i", CEC_CAP_DEFAULTS | CEC_CAP_CONNECTOR_INFO); in sun4i_hdmi_bind()
622 ret = PTR_ERR_OR_ZERO(hdmi->cec_adap); in sun4i_hdmi_bind()
625 writel(readl(hdmi->base + SUN4I_HDMI_CEC) & ~SUN4I_HDMI_CEC_TX, in sun4i_hdmi_bind()
626 hdmi->base + SUN4I_HDMI_CEC); in sun4i_hdmi_bind()
629 drm_connector_helper_add(&hdmi->connector, in sun4i_hdmi_bind()
631 ret = drmm_connector_hdmi_init(drm, &hdmi->connector, in sun4i_hdmi_bind()
637 "AW", "HDMI", in sun4i_hdmi_bind()
641 hdmi->ddc_i2c, in sun4i_hdmi_bind()
646 "Couldn't initialise the HDMI connector\n"); in sun4i_hdmi_bind()
649 cec_fill_conn_info_from_drm(&conn_info, &hdmi->connector); in sun4i_hdmi_bind()
650 cec_s_conn_info(hdmi->cec_adap, &conn_info); in sun4i_hdmi_bind()
653 hdmi->connector.polled = DRM_CONNECTOR_POLL_CONNECT | in sun4i_hdmi_bind()
656 ret = cec_register_adapter(hdmi->cec_adap, dev); in sun4i_hdmi_bind()
659 drm_connector_attach_encoder(&hdmi->connector, &hdmi->encoder); in sun4i_hdmi_bind()
664 cec_delete_adapter(hdmi->cec_adap); in sun4i_hdmi_bind()
665 drm_encoder_cleanup(&hdmi->encoder); in sun4i_hdmi_bind()
667 i2c_put_adapter(hdmi->ddc_i2c); in sun4i_hdmi_bind()
669 i2c_del_adapter(hdmi->i2c); in sun4i_hdmi_bind()
671 clk_disable_unprepare(hdmi->mod_clk); in sun4i_hdmi_bind()
673 clk_disable_unprepare(hdmi->bus_clk); in sun4i_hdmi_bind()
675 reset_control_assert(hdmi->reset); in sun4i_hdmi_bind()
682 struct sun4i_hdmi *hdmi = dev_get_drvdata(dev); in sun4i_hdmi_unbind() local
684 cec_unregister_adapter(hdmi->cec_adap); in sun4i_hdmi_unbind()
685 i2c_del_adapter(hdmi->i2c); in sun4i_hdmi_unbind()
686 i2c_put_adapter(hdmi->ddc_i2c); in sun4i_hdmi_unbind()
687 clk_disable_unprepare(hdmi->mod_clk); in sun4i_hdmi_unbind()
688 clk_disable_unprepare(hdmi->bus_clk); in sun4i_hdmi_unbind()
707 { .compatible = "allwinner,sun4i-a10-hdmi", .data = &sun4i_variant, },
708 { .compatible = "allwinner,sun5i-a10s-hdmi", .data = &sun5i_variant, },
709 { .compatible = "allwinner,sun6i-a31-hdmi", .data = &sun6i_variant, },
718 .name = "sun4i-hdmi",
725 MODULE_DESCRIPTION("Allwinner A10 HDMI Driver");