Lines Matching +full:3 +full:- +full:n
1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Zheng Yang <zhengyang@rock-chips.com>
5 * Yakir Yang <ykk@rock-chips.com>
27 #define m_VCLK_INV (1 << 3)
28 #define v_VCLK_NOT_INV (0 << 3)
29 #define v_VCLK_INV (1 << 3)
43 #define v_VIDEO_INPUT_FORMAT(n) (n << 1) argument
53 #define m_VIDEO_OUTPUT_COLOR (3 << 6)
54 #define m_VIDEO_INPUT_BITS (3 << 4)
56 #define v_VIDEO_OUTPUT_COLOR(n) (((n) & 0x3) << 6) argument
57 #define v_VIDEO_INPUT_BITS(n) (n << 4) argument
58 #define v_VIDEO_INPUT_CSP(n) (n << 0) argument
63 VIDEO_INPUT_8BITS = 3,
68 #define v_VIDEO_AUTO_CSC(n) (n << 7) argument
70 #define v_VIDEO_C0_C2_SWAP(n) (n << 0) argument
80 #define m_SOF (1 << 3)
83 #define v_COLOR_DEPTH_NOT_INDICATED(n) ((n) << 4) argument
84 #define v_SOF_ENABLE (0 << 3)
85 #define v_SOF_DISABLE (1 << 3)
96 #define v_AVMUTE_CLEAR(n) (n << 7) argument
97 #define v_AVMUTE_ENABLE(n) (n << 6) argument
98 #define v_AUDIO_MUTE(n) (n << 1) argument
99 #define v_VIDEO_MUTE(n) (n << 0) argument
102 #define v_HSYNC_POLARITY(n) (n << 3) argument
103 #define v_VSYNC_POLARITY(n) (n << 2) argument
104 #define v_INETLACE(n) (n << 1) argument
105 #define v_EXTERANL_VIDEO(n) (n << 0) argument
128 #define v_CTS_SOURCE(n) (n << 7) argument
135 #define v_DOWN_SAMPLE(n) (n << 5) argument
141 #define v_AUDIO_SOURCE(n) (n << 3) argument
143 #define v_MCLK_ENABLE(n) (n << 2) argument
148 MCLK_512FS = 3,
150 #define v_MCLK_RATIO(n) (n) argument
166 I2S_CHANNEL_3_4 = 3,
170 #define v_I2S_CHANNEL(n) ((n) << 2) argument
176 #define v_I2S_MODE(n) (n) argument
180 #define v_SPIDF_FREQ(n) (n) argument
194 #define m_AUDIO_STATUS_ADDITION (3 << 2)
196 #define v_AUDIO_STATUS_NLPCM(n) ((n & 1) << 7) argument
219 #define v_PACKET_GCP_EN(n) ((n & 1) << 7) argument
220 #define v_PACKET_MSI_EN(n) ((n & 1) << 6) argument
221 #define v_PACKET_SDI_EN(n) ((n & 1) << 5) argument
222 #define v_PACKET_VSI_EN(n) ((n & 1) << 4) argument
241 AVI_COLORIMETRY_EXTENDED = 3,
255 #define v_HDMI_DVI(n) (n << 1) argument
272 #define v_MASK_INT_HOTPLUG(n) ((n & 0x1) << 5) argument
284 #define m_TMDS_CURRENT_PWR (1 << 3)
285 #define v_TURN_ON_CURRENT (0 << 3)
286 #define v_CAT_OFF_CURRENT (1 << 3)
298 #define v_CLK_CHG_PWR(n) ((n & 1) << 3) argument
299 #define v_DATA_CHG_PWR(n) ((n & 7) << 0) argument
302 #define v_CLK_MAIN_DRIVER(n) (n << 4) argument
303 #define v_DATA_MAIN_DRIVER(n) (n << 0) argument
306 #define v_PRE_EMPHASIS(n) ((n & 7) << 4) argument
307 #define v_CLK_PRE_DRIVER(n) ((n & 3) << 2) argument
308 #define v_DATA_PRE_DRIVER(n) ((n & 3) << 0) argument
311 #define v_FEEDBACK_DIV_LOW(n) (n & 0xff) argument
313 #define v_FEEDBACK_DIV_HIGH(n) (n & 1) argument
316 #define v_PRE_DIV_RATIO(n) (n & 0x1f) argument
333 #define m_TX_DONE (1 << 3)
340 #define m_RX_GLITCH (1 << 3)