Lines Matching +full:syscon +full:- +full:hdmi
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) 2021-2022 Rockchip Electronics Co., Ltd.
6 * Author: Algea Cao <algea.cao@rock-chips.com>
12 #include <linux/mfd/syscon.h>
57 struct dw_hdmi_qp *hdmi; member
73 struct rockchip_hdmi_qp *hdmi = to_rockchip_hdmi_qp(encoder); in dw_hdmi_qp_rockchip_encoder_enable() local
74 struct drm_crtc *crtc = encoder->crtc; in dw_hdmi_qp_rockchip_encoder_enable()
78 gpiod_set_value(hdmi->enable_gpio, 1); in dw_hdmi_qp_rockchip_encoder_enable()
80 if (crtc && crtc->state) { in dw_hdmi_qp_rockchip_encoder_enable()
81 rate = drm_hdmi_compute_mode_clock(&crtc->state->adjusted_mode, in dw_hdmi_qp_rockchip_encoder_enable()
88 * drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c in dw_hdmi_qp_rockchip_encoder_enable()
90 phy_set_bus_width(hdmi->phy, div_u64(rate, 100)); in dw_hdmi_qp_rockchip_encoder_enable()
101 s->output_mode = ROCKCHIP_OUT_MODE_AAAA; in dw_hdmi_qp_rockchip_encoder_atomic_check()
102 s->output_type = DRM_MODE_CONNECTOR_HDMIA; in dw_hdmi_qp_rockchip_encoder_atomic_check()
115 struct rockchip_hdmi_qp *hdmi = (struct rockchip_hdmi_qp *)data; in dw_hdmi_qp_rk3588_phy_init() local
117 return phy_power_on(hdmi->phy); in dw_hdmi_qp_rk3588_phy_init()
123 struct rockchip_hdmi_qp *hdmi = (struct rockchip_hdmi_qp *)data; in dw_hdmi_qp_rk3588_phy_disable() local
125 phy_power_off(hdmi->phy); in dw_hdmi_qp_rk3588_phy_disable()
131 struct rockchip_hdmi_qp *hdmi = (struct rockchip_hdmi_qp *)data; in dw_hdmi_qp_rk3588_read_hpd() local
134 regmap_read(hdmi->regmap, RK3588_GRF_SOC_STATUS1, &val); in dw_hdmi_qp_rk3588_read_hpd()
135 val &= hdmi->port_id ? RK3588_HDMI1_LEVEL_INT : RK3588_HDMI0_LEVEL_INT; in dw_hdmi_qp_rk3588_read_hpd()
142 struct rockchip_hdmi_qp *hdmi = (struct rockchip_hdmi_qp *)data; in dw_hdmi_qp_rk3588_setup_hpd() local
145 if (hdmi->port_id) in dw_hdmi_qp_rk3588_setup_hpd()
152 regmap_write(hdmi->regmap, RK3588_GRF_SOC_CON2, val); in dw_hdmi_qp_rk3588_setup_hpd()
164 struct rockchip_hdmi_qp *hdmi = container_of(work, in dw_hdmi_qp_rk3588_hpd_work() local
167 struct drm_device *drm = hdmi->encoder.encoder.dev; in dw_hdmi_qp_rk3588_hpd_work()
173 dev_dbg(hdmi->dev, "connector status changed\n"); in dw_hdmi_qp_rk3588_hpd_work()
179 struct rockchip_hdmi_qp *hdmi = dev_id; in dw_hdmi_qp_rk3588_hardirq() local
182 regmap_read(hdmi->regmap, RK3588_GRF_SOC_STATUS1, &intr_stat); in dw_hdmi_qp_rk3588_hardirq()
185 if (hdmi->port_id) in dw_hdmi_qp_rk3588_hardirq()
191 regmap_write(hdmi->regmap, RK3588_GRF_SOC_CON2, val); in dw_hdmi_qp_rk3588_hardirq()
200 struct rockchip_hdmi_qp *hdmi = dev_id; in dw_hdmi_qp_rk3588_irq() local
203 regmap_read(hdmi->regmap, RK3588_GRF_SOC_STATUS1, &intr_stat); in dw_hdmi_qp_rk3588_irq()
207 if (hdmi->port_id) in dw_hdmi_qp_rk3588_irq()
213 regmap_write(hdmi->regmap, RK3588_GRF_SOC_CON2, val); in dw_hdmi_qp_rk3588_irq()
215 mod_delayed_work(system_wq, &hdmi->hpd_work, in dw_hdmi_qp_rk3588_irq()
218 if (hdmi->port_id) in dw_hdmi_qp_rk3588_irq()
222 regmap_write(hdmi->regmap, RK3588_GRF_SOC_CON2, val); in dw_hdmi_qp_rk3588_irq()
243 { .compatible = "rockchip,rk3588-dw-hdmi-qp",
258 struct rockchip_hdmi_qp *hdmi; in dw_hdmi_qp_rockchip_bind() local
264 if (!pdev->dev.of_node) in dw_hdmi_qp_rockchip_bind()
265 return -ENODEV; in dw_hdmi_qp_rockchip_bind()
267 hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL); in dw_hdmi_qp_rockchip_bind()
268 if (!hdmi) in dw_hdmi_qp_rockchip_bind()
269 return -ENOMEM; in dw_hdmi_qp_rockchip_bind()
273 return -ENODEV; in dw_hdmi_qp_rockchip_bind()
277 return -ENODEV; in dw_hdmi_qp_rockchip_bind()
279 hdmi->dev = &pdev->dev; in dw_hdmi_qp_rockchip_bind()
280 hdmi->port_id = -ENODEV; in dw_hdmi_qp_rockchip_bind()
283 for (i = 0; i < cfg->num_ports; i++) { in dw_hdmi_qp_rockchip_bind()
284 if (res->start == cfg->port_ids[i]) { in dw_hdmi_qp_rockchip_bind()
285 hdmi->port_id = i; in dw_hdmi_qp_rockchip_bind()
289 if (hdmi->port_id < 0) { in dw_hdmi_qp_rockchip_bind()
290 dev_err(hdmi->dev, "Failed to match HDMI port ID\n"); in dw_hdmi_qp_rockchip_bind()
291 return hdmi->port_id; in dw_hdmi_qp_rockchip_bind()
294 plat_data.phy_ops = cfg->phy_ops; in dw_hdmi_qp_rockchip_bind()
295 plat_data.phy_data = hdmi; in dw_hdmi_qp_rockchip_bind()
297 encoder = &hdmi->encoder.encoder; in dw_hdmi_qp_rockchip_bind()
298 encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node); in dw_hdmi_qp_rockchip_bind()
300 rockchip_drm_encoder_set_crtc_endpoint_id(&hdmi->encoder, in dw_hdmi_qp_rockchip_bind()
301 dev->of_node, 0, 0); in dw_hdmi_qp_rockchip_bind()
308 if (encoder->possible_crtcs == 0) in dw_hdmi_qp_rockchip_bind()
309 return -EPROBE_DEFER; in dw_hdmi_qp_rockchip_bind()
311 hdmi->regmap = syscon_regmap_lookup_by_phandle(dev->of_node, in dw_hdmi_qp_rockchip_bind()
313 if (IS_ERR(hdmi->regmap)) { in dw_hdmi_qp_rockchip_bind()
314 dev_err(hdmi->dev, "Unable to get rockchip,grf\n"); in dw_hdmi_qp_rockchip_bind()
315 return PTR_ERR(hdmi->regmap); in dw_hdmi_qp_rockchip_bind()
318 hdmi->vo_regmap = syscon_regmap_lookup_by_phandle(dev->of_node, in dw_hdmi_qp_rockchip_bind()
319 "rockchip,vo-grf"); in dw_hdmi_qp_rockchip_bind()
320 if (IS_ERR(hdmi->vo_regmap)) { in dw_hdmi_qp_rockchip_bind()
321 dev_err(hdmi->dev, "Unable to get rockchip,vo-grf\n"); in dw_hdmi_qp_rockchip_bind()
322 return PTR_ERR(hdmi->vo_regmap); in dw_hdmi_qp_rockchip_bind()
325 ret = devm_clk_bulk_get_all_enabled(hdmi->dev, &clks); in dw_hdmi_qp_rockchip_bind()
327 dev_err(hdmi->dev, "Failed to get clocks: %d\n", ret); in dw_hdmi_qp_rockchip_bind()
331 hdmi->enable_gpio = devm_gpiod_get_optional(hdmi->dev, "enable", in dw_hdmi_qp_rockchip_bind()
333 if (IS_ERR(hdmi->enable_gpio)) { in dw_hdmi_qp_rockchip_bind()
334 ret = PTR_ERR(hdmi->enable_gpio); in dw_hdmi_qp_rockchip_bind()
335 dev_err(hdmi->dev, "Failed to request enable GPIO: %d\n", ret); in dw_hdmi_qp_rockchip_bind()
339 hdmi->phy = devm_of_phy_get_by_index(dev, dev->of_node, 0); in dw_hdmi_qp_rockchip_bind()
340 if (IS_ERR(hdmi->phy)) { in dw_hdmi_qp_rockchip_bind()
341 ret = PTR_ERR(hdmi->phy); in dw_hdmi_qp_rockchip_bind()
342 if (ret != -EPROBE_DEFER) in dw_hdmi_qp_rockchip_bind()
343 dev_err(hdmi->dev, "failed to get phy: %d\n", ret); in dw_hdmi_qp_rockchip_bind()
351 regmap_write(hdmi->vo_regmap, in dw_hdmi_qp_rockchip_bind()
352 hdmi->port_id ? RK3588_GRF_VO1_CON6 : RK3588_GRF_VO1_CON3, in dw_hdmi_qp_rockchip_bind()
357 regmap_write(hdmi->regmap, RK3588_GRF_SOC_CON7, val); in dw_hdmi_qp_rockchip_bind()
359 if (hdmi->port_id) in dw_hdmi_qp_rockchip_bind()
365 regmap_write(hdmi->vo_regmap, RK3588_GRF_VO1_CON9, val); in dw_hdmi_qp_rockchip_bind()
367 if (hdmi->port_id) in dw_hdmi_qp_rockchip_bind()
371 regmap_write(hdmi->regmap, RK3588_GRF_SOC_CON2, val); in dw_hdmi_qp_rockchip_bind()
373 INIT_DELAYED_WORK(&hdmi->hpd_work, dw_hdmi_qp_rk3588_hpd_work); in dw_hdmi_qp_rockchip_bind()
383 ret = devm_request_threaded_irq(hdmi->dev, irq, in dw_hdmi_qp_rockchip_bind()
386 IRQF_SHARED, "dw-hdmi-qp-hpd", in dw_hdmi_qp_rockchip_bind()
387 hdmi); in dw_hdmi_qp_rockchip_bind()
394 platform_set_drvdata(pdev, hdmi); in dw_hdmi_qp_rockchip_bind()
396 hdmi->hdmi = dw_hdmi_qp_bind(pdev, encoder, &plat_data); in dw_hdmi_qp_rockchip_bind()
397 if (IS_ERR(hdmi->hdmi)) { in dw_hdmi_qp_rockchip_bind()
398 ret = PTR_ERR(hdmi->hdmi); in dw_hdmi_qp_rockchip_bind()
406 dev_err(hdmi->dev, "failed to init bridge connector: %d\n", ret); in dw_hdmi_qp_rockchip_bind()
417 struct rockchip_hdmi_qp *hdmi = dev_get_drvdata(dev); in dw_hdmi_qp_rockchip_unbind() local
419 cancel_delayed_work_sync(&hdmi->hpd_work); in dw_hdmi_qp_rockchip_unbind()
421 drm_encoder_cleanup(&hdmi->encoder.encoder); in dw_hdmi_qp_rockchip_unbind()
431 return component_add(&pdev->dev, &dw_hdmi_qp_rockchip_ops); in dw_hdmi_qp_rockchip_probe()
436 component_del(&pdev->dev, &dw_hdmi_qp_rockchip_ops); in dw_hdmi_qp_rockchip_remove()
441 struct rockchip_hdmi_qp *hdmi = dev_get_drvdata(dev); in dw_hdmi_qp_rockchip_resume() local
448 regmap_write(hdmi->vo_regmap, in dw_hdmi_qp_rockchip_resume()
449 hdmi->port_id ? RK3588_GRF_VO1_CON6 : RK3588_GRF_VO1_CON3, in dw_hdmi_qp_rockchip_resume()
454 regmap_write(hdmi->regmap, RK3588_GRF_SOC_CON7, val); in dw_hdmi_qp_rockchip_resume()
456 if (hdmi->port_id) in dw_hdmi_qp_rockchip_resume()
462 regmap_write(hdmi->vo_regmap, RK3588_GRF_VO1_CON9, val); in dw_hdmi_qp_rockchip_resume()
464 dw_hdmi_qp_resume(dev, hdmi->hdmi); in dw_hdmi_qp_rockchip_resume()
466 if (hdmi->encoder.encoder.dev) in dw_hdmi_qp_rockchip_resume()
467 drm_helper_hpd_irq_event(hdmi->encoder.encoder.dev); in dw_hdmi_qp_rockchip_resume()
480 .name = "dwhdmiqp-rockchip",