Lines Matching +full:hdmi +full:- +full:phy
1 // SPDX-License-Identifier: GPL-2.0-or-later
10 #include <linux/phy/phy.h>
38 /* need to be unset if hdmi or i2c should control voltage */
60 * struct rockchip_hdmi_chip_data - splite the grf setting of kind of chips
62 * @lcdsel_big: reg value of selecting vop big for HDMI
63 * @lcdsel_lit: reg value of selecting vop little for HDMI
82 struct dw_hdmi *hdmi; member
83 struct phy *phy; member
199 static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi) in rockchip_hdmi_parse_dt() argument
201 struct device_node *np = hdmi->dev->of_node; in rockchip_hdmi_parse_dt()
204 hdmi->regmap = syscon_regmap_lookup_by_phandle(np, "rockchip,grf"); in rockchip_hdmi_parse_dt()
205 if (IS_ERR(hdmi->regmap)) { in rockchip_hdmi_parse_dt()
206 dev_err(hdmi->dev, "Unable to get rockchip,grf\n"); in rockchip_hdmi_parse_dt()
207 return PTR_ERR(hdmi->regmap); in rockchip_hdmi_parse_dt()
210 hdmi->ref_clk = devm_clk_get_optional_enabled(hdmi->dev, "ref"); in rockchip_hdmi_parse_dt()
211 if (!hdmi->ref_clk) in rockchip_hdmi_parse_dt()
212 hdmi->ref_clk = devm_clk_get_optional_enabled(hdmi->dev, "vpll"); in rockchip_hdmi_parse_dt()
214 if (IS_ERR(hdmi->ref_clk)) { in rockchip_hdmi_parse_dt()
215 ret = PTR_ERR(hdmi->ref_clk); in rockchip_hdmi_parse_dt()
216 if (ret != -EPROBE_DEFER) in rockchip_hdmi_parse_dt()
217 dev_err(hdmi->dev, "failed to get reference clock\n"); in rockchip_hdmi_parse_dt()
221 hdmi->grf_clk = devm_clk_get_optional(hdmi->dev, "grf"); in rockchip_hdmi_parse_dt()
222 if (IS_ERR(hdmi->grf_clk)) { in rockchip_hdmi_parse_dt()
223 ret = PTR_ERR(hdmi->grf_clk); in rockchip_hdmi_parse_dt()
224 if (ret != -EPROBE_DEFER) in rockchip_hdmi_parse_dt()
225 dev_err(hdmi->dev, "failed to get grf clock\n"); in rockchip_hdmi_parse_dt()
229 ret = devm_regulator_get_enable(hdmi->dev, "avdd-0v9"); in rockchip_hdmi_parse_dt()
233 ret = devm_regulator_get_enable(hdmi->dev, "avdd-1v8"); in rockchip_hdmi_parse_dt()
243 struct rockchip_hdmi *hdmi = data; in dw_hdmi_rockchip_mode_valid() local
244 int pclk = mode->clock * 1000; in dw_hdmi_rockchip_mode_valid()
246 if (hdmi->chip_data->max_tmds_clock && in dw_hdmi_rockchip_mode_valid()
247 mode->clock > hdmi->chip_data->max_tmds_clock) in dw_hdmi_rockchip_mode_valid()
250 if (hdmi->ref_clk) { in dw_hdmi_rockchip_mode_valid()
251 int rpclk = clk_round_rate(hdmi->ref_clk, pclk); in dw_hdmi_rockchip_mode_valid()
253 if (rpclk < 0 || abs(rpclk - pclk) > pclk / 1000) in dw_hdmi_rockchip_mode_valid()
257 if (hdmi->hdmiphy_clk) { in dw_hdmi_rockchip_mode_valid()
258 int rpclk = clk_round_rate(hdmi->hdmiphy_clk, pclk); in dw_hdmi_rockchip_mode_valid()
260 if (rpclk < 0 || abs(rpclk - pclk) > pclk / 1000) in dw_hdmi_rockchip_mode_valid()
283 struct rockchip_hdmi *hdmi = to_rockchip_hdmi(encoder); in dw_hdmi_rockchip_encoder_mode_set() local
285 clk_set_rate(hdmi->ref_clk, adj_mode->clock * 1000); in dw_hdmi_rockchip_encoder_mode_set()
290 struct rockchip_hdmi *hdmi = to_rockchip_hdmi(encoder); in dw_hdmi_rockchip_encoder_enable() local
294 if (hdmi->chip_data->lcdsel_grf_reg < 0) in dw_hdmi_rockchip_encoder_enable()
297 ret = drm_of_encoder_active_endpoint_id(hdmi->dev->of_node, encoder); in dw_hdmi_rockchip_encoder_enable()
299 val = hdmi->chip_data->lcdsel_lit; in dw_hdmi_rockchip_encoder_enable()
301 val = hdmi->chip_data->lcdsel_big; in dw_hdmi_rockchip_encoder_enable()
303 ret = clk_prepare_enable(hdmi->grf_clk); in dw_hdmi_rockchip_encoder_enable()
305 dev_err(hdmi->dev, "failed to enable grfclk %d\n", ret); in dw_hdmi_rockchip_encoder_enable()
309 ret = regmap_write(hdmi->regmap, hdmi->chip_data->lcdsel_grf_reg, val); in dw_hdmi_rockchip_encoder_enable()
311 dev_err(hdmi->dev, "Could not write to GRF: %d\n", ret); in dw_hdmi_rockchip_encoder_enable()
313 clk_disable_unprepare(hdmi->grf_clk); in dw_hdmi_rockchip_encoder_enable()
314 dev_dbg(hdmi->dev, "vop %s output to hdmi\n", ret ? "LIT" : "BIG"); in dw_hdmi_rockchip_encoder_enable()
324 s->output_mode = ROCKCHIP_OUT_MODE_AAAA; in dw_hdmi_rockchip_encoder_atomic_check()
325 s->output_type = DRM_MODE_CONNECTOR_HDMIA; in dw_hdmi_rockchip_encoder_atomic_check()
342 struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data; in dw_hdmi_rockchip_genphy_init() local
346 return phy_power_on(hdmi->phy); in dw_hdmi_rockchip_genphy_init()
351 struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data; in dw_hdmi_rockchip_genphy_disable() local
353 phy_power_off(hdmi->phy); in dw_hdmi_rockchip_genphy_disable()
358 struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data; in dw_hdmi_rk3228_setup_hpd() local
362 regmap_write(hdmi->regmap, in dw_hdmi_rk3228_setup_hpd()
369 regmap_write(hdmi->regmap, in dw_hdmi_rk3228_setup_hpd()
378 struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data; in dw_hdmi_rk3328_read_hpd() local
384 regmap_write(hdmi->regmap, in dw_hdmi_rk3328_read_hpd()
389 regmap_write(hdmi->regmap, in dw_hdmi_rk3328_read_hpd()
398 struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data; in dw_hdmi_rk3328_setup_hpd() local
402 /* Enable and map pins to 3V grf-controlled io-voltage */ in dw_hdmi_rk3328_setup_hpd()
403 regmap_write(hdmi->regmap, in dw_hdmi_rk3328_setup_hpd()
408 regmap_write(hdmi->regmap, in dw_hdmi_rk3328_setup_hpd()
413 regmap_write(hdmi->regmap, in dw_hdmi_rk3328_setup_hpd()
431 .lcdsel_grf_reg = -1,
467 .lcdsel_grf_reg = -1,
497 .lcdsel_grf_reg = -1,
511 { .compatible = "rockchip,rk3228-dw-hdmi",
514 { .compatible = "rockchip,rk3288-dw-hdmi",
517 { .compatible = "rockchip,rk3328-dw-hdmi",
520 { .compatible = "rockchip,rk3399-dw-hdmi",
523 { .compatible = "rockchip,rk3568-dw-hdmi",
538 struct rockchip_hdmi *hdmi; in dw_hdmi_rockchip_bind() local
541 if (!pdev->dev.of_node) in dw_hdmi_rockchip_bind()
542 return -ENODEV; in dw_hdmi_rockchip_bind()
544 hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL); in dw_hdmi_rockchip_bind()
545 if (!hdmi) in dw_hdmi_rockchip_bind()
546 return -ENOMEM; in dw_hdmi_rockchip_bind()
548 match = of_match_node(dw_hdmi_rockchip_dt_ids, pdev->dev.of_node); in dw_hdmi_rockchip_bind()
549 plat_data = devm_kmemdup(&pdev->dev, match->data, in dw_hdmi_rockchip_bind()
552 return -ENOMEM; in dw_hdmi_rockchip_bind()
554 hdmi->dev = &pdev->dev; in dw_hdmi_rockchip_bind()
555 hdmi->plat_data = plat_data; in dw_hdmi_rockchip_bind()
556 hdmi->chip_data = plat_data->phy_data; in dw_hdmi_rockchip_bind()
557 plat_data->phy_data = hdmi; in dw_hdmi_rockchip_bind()
558 plat_data->priv_data = hdmi; in dw_hdmi_rockchip_bind()
559 encoder = &hdmi->encoder.encoder; in dw_hdmi_rockchip_bind()
561 encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node); in dw_hdmi_rockchip_bind()
562 rockchip_drm_encoder_set_crtc_endpoint_id(&hdmi->encoder, in dw_hdmi_rockchip_bind()
563 dev->of_node, 0, 0); in dw_hdmi_rockchip_bind()
571 if (encoder->possible_crtcs == 0) in dw_hdmi_rockchip_bind()
572 return -EPROBE_DEFER; in dw_hdmi_rockchip_bind()
574 ret = rockchip_hdmi_parse_dt(hdmi); in dw_hdmi_rockchip_bind()
576 if (ret != -EPROBE_DEFER) in dw_hdmi_rockchip_bind()
577 dev_err(hdmi->dev, "Unable to parse OF data\n"); in dw_hdmi_rockchip_bind()
581 hdmi->phy = devm_phy_optional_get(dev, "hdmi"); in dw_hdmi_rockchip_bind()
582 if (IS_ERR(hdmi->phy)) { in dw_hdmi_rockchip_bind()
583 ret = PTR_ERR(hdmi->phy); in dw_hdmi_rockchip_bind()
584 if (ret != -EPROBE_DEFER) in dw_hdmi_rockchip_bind()
585 dev_err(hdmi->dev, "failed to get phy\n"); in dw_hdmi_rockchip_bind()
589 if (hdmi->phy) { in dw_hdmi_rockchip_bind()
592 clkspec.np = hdmi->phy->dev.of_node; in dw_hdmi_rockchip_bind()
593 hdmi->hdmiphy_clk = of_clk_get_from_provider(&clkspec); in dw_hdmi_rockchip_bind()
594 if (IS_ERR(hdmi->hdmiphy_clk)) in dw_hdmi_rockchip_bind()
595 hdmi->hdmiphy_clk = NULL; in dw_hdmi_rockchip_bind()
598 if (hdmi->chip_data == &rk3568_chip_data) { in dw_hdmi_rockchip_bind()
599 regmap_write(hdmi->regmap, RK3568_GRF_VO_CON1, in dw_hdmi_rockchip_bind()
609 platform_set_drvdata(pdev, hdmi); in dw_hdmi_rockchip_bind()
611 hdmi->hdmi = dw_hdmi_bind(pdev, encoder, plat_data); in dw_hdmi_rockchip_bind()
617 if (IS_ERR(hdmi->hdmi)) { in dw_hdmi_rockchip_bind()
618 ret = PTR_ERR(hdmi->hdmi); in dw_hdmi_rockchip_bind()
633 struct rockchip_hdmi *hdmi = dev_get_drvdata(dev); in dw_hdmi_rockchip_unbind() local
635 dw_hdmi_unbind(hdmi->hdmi); in dw_hdmi_rockchip_unbind()
636 drm_encoder_cleanup(&hdmi->encoder.encoder); in dw_hdmi_rockchip_unbind()
646 return component_add(&pdev->dev, &dw_hdmi_rockchip_ops); in dw_hdmi_rockchip_probe()
651 component_del(&pdev->dev, &dw_hdmi_rockchip_ops); in dw_hdmi_rockchip_remove()
656 struct rockchip_hdmi *hdmi = dev_get_drvdata(dev); in dw_hdmi_rockchip_resume() local
658 dw_hdmi_resume(hdmi->hdmi); in dw_hdmi_rockchip_resume()
671 .name = "dwhdmi-rockchip",