Lines Matching full:dsi2
85 static void grf_field_write(struct dw_mipi_dsi2_rockchip *dsi2, enum grf_reg_fields index, in grf_field_write() argument
88 const struct dsigrf_reg *field = &dsi2->cdata->grf_regs[index]; in grf_field_write()
93 regmap_write(dsi2->grf_regmap, field->offset, in grf_field_write()
104 struct dw_mipi_dsi2_rockchip *dsi2 = priv_data; in dw_mipi_dsi2_phy_power_on() local
107 ret = phy_set_mode(dsi2->phy, PHY_MODE_MIPI_DPHY); in dw_mipi_dsi2_phy_power_on()
109 dev_err(dsi2->dev, "Failed to set phy mode: %d\n", ret); in dw_mipi_dsi2_phy_power_on()
113 phy_configure(dsi2->phy, &dsi2->phy_opts); in dw_mipi_dsi2_phy_power_on()
114 phy_power_on(dsi2->phy); in dw_mipi_dsi2_phy_power_on()
119 struct dw_mipi_dsi2_rockchip *dsi2 = priv_data; in dw_mipi_dsi2_phy_power_off() local
121 phy_power_off(dsi2->phy); in dw_mipi_dsi2_phy_power_off()
129 struct dw_mipi_dsi2_rockchip *dsi2 = priv_data; in dw_mipi_dsi2_get_lane_mbps() local
134 max_lane_rate = dsi2->cdata->max_bit_rate_per_lane; in dw_mipi_dsi2_get_lane_mbps()
136 dsi2->format = format; in dw_mipi_dsi2_get_lane_mbps()
139 dev_err(dsi2->dev, "failed to get bpp for pixel format %d\n", format); in dw_mipi_dsi2_get_lane_mbps()
155 dev_err(dsi2->dev, "DPHY clock frequency is out of range\n"); in dw_mipi_dsi2_get_lane_mbps()
159 dsi2->lane_mbps = lane_rate_kbps / 1000; in dw_mipi_dsi2_get_lane_mbps()
160 *lane_mbps = dsi2->lane_mbps; in dw_mipi_dsi2_get_lane_mbps()
162 if (dsi2->phy) { in dw_mipi_dsi2_get_lane_mbps()
165 &dsi2->phy_opts.mipi_dphy); in dw_mipi_dsi2_get_lane_mbps()
182 struct dw_mipi_dsi2_rockchip *dsi2 = priv_data; in dw_mipi_dsi2_phy_get_timing() local
183 struct phy_configure_opts_mipi_dphy *cfg = &dsi2->phy_opts.mipi_dphy; in dw_mipi_dsi2_phy_get_timing()
187 hstx_clk = DIV_ROUND_CLOSEST_ULL(dsi2->lane_mbps * USEC_PER_SEC, 16); in dw_mipi_dsi2_phy_get_timing()
217 struct dw_mipi_dsi2_rockchip *dsi2 = to_dsi2(encoder); in dw_mipi_dsi2_encoder_atomic_enable() local
220 switch (dsi2->format) { in dw_mipi_dsi2_encoder_atomic_enable()
237 grf_field_write(dsi2, IPI_COLOR_DEPTH, color_depth); in dw_mipi_dsi2_encoder_atomic_enable()
246 struct dw_mipi_dsi2_rockchip *dsi2 = to_dsi2(encoder); in dw_mipi_dsi2_encoder_atomic_check() local
250 switch (dsi2->format) { in dw_mipi_dsi2_encoder_atomic_check()
284 static int rockchip_dsi2_drm_create_encoder(struct dw_mipi_dsi2_rockchip *dsi2, in rockchip_dsi2_drm_create_encoder() argument
287 struct drm_encoder *encoder = &dsi2->encoder.encoder; in rockchip_dsi2_drm_create_encoder()
291 dsi2->dev->of_node); in rockchip_dsi2_drm_create_encoder()
295 dev_err(dsi2->dev, "Failed to initialize encoder with drm\n"); in rockchip_dsi2_drm_create_encoder()
307 struct dw_mipi_dsi2_rockchip *dsi2 = dev_get_drvdata(dev); in dw_mipi_dsi2_rockchip_bind() local
311 ret = rockchip_dsi2_drm_create_encoder(dsi2, drm_dev); in dw_mipi_dsi2_rockchip_bind()
315 rockchip_drm_encoder_set_crtc_endpoint_id(&dsi2->encoder, in dw_mipi_dsi2_rockchip_bind()
318 ret = dw_mipi_dsi2_bind(dsi2->dmd, &dsi2->encoder.encoder); in dw_mipi_dsi2_rockchip_bind()
328 struct dw_mipi_dsi2_rockchip *dsi2 = dev_get_drvdata(dev); in dw_mipi_dsi2_rockchip_unbind() local
330 dw_mipi_dsi2_unbind(dsi2->dmd); in dw_mipi_dsi2_rockchip_unbind()
341 struct dw_mipi_dsi2_rockchip *dsi2 = priv_data; in dw_mipi_dsi2_rockchip_host_attach() local
344 ret = component_add(dsi2->dev, &dw_mipi_dsi2_rockchip_ops); in dw_mipi_dsi2_rockchip_host_attach()
346 return dev_err_probe(dsi2->dev, ret, "Failed to register component\n"); in dw_mipi_dsi2_rockchip_host_attach()
354 struct dw_mipi_dsi2_rockchip *dsi2 = priv_data; in dw_mipi_dsi2_rockchip_host_detach() local
356 component_del(dsi2->dev, &dw_mipi_dsi2_rockchip_ops); in dw_mipi_dsi2_rockchip_host_detach()
367 .name = "dsi2-host",
380 struct dw_mipi_dsi2_rockchip *dsi2; in dw_mipi_dsi2_rockchip_probe() local
385 dsi2 = devm_kzalloc(dev, sizeof(*dsi2), GFP_KERNEL); in dw_mipi_dsi2_rockchip_probe()
386 if (!dsi2) in dw_mipi_dsi2_rockchip_probe()
393 dsi2->regmap = devm_regmap_init_mmio(dev, base, &dw_mipi_dsi2_rockchip_regmap_config); in dw_mipi_dsi2_rockchip_probe()
394 if (IS_ERR(dsi2->regmap)) in dw_mipi_dsi2_rockchip_probe()
395 return dev_err_probe(dev, PTR_ERR(dsi2->regmap), "failed to init register map\n"); in dw_mipi_dsi2_rockchip_probe()
400 dsi2->cdata = &cdata[i]; in dw_mipi_dsi2_rockchip_probe()
407 if (!dsi2->cdata) in dw_mipi_dsi2_rockchip_probe()
410 dsi2->grf_regmap = syscon_regmap_lookup_by_phandle(dev->of_node, "rockchip,grf"); in dw_mipi_dsi2_rockchip_probe()
411 if (IS_ERR(dsi2->grf_regmap)) in dw_mipi_dsi2_rockchip_probe()
412 return dev_err_probe(dsi2->dev, PTR_ERR(dsi2->grf_regmap), "Unable to get grf\n"); in dw_mipi_dsi2_rockchip_probe()
414 dsi2->phy = devm_phy_optional_get(dev, "dcphy"); in dw_mipi_dsi2_rockchip_probe()
415 if (IS_ERR(dsi2->phy)) in dw_mipi_dsi2_rockchip_probe()
416 return dev_err_probe(dev, PTR_ERR(dsi2->phy), "failed to get mipi phy\n"); in dw_mipi_dsi2_rockchip_probe()
418 dsi2->dev = dev; in dw_mipi_dsi2_rockchip_probe()
419 dsi2->pdata.regmap = dsi2->regmap; in dw_mipi_dsi2_rockchip_probe()
420 dsi2->pdata.max_data_lanes = 4; in dw_mipi_dsi2_rockchip_probe()
421 dsi2->pdata.phy_ops = &dw_mipi_dsi2_rockchip_phy_ops; in dw_mipi_dsi2_rockchip_probe()
422 dsi2->pdata.host_ops = &dw_mipi_dsi2_rockchip_host_ops; in dw_mipi_dsi2_rockchip_probe()
423 dsi2->pdata.priv_data = dsi2; in dw_mipi_dsi2_rockchip_probe()
424 platform_set_drvdata(pdev, dsi2); in dw_mipi_dsi2_rockchip_probe()
426 dsi2->dmd = dw_mipi_dsi2_probe(pdev, &dsi2->pdata); in dw_mipi_dsi2_rockchip_probe()
427 if (IS_ERR(dsi2->dmd)) in dw_mipi_dsi2_rockchip_probe()
428 return dev_err_probe(dev, PTR_ERR(dsi2->dmd), "Failed to probe dw_mipi_dsi2\n"); in dw_mipi_dsi2_rockchip_probe()
435 struct dw_mipi_dsi2_rockchip *dsi2 = platform_get_drvdata(pdev); in dw_mipi_dsi2_rockchip_remove() local
437 dw_mipi_dsi2_remove(dsi2->dmd); in dw_mipi_dsi2_rockchip_remove()
473 .compatible = "rockchip,rk3588-mipi-dsi2",
485 .name = "dw-mipi-dsi2",