Lines Matching defs:SMU7_Discrete_DpmTable
276 struct SMU7_Discrete_DpmTable { struct
277 SMU7_PIDController GraphicsPIDController;
278 SMU7_PIDController MemoryPIDController;
279 SMU7_PIDController LinkPIDController;
281 uint32_t SystemFlags;
284 uint32_t SmioMaskVddcVid;
285 uint32_t SmioMaskVddcPhase;
286 uint32_t SmioMaskVddciVid;
287 uint32_t SmioMaskMvddVid;
289 uint32_t VddcLevelCount;
290 uint32_t VddciLevelCount;
291 uint32_t MvddLevelCount;
293 SMU7_Discrete_VoltageLevel VddcLevel [SMU7_MAX_LEVELS_VDDC];
295 SMU7_Discrete_VoltageLevel VddciLevel [SMU7_MAX_LEVELS_VDDCI];
296 SMU7_Discrete_VoltageLevel MvddLevel [SMU7_MAX_LEVELS_MVDD];
298 uint8_t GraphicsDpmLevelCount;
299 uint8_t MemoryDpmLevelCount;
300 uint8_t LinkLevelCount;
301 uint8_t UvdLevelCount;
302 uint8_t VceLevelCount;
303 uint8_t AcpLevelCount;
304 uint8_t SamuLevelCount;
305 uint8_t MasterDeepSleepControl;
306 uint32_t Reserved[5];
309 SMU7_Discrete_GraphicsLevel GraphicsLevel [SMU7_MAX_LEVELS_GRAPHICS];
310 SMU7_Discrete_MemoryLevel MemoryACPILevel;
311 SMU7_Discrete_MemoryLevel MemoryLevel [SMU7_MAX_LEVELS_MEMORY];
312 SMU7_Discrete_LinkLevel LinkLevel [SMU7_MAX_LEVELS_LINK];
313 SMU7_Discrete_ACPILevel ACPILevel;
314 SMU7_Discrete_UvdLevel UvdLevel [SMU7_MAX_LEVELS_UVD];
315 SMU7_Discrete_ExtClkLevel VceLevel [SMU7_MAX_LEVELS_VCE];
316 SMU7_Discrete_ExtClkLevel AcpLevel [SMU7_MAX_LEVELS_ACP];
317 SMU7_Discrete_ExtClkLevel SamuLevel [SMU7_MAX_LEVELS_SAMU];
318 SMU7_Discrete_Ulv Ulv;
320 uint32_t SclkStepSize;
321 uint32_t Smio [SMU7_MAX_ENTRIES_SMIO];
323 uint8_t UvdBootLevel;
324 uint8_t VceBootLevel;
325 uint8_t AcpBootLevel;
326 uint8_t SamuBootLevel;
328 uint8_t UVDInterval;
329 uint8_t VCEInterval;
330 uint8_t ACPInterval;
331 uint8_t SAMUInterval;
333 uint8_t GraphicsBootLevel;
334 uint8_t GraphicsVoltageChangeEnable;
335 uint8_t GraphicsThermThrottleEnable;
336 uint8_t GraphicsInterval;
338 uint8_t VoltageInterval;
339 uint8_t ThermalInterval;
340 uint16_t TemperatureLimitHigh;
342 uint16_t TemperatureLimitLow;
343 uint8_t MemoryBootLevel;
344 uint8_t MemoryVoltageChangeEnable;
346 uint8_t MemoryInterval;
347 uint8_t MemoryThermThrottleEnable;
348 uint16_t VddcVddciDelta;
350 uint16_t VoltageResponseTime;
351 uint16_t PhaseResponseTime;
353 uint8_t PCIeBootLinkLevel;
354 uint8_t PCIeGenInterval;
355 uint8_t DTEInterval;
356 uint8_t DTEMode;
358 uint8_t SVI2Enable;
359 uint8_t VRHotGpio;
360 uint8_t AcDcGpio;
361 uint8_t ThermGpio;
363 uint16_t PPM_PkgPwrLimit;
364 uint16_t PPM_TemperatureLimit;
366 uint16_t DefaultTdp;
367 uint16_t TargetTdp;
391 typedef struct SMU7_Discrete_DpmTable SMU7_Discrete_DpmTable; argument