40 	spin_lock_irqsave(&rdev->end_idx_lock, flags);  in dce6_endpoint_rreg()
43 	spin_unlock_irqrestore(&rdev->end_idx_lock, flags);  in dce6_endpoint_rreg()
53 	spin_lock_irqsave(&rdev->end_idx_lock, flags);  in dce6_endpoint_wreg()
60 	spin_unlock_irqrestore(&rdev->end_idx_lock, flags);  in dce6_endpoint_wreg()
68 	for (i = 0; i < rdev->audio.num_pins; i++) {  in dce6_afmt_get_connected_pins()
69 		offset = rdev->audio.pin[i].offset;  in dce6_afmt_get_connected_pins()
73 			rdev->audio.pin[i].connected = false;  in dce6_afmt_get_connected_pins()
75 			rdev->audio.pin[i].connected = true;  in dce6_afmt_get_connected_pins()
83 	struct radeon_encoder_atom_dig *dig;  in dce6_audio_get_pin()  local
89 	for (i = 0; i < rdev->audio.num_pins; i++) {  in dce6_audio_get_pin()
90 		if (rdev->audio.pin[i].connected) {  in dce6_audio_get_pin()
91 			pin = &rdev->audio.pin[i];  in dce6_audio_get_pin()
94 			list_for_each_entry(encoder, &rdev_to_drm(rdev)->mode_config.encoder_list, head) {  in dce6_audio_get_pin()
97 					dig = radeon_encoder->enc_priv;  in dce6_audio_get_pin()
98 					if (dig->pin == pin)  in dce6_audio_get_pin()
114 	struct radeon_device *rdev = encoder->dev->dev_private;  in dce6_afmt_select_pin()
116 	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;  in dce6_afmt_select_pin()  local
118 	if (!dig || !dig->afmt || !dig->pin)  in dce6_afmt_select_pin()
121 	WREG32(AFMT_AUDIO_SRC_CONTROL +  dig->afmt->offset,  in dce6_afmt_select_pin()
122 	       AFMT_AUDIO_SRC_SELECT(dig->pin->id));  in dce6_afmt_select_pin()
129 	struct radeon_device *rdev = encoder->dev->dev_private;  in dce6_afmt_write_latency_fields()
131 	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;  in dce6_afmt_write_latency_fields()  local
134 	if (!dig || !dig->afmt || !dig->pin)  in dce6_afmt_write_latency_fields()
137 	if (mode->flags & DRM_MODE_FLAG_INTERLACE) {  in dce6_afmt_write_latency_fields()
138 		if (connector->latency_present[1])  in dce6_afmt_write_latency_fields()
139 			tmp = VIDEO_LIPSYNC(connector->video_latency[1]) |  in dce6_afmt_write_latency_fields()
140 				AUDIO_LIPSYNC(connector->audio_latency[1]);  in dce6_afmt_write_latency_fields()
144 		if (connector->latency_present[0])  in dce6_afmt_write_latency_fields()
145 			tmp = VIDEO_LIPSYNC(connector->video_latency[0]) |  in dce6_afmt_write_latency_fields()
146 				AUDIO_LIPSYNC(connector->audio_latency[0]);  in dce6_afmt_write_latency_fields()
150 	WREG32_ENDPOINT(dig->pin->offset,  in dce6_afmt_write_latency_fields()
157 	struct radeon_device *rdev = encoder->dev->dev_private;  in dce6_afmt_hdmi_write_speaker_allocation()
159 	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;  in dce6_afmt_hdmi_write_speaker_allocation()  local
162 	if (!dig || !dig->afmt || !dig->pin)  in dce6_afmt_hdmi_write_speaker_allocation()
166 	tmp = RREG32_ENDPOINT(dig->pin->offset,  in dce6_afmt_hdmi_write_speaker_allocation()
175 	WREG32_ENDPOINT(dig->pin->offset,  in dce6_afmt_hdmi_write_speaker_allocation()
182 	struct radeon_device *rdev = encoder->dev->dev_private;  in dce6_afmt_dp_write_speaker_allocation()
184 	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;  in dce6_afmt_dp_write_speaker_allocation()  local
187 	if (!dig || !dig->afmt || !dig->pin)  in dce6_afmt_dp_write_speaker_allocation()
191 	tmp = RREG32_ENDPOINT(dig->pin->offset,  in dce6_afmt_dp_write_speaker_allocation()
200 	WREG32_ENDPOINT(dig->pin->offset,  in dce6_afmt_dp_write_speaker_allocation()
209 	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;  in dce6_afmt_write_sad_regs()  local
210 	struct radeon_device *rdev = encoder->dev->dev_private;  in dce6_afmt_write_sad_regs()
226 	if (!dig || !dig->afmt || !dig->pin)  in dce6_afmt_write_sad_regs()
232 		int max_channels = -1;  in dce6_afmt_write_sad_regs()
238 			if (sad->format == eld_reg_to_type[i][1]) {  in dce6_afmt_write_sad_regs()
239 				if (sad->channels > max_channels) {  in dce6_afmt_write_sad_regs()
240 					value = MAX_CHANNELS(sad->channels) |  in dce6_afmt_write_sad_regs()
241 						DESCRIPTOR_BYTE_2(sad->byte2) |  in dce6_afmt_write_sad_regs()
242 						SUPPORTED_FREQUENCIES(sad->freq);  in dce6_afmt_write_sad_regs()
243 					max_channels = sad->channels;  in dce6_afmt_write_sad_regs()
246 				if (sad->format == HDMI_AUDIO_CODING_TYPE_PCM)  in dce6_afmt_write_sad_regs()
247 					stereo_freqs |= sad->freq;  in dce6_afmt_write_sad_regs()
255 		WREG32_ENDPOINT(dig->pin->offset, eld_reg_to_type[i][0], value);  in dce6_afmt_write_sad_regs()
266 	WREG32_ENDPOINT(pin->offset, AZ_F0_CODEC_PIN_CONTROL_HOT_PLUG_CONTROL,  in dce6_audio_enable()
277 		value |= DCCG_AUDIO_DTO0_SOURCE_SEL(crtc->crtc_id);  in dce6_hdmi_audio_set_dto()
297 		value |= DCCG_AUDIO_DTO0_SOURCE_SEL(crtc->crtc_id);  in dce6_dp_audio_set_dto()
306 		unsigned int div = (RREG32(DENTIST_DISPCLK_CNTL) &  in dce6_dp_audio_set_dto()  local
309 		div = radeon_audio_decode_dfs_div(div);  in dce6_dp_audio_set_dto()
311 		if (div)  in dce6_dp_audio_set_dto()
312 			clock = clock * 100 / div;  in dce6_dp_audio_set_dto()