24 #define MCS_LEVEL2_KEY		0xf0
25 #define MCS_MTP_KEY		0xf1
26 #define MCS_MTP_SET3		0xd4
55 	.flags = 0,
61 		0x00, 0x00, 0x00, 0x7f, 0x7f, 0x7f, 0x52, 0x6b, 0x6f, 0x26,
62 		0x28, 0x2d, 0x28, 0x26, 0x27, 0x33, 0x34, 0x32, 0x36, 0x36,
63 		0x35, 0x00, 0xab, 0x00, 0xae, 0x00, 0xbf
67 		0x00, 0x00, 0x00, 0x70, 0x7f, 0x7f, 0x4e, 0x64, 0x69, 0x26,
68 		0x27, 0x2a, 0x28, 0x29, 0x27, 0x31, 0x32, 0x31, 0x35, 0x34,
69 		0x35, 0x00, 0xc4, 0x00, 0xca, 0x00, 0xdc
73 		0x00, 0x00, 0x00, 0x65, 0x7b, 0x7d, 0x5f, 0x67, 0x68, 0x2a,
74 		0x28, 0x29, 0x28, 0x2a, 0x27, 0x31, 0x2f, 0x30, 0x34, 0x33,
75 		0x34, 0x00, 0xd9, 0x00, 0xe4, 0x00, 0xf5
79 		0x00, 0x00, 0x00, 0x4d, 0x6f, 0x71, 0x67, 0x6a, 0x6c, 0x29,
80 		0x28, 0x28, 0x28, 0x29, 0x27, 0x30, 0x2e, 0x30, 0x32, 0x31,
81 		0x31, 0x00, 0xea, 0x00, 0xf6, 0x01, 0x09
85 		0x00, 0x00, 0x00, 0x3d, 0x66, 0x68, 0x69, 0x69, 0x69, 0x28,
86 		0x28, 0x27, 0x28, 0x28, 0x27, 0x30, 0x2e, 0x2f, 0x31, 0x31,
87 		0x30, 0x00, 0xf9, 0x01, 0x05, 0x01, 0x1b
91 		0x00, 0x00, 0x00, 0x31, 0x51, 0x53, 0x66, 0x66, 0x67, 0x28,
92 		0x29, 0x27, 0x28, 0x27, 0x27, 0x2e, 0x2d, 0x2e, 0x31, 0x31,
93 		0x30, 0x01, 0x04, 0x01, 0x11, 0x01, 0x29
97 		0x00, 0x00, 0x00, 0x2f, 0x4f, 0x51, 0x67, 0x65, 0x65, 0x29,
98 		0x2a, 0x28, 0x27, 0x25, 0x26, 0x2d, 0x2c, 0x2c, 0x30, 0x30,
99 		0x30, 0x01, 0x14, 0x01, 0x23, 0x01, 0x3b
103 		0x00, 0x00, 0x00, 0x2c, 0x4d, 0x50, 0x65, 0x63, 0x64, 0x2a,
104 		0x2c, 0x29, 0x26, 0x24, 0x25, 0x2c, 0x2b, 0x2b, 0x30, 0x30,
105 		0x30, 0x01, 0x1e, 0x01, 0x2f, 0x01, 0x47
109 		0x00, 0x00, 0x00, 0x38, 0x61, 0x64, 0x65, 0x63, 0x64, 0x28,
110 		0x2a, 0x27, 0x26, 0x23, 0x25, 0x2b, 0x2b, 0x2a, 0x30, 0x2f,
111 		0x30, 0x01, 0x2d, 0x01, 0x3f, 0x01, 0x57
136 	return s6e63j0x03_dcs_write_seq_static(ctx, MCS_LEVEL2_KEY, 0x5a, 0x5a);  in s6e63j0x03_enable_lv2_command()
143 				MCS_MTP_KEY, 0x5a, 0x5a);  in s6e63j0x03_apply_mtp_key()
145 	return s6e63j0x03_dcs_write_seq_static(ctx, MCS_MTP_KEY, 0xa5, 0xa5);  in s6e63j0x03_apply_mtp_key()
153 	if (ret < 0)  in s6e63j0x03_power_on()
160 	gpiod_set_value(ctx->reset_gpio, 0);  in s6e63j0x03_power_on()
163 	return 0;  in s6e63j0x03_power_on()
191 	if (ret < 0)  in s6e63j0x03_update_gamma()
195 	if (ret < 0)  in s6e63j0x03_update_gamma()
199 	if (ret < 0)  in s6e63j0x03_update_gamma()
204 	return 0;  in s6e63j0x03_update_gamma()
226 	if (ret < 0)  in s6e63j0x03_disable()
232 	if (ret < 0)  in s6e63j0x03_disable()
237 	return 0;  in s6e63j0x03_disable()
246 	if (ret < 0)  in s6e63j0x03_unprepare()
251 	return 0;  in s6e63j0x03_unprepare()
260 	if (ret < 0)  in s6e63j0x03_panel_init()
264 	if (ret < 0)  in s6e63j0x03_panel_init()
268 	ret = s6e63j0x03_dcs_write_seq_static(ctx, 0xf2, 0x1c, 0x28);  in s6e63j0x03_panel_init()
269 	if (ret < 0)  in s6e63j0x03_panel_init()
273 	ret = s6e63j0x03_dcs_write_seq_static(ctx, 0xb5, 0x00, 0x02, 0x00);  in s6e63j0x03_panel_init()
274 	if (ret < 0)  in s6e63j0x03_panel_init()
280 	if (ret < 0)  in s6e63j0x03_panel_init()
283 	ret = mipi_dsi_dcs_set_page_address(dsi, 0, default_mode.vdisplay - 1);  in s6e63j0x03_panel_init()
284 	if (ret < 0)  in s6e63j0x03_panel_init()
287 	/* set ltps timming 0, 1 */  in s6e63j0x03_panel_init()
288 	ret = s6e63j0x03_dcs_write_seq_static(ctx, 0xf8, 0x08, 0x08, 0x08, 0x17,  in s6e63j0x03_panel_init()
289 		0x00, 0x2a, 0x02, 0x26, 0x00, 0x00, 0x02, 0x00, 0x00);  in s6e63j0x03_panel_init()
290 	if (ret < 0)  in s6e63j0x03_panel_init()
293 	ret = s6e63j0x03_dcs_write_seq_static(ctx, 0xf7, 0x02);  in s6e63j0x03_panel_init()
294 	if (ret < 0)  in s6e63j0x03_panel_init()
298 	ret = s6e63j0x03_dcs_write_seq_static(ctx, 0xb0, 0x01);  in s6e63j0x03_panel_init()
299 	if (ret < 0)  in s6e63j0x03_panel_init()
303 	ret = s6e63j0x03_dcs_write_seq_static(ctx, 0xe2, 0x0f);  in s6e63j0x03_panel_init()
304 	if (ret < 0)  in s6e63j0x03_panel_init()
308 	ret = s6e63j0x03_dcs_write_seq_static(ctx, 0xb0, 0x00);  in s6e63j0x03_panel_init()
309 	if (ret < 0)  in s6e63j0x03_panel_init()
313 	if (ret < 0)  in s6e63j0x03_panel_init()
317 	if (ret < 0)  in s6e63j0x03_panel_init()
320 	return 0;  in s6e63j0x03_panel_init()
329 	if (ret < 0)  in s6e63j0x03_prepare()
333 	if (ret < 0)  in s6e63j0x03_prepare()
338 	return 0;  in s6e63j0x03_prepare()
354 	if (ret < 0)  in s6e63j0x03_enable()
358 	ret = s6e63j0x03_dcs_write_seq_static(ctx, 0xb1, 0x00, 0x09);  in s6e63j0x03_enable()
359 	if (ret < 0)  in s6e63j0x03_enable()
364 		MIPI_DCS_SET_ADDRESS_MODE, 0x40);  in s6e63j0x03_enable()
365 	if (ret < 0)  in s6e63j0x03_enable()
369 	ret = mipi_dsi_dcs_set_display_brightness(dsi, 0x00ff);  in s6e63j0x03_enable()
370 	if (ret < 0)  in s6e63j0x03_enable()
375 		MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x20);  in s6e63j0x03_enable()
376 	if (ret < 0)  in s6e63j0x03_enable()
381 		MIPI_DCS_WRITE_POWER_SAVE, 0x00);  in s6e63j0x03_enable()
382 	if (ret < 0)  in s6e63j0x03_enable()
386 	if (ret < 0)  in s6e63j0x03_enable()
390 	if (ret < 0)  in s6e63j0x03_enable()
394 	if (ret < 0)  in s6e63j0x03_enable()
399 	return 0;  in s6e63j0x03_enable()
453 	ctx->supplies[0].supply = "vdd3";  in s6e63j0x03_probe()
457 	if (ret < 0)  in s6e63j0x03_probe()
482 	if (ret < 0)  in s6e63j0x03_probe()