31 	u32 gpio = nvkm_rd32(device, 0x00d610 + (line * 0x04));  in pwm_info()
33 	switch (gpio & 0x000000c0) {  in pwm_info()
34 	case 0x00000000: /* normal mode, possibly pwm forced off by us */  in pwm_info()
35 	case 0x00000040: /* nvio special */  in pwm_info()
36 		switch (gpio & 0x0000001f) {  in pwm_info()
37 		case 0x00: return 2;  in pwm_info()
38 		case 0x19: return 1;  in pwm_info()
39 		case 0x1c: return 0;  in pwm_info()
40 		case 0x1e: return 2;  in pwm_info()
57 	u32 data = enable ? 0x00000040 : 0x00000000;  in gf119_fan_pwm_ctrl()
59 	if (indx < 0)  in gf119_fan_pwm_ctrl()
62 		nvkm_mask(device, 0x00d610 + (line * 0x04), 0x000000c0, data);  in gf119_fan_pwm_ctrl()
64 	return 0;  in gf119_fan_pwm_ctrl()
72 	if (indx < 0)  in gf119_fan_pwm_get()
75 		if (nvkm_rd32(device, 0x00d610 + (line * 0x04)) & 0x00000040) {  in gf119_fan_pwm_get()
76 			*divs = nvkm_rd32(device, 0x00e114 + (indx * 8));  in gf119_fan_pwm_get()
77 			*duty = nvkm_rd32(device, 0x00e118 + (indx * 8));  in gf119_fan_pwm_get()
78 			return 0;  in gf119_fan_pwm_get()
81 		*divs = nvkm_rd32(device, 0x0200d8) & 0x1fff;  in gf119_fan_pwm_get()
82 		*duty = nvkm_rd32(device, 0x0200dc) & 0x1fff;  in gf119_fan_pwm_get()
83 		return 0;  in gf119_fan_pwm_get()
94 	if (indx < 0)  in gf119_fan_pwm_set()
97 		nvkm_wr32(device, 0x00e114 + (indx * 8), divs);  in gf119_fan_pwm_set()
98 		nvkm_wr32(device, 0x00e118 + (indx * 8), duty | 0x80000000);  in gf119_fan_pwm_set()
100 		nvkm_mask(device, 0x0200d8, 0x1fff, divs); /* keep the high bits */  in gf119_fan_pwm_set()
101 		nvkm_wr32(device, 0x0200dc, duty | 0x40000000);  in gf119_fan_pwm_set()
103 	return 0;  in gf119_fan_pwm_set()
111 	if (indx < 0)  in gf119_fan_pwm_clock()
112 		return 0;  in gf119_fan_pwm_clock()
127 	nvkm_mask(device, 0x00e720, 0x00000003, 0x00000002);  in gf119_therm_init()
129 		nvkm_mask(device, 0x00d79c, 0x000000ff, therm->fan->tach.line);  in gf119_therm_init()
130 		nvkm_wr32(device, 0x00e724, device->crystal * 1000);  in gf119_therm_init()
131 		nvkm_mask(device, 0x00e720, 0x00000001, 0x00000001);  in gf119_therm_init()
133 	nvkm_mask(device, 0x00e720, 0x00000002, 0x00000000);  in gf119_therm_init()