Lines Matching +full:0 +full:x01010000
28 { 0x00001000, NVKM_ENGINE_GR },
29 { 0x00000100, NVKM_ENGINE_FIFO },
36 nvkm_mask(mc->subdev.device, 0x000200, mask, 0x00000000); in nv04_mc_device_disable()
44 nvkm_mask(device, 0x000200, mask, mask); in nv04_mc_device_enable()
45 nvkm_rd32(device, 0x000200); in nv04_mc_device_enable()
51 return (nvkm_rd32(mc->subdev.device, 0x000200) & mask) == mask; in nv04_mc_device_enabled()
63 { NVKM_ENGINE_DISP , 0, 0, 0x01010000, true },
64 { NVKM_ENGINE_GR , 0, 0, 0x00001000, true },
65 { NVKM_ENGINE_FIFO , 0, 0, 0x00000100 },
66 { NVKM_SUBDEV_BUS , 0, 0, 0x10000000, true },
67 { NVKM_SUBDEV_TIMER, 0, 0, 0x00100000, true },
77 for (leaf = 0; leaf < intr->leaves; leaf++) in nv04_mc_intr_rearm()
78 nvkm_wr32(mc->subdev.device, 0x000140 + (leaf * 4), 0x00000001); in nv04_mc_intr_rearm()
87 for (leaf = 0; leaf < intr->leaves; leaf++) in nv04_mc_intr_unarm()
88 nvkm_wr32(mc->subdev.device, 0x000140 + (leaf * 4), 0x00000000); in nv04_mc_intr_unarm()
90 nvkm_rd32(mc->subdev.device, 0x000140); in nv04_mc_intr_unarm()
100 for (leaf = 0; leaf < intr->leaves; leaf++) { in nv04_mc_intr_pending()
101 intr->stat[leaf] = nvkm_rd32(mc->subdev.device, 0x000100 + (leaf * 4)); in nv04_mc_intr_pending()
120 nvkm_wr32(device, 0x000200, 0xffffffff); /* everything enabled */ in nv04_mc_init()
121 nvkm_wr32(device, 0x001850, 0x00000001); /* disable rom access */ in nv04_mc_init()