31 	int c = 0;  in nvkm_xtensa_oclass_get()
47 	return nvkm_gpuobj_new(object->engine->subdev.device, 0x10000, align,  in nvkm_xtensa_cclass_bind()
63 	u32 unk104 = nvkm_rd32(device, base + 0xd04);  in nvkm_xtensa_intr()
64 	u32 intr = nvkm_rd32(device, base + 0xc20);  in nvkm_xtensa_intr()
65 	u32 chan = nvkm_rd32(device, base + 0xc28);  in nvkm_xtensa_intr()
66 	u32 unk10c = nvkm_rd32(device, base + 0xd0c);  in nvkm_xtensa_intr()
68 	if (intr & 0x10)  in nvkm_xtensa_intr()
70 	nvkm_wr32(device, base + 0xc20, intr);  in nvkm_xtensa_intr()
71 	intr = nvkm_rd32(device, base + 0xc20);  in nvkm_xtensa_intr()
72 	if (unk104 == 0x10001 && unk10c == 0x200 && chan && !intr) {  in nvkm_xtensa_intr()
74 		nvkm_mask(device, xtensa->addr + 0xd94, 0, xtensa->func->fifo_val);  in nvkm_xtensa_intr()
85 	nvkm_wr32(device, base + 0xd84, 0); /* INTR_EN */  in nvkm_xtensa_fini()
86 	nvkm_wr32(device, base + 0xd94, 0); /* FIFO_CTRL */  in nvkm_xtensa_fini()
90 	return 0;  in nvkm_xtensa_fini()
116 		if (fw->size > 0x40000) {  in nvkm_xtensa_init()
123 				      0x40000, 0x1000, false,  in nvkm_xtensa_init()
131 		for (i = 0; i < fw->size / 4; i++)  in nvkm_xtensa_init()
140 	nvkm_wr32(device, base + 0xd10, 0x1fffffff); /* ?? */  in nvkm_xtensa_init()
141 	nvkm_wr32(device, base + 0xd08, 0x0fffffff); /* ?? */  in nvkm_xtensa_init()
143 	nvkm_wr32(device, base + 0xd28, xtensa->func->unkd28); /* ?? */  in nvkm_xtensa_init()
144 	nvkm_wr32(device, base + 0xc20, 0x3f); /* INTR */  in nvkm_xtensa_init()
145 	nvkm_wr32(device, base + 0xd84, 0x3f); /* INTR_EN */  in nvkm_xtensa_init()
147 	nvkm_wr32(device, base + 0xcc0, addr >> 8); /* XT_REGION_BASE */  in nvkm_xtensa_init()
148 	nvkm_wr32(device, base + 0xcc4, 0x1c); /* XT_REGION_SETUP */  in nvkm_xtensa_init()
149 	nvkm_wr32(device, base + 0xcc8, size >> 8); /* XT_REGION_LIMIT */  in nvkm_xtensa_init()
151 	tmp = nvkm_rd32(device, 0x0);  in nvkm_xtensa_init()
152 	nvkm_wr32(device, base + 0xde0, tmp); /* SCRATCH_H2X */  in nvkm_xtensa_init()
154 	nvkm_wr32(device, base + 0xce8, 0xf); /* XT_REGION_SETUP */  in nvkm_xtensa_init()
156 	nvkm_wr32(device, base + 0xc20, 0x3f); /* INTR */  in nvkm_xtensa_init()
157 	nvkm_wr32(device, base + 0xd84, 0x3f); /* INTR_EN */  in nvkm_xtensa_init()
158 	return 0;  in nvkm_xtensa_init()