Lines Matching +full:11 +full:- +full:bit
1 /* SPDX-License-Identifier: GPL-2.0 */
11 #define MCDE_PP_VCMPA BIT(0)
12 #define MCDE_PP_VCMPB BIT(1)
13 #define MCDE_PP_VSCC0 BIT(2)
14 #define MCDE_PP_VSCC1 BIT(3)
15 #define MCDE_PP_VCMPC0 BIT(4)
16 #define MCDE_PP_VCMPC1 BIT(5)
17 #define MCDE_PP_ROTFD_A BIT(6)
18 #define MCDE_PP_ROTFD_B BIT(7)
74 #define MCDE_EXTSRCXCONF_BPP_YCBCR422 11
75 #define MCDE_EXTSRCXCONF_BGR BIT(12)
76 #define MCDE_EXTSRCXCONF_BEBO BIT(13)
77 #define MCDE_EXTSRCXCONF_BEPO BIT(14)
97 #define MCDE_EXTSRCXCR_MULTIOVL_CTRL_PRIMARY BIT(2) /* 0 = all */
98 #define MCDE_EXTSRCXCR_FS_DIV_DISABLE BIT(3)
99 #define MCDE_EXTSRCXCR_FORCE_FS_DIV BIT(4)
111 #define MCDE_OVLXCR_OVLEN BIT(0)
115 #define MCDE_OVLXCR_CKEYGEN BIT(3)
116 #define MCDE_OVLXCR_ALPHAPMEN BIT(4)
117 #define MCDE_OVLXCR_OVLF BIT(5)
118 #define MCDE_OVLXCR_OVLR BIT(6)
119 #define MCDE_OVLXCR_OVLB BIT(7)
134 #define MCDE_OVLXCR_BURSTSIZE_HW_8W 11
153 #define MCDE_OVLXCR_ROTBURSTSIZE_HW_8W 11
164 #define MCDE_OVLXCONF_EXTSRC_ID_SHIFT 11
176 #define MCDE_OVLXCONF2_BP_CONSTANT_ALPHA BIT(0)
179 #define MCDE_OVLXCONF2_OPQ BIT(9)
211 #define MCDE_OVLXCOMP_CH_ID_SHIFT 11
221 #define MCDE_TVCR_MOD_TV BIT(0) /* 0 = LCD mode */
222 #define MCDE_TVCR_INTEREN BIT(1)
223 #define MCDE_TVCR_IFIELD BIT(2)
229 #define MCDE_TVCR_AVRGEN BIT(8)
230 #define MCDE_TVCR_CKINV BIT(9)
235 #define MCDE_TVBL1_BEL1_SHIFT 0 /* VFP vertical front porch 11 bits */
236 #define MCDE_TVBL1_BSL1_SHIFT 16 /* VSW vertical sync pulse width 11 bits */
241 #define MCDE_TVISL_FSL1_SHIFT 0 /* Field 1 identification start line 11 bits */
242 #define MCDE_TVISL_FSL2_SHIFT 16 /* Field 2 identification start line 11 bits */
252 * HBP horizontal back porch 11 bits horizontal offset
253 * 0 = 1 pixel HBP, 255 = 256 pixels, so actual value - 1
262 #define MCDE_TVLBALW_LBW_SHIFT 0 /* HSW horizonal sync width, line blanking width 11 bits */
263 #define MCDE_TVLBALW_ALW_SHIFT 16 /* HFP horizontal front porch, active line width 11 bits */
268 #define MCDE_TVBL2_BEL2_SHIFT 0 /* Field 2 blanking end line 11 bits */
269 #define MCDE_TVBL2_BSL2_SHIFT 16 /* Field 2 blanking start line 11 bits */
282 #define MCDE_LCDTIM1B_IVP BIT(19)
284 #define MCDE_LCDTIM1B_IVS BIT(20)
286 #define MCDE_LCDTIM1B_IHS BIT(21)
288 #define MCDE_LCDTIM1B_IPC BIT(22)
290 #define MCDE_LCDTIM1B_IOE BIT(23)
293 #define MCDE_CRC_C1EN BIT(2)
294 #define MCDE_CRC_C2EN BIT(3)
295 #define MCDE_CRC_SYCEN0 BIT(7)
296 #define MCDE_CRC_SYCEN1 BIT(8)
297 #define MCDE_CRC_SIZE1 BIT(9)
298 #define MCDE_CRC_SIZE2 BIT(10)
299 #define MCDE_CRC_YUVCONVC1EN BIT(15)
300 #define MCDE_CRC_CS1EN BIT(16)
301 #define MCDE_CRC_CS2EN BIT(17)
302 #define MCDE_CRC_CS1POL BIT(19)
303 #define MCDE_CRC_CS2POL BIT(20)
304 #define MCDE_CRC_CD1POL BIT(21)
305 #define MCDE_CRC_CD2POL BIT(22)
306 #define MCDE_CRC_WR1POL BIT(23)
307 #define MCDE_CRC_WR2POL BIT(24)
308 #define MCDE_CRC_RD1POL BIT(25)
309 #define MCDE_CRC_RD2POL BIT(26)
316 #define MCDE_CRC_CLAMPC1EN BIT(31)
333 #define MCDE_VSCRC_VSPOL BIT(27) /* 0 active high, 1 active low */
334 #define MCDE_VSCRC_VSSEL BIT(28) /* 0 VSYNC0, 1 VSYNC1 */
335 #define MCDE_VSCRC_VSDBL BIT(29)
353 #define MCDE_CHNLXSTAT_CHNLRD BIT(0)
354 #define MCDE_CHNLXSTAT_CHNLA BIT(1)
355 #define MCDE_CHNLXSTAT_CHNLBLBCKGND_EN BIT(16)
356 #define MCDE_CHNLXSTAT_PPLX2_V422 BIT(17)
357 #define MCDE_CHNLXSTAT_LPFX2_V422 BIT(18)
381 #define MCDE_CHNLXSYNCHSW_SW_TRIG BIT(0)
406 #define MCDE_CRX0_FLOEN BIT(0)
407 #define MCDE_CRX0_POWEREN BIT(1)
408 #define MCDE_CRX0_BLENDEN BIT(2)
409 #define MCDE_CRX0_AFLICKEN BIT(3)
410 #define MCDE_CRX0_PALEN BIT(4)
411 #define MCDE_CRX0_DITHEN BIT(5)
412 #define MCDE_CRX0_GAMEN BIT(6)
420 #define MCDE_CRX0_BLENDCTRL BIT(10)
421 #define MCDE_CRX0_FLICKMODE_SHIFT 11
426 #define MCDE_CRX0_FLOCKFORMAT_RGB BIT(13) /* 0 = YCVCR */
427 #define MCDE_CRX0_PALMODE_GAMMA BIT(14) /* 0 = palette */
428 #define MCDE_CRX0_OLEDEN BIT(15)
431 #define MCDE_CRX0_ROTEN BIT(24)
468 #define MCDE_CRX1_BCD BIT(29)
469 #define MCDE_CRA1_CLKTYPE_TVXCLKSEL1 BIT(30) /* 0 = TVXCLKSEL1 */
519 #define MCDE_CTRLX_FIFOEMPTY BIT(12)
520 #define MCDE_CTRLX_FIFOFULL BIT(13)
546 #define MCDE_DSICONF0_VID_MODE_VID BIT(12)
547 #define MCDE_DSICONF0_CMD8 BIT(13)
548 #define MCDE_DSICONF0_BIT_SWAP BIT(16)
549 #define MCDE_DSICONF0_BYTE_SWAP BIT(17)
550 #define MCDE_DSICONF0_DCSVID_NOTGEN BIT(18)