117 	return NULL;  in intel_gvt_find_mmio_info()
172 	return NULL;  in intel_gvt_render_mmio_to_engine()
1182 	struct intel_vgpu_dpcd_data *dpcd = NULL;  in dp_aux_ch_ctl_mmio_write()
1183 	struct intel_vgpu_port *port = NULL;  in dp_aux_ch_ctl_mmio_write()
1517 	char *env[3] = {NULL, NULL, NULL};  in send_display_ready_uevent()
2202 	MMIO_RING_DFH(RING_IMR, D_ALL, 0, NULL,  in init_generic_mmio_info()
2205 	MMIO_DFH(SDEIMR, D_ALL, 0, NULL, intel_vgpu_reg_imr_handler);  in init_generic_mmio_info()
2206 	MMIO_DFH(SDEIER, D_ALL, 0, NULL, intel_vgpu_reg_ier_handler);  in init_generic_mmio_info()
2207 	MMIO_DFH(SDEIIR, D_ALL, 0, NULL, intel_vgpu_reg_iir_handler);  in init_generic_mmio_info()
2209 	MMIO_RING_DFH(RING_HWSTAM, D_ALL, 0, NULL, NULL);  in init_generic_mmio_info()
2212 	MMIO_DH(GEN8_GAMW_ECO_DEV_RW_IA, D_BDW_PLUS, NULL,  in init_generic_mmio_info()
2215 	MMIO_GM_RDR(BSD_HWS_PGA_GEN7, D_ALL, NULL, NULL);  in init_generic_mmio_info()
2216 	MMIO_GM_RDR(BLT_HWS_PGA_GEN7, D_ALL, NULL, NULL);  in init_generic_mmio_info()
2217 	MMIO_GM_RDR(VEBOX_HWS_PGA_GEN7, D_ALL, NULL, NULL);  in init_generic_mmio_info()
2220 	MMIO_RING_DFH(RING_REG, D_ALL, F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2224 	MMIO_RING_DFH(RING_REG, D_ALL, F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2228 	MMIO_RING_DFH(RING_REG, D_ALL, 0, mmio_read_from_hw, NULL);  in init_generic_mmio_info()
2230 	MMIO_DH(GEN7_SC_INSTDONE, D_BDW_PLUS, mmio_read_from_hw, NULL);  in init_generic_mmio_info()
2232 	MMIO_GM_RDR(_MMIO(0x2148), D_ALL, NULL, NULL);  in init_generic_mmio_info()
2233 	MMIO_GM_RDR(CCID(RENDER_RING_BASE), D_ALL, NULL, NULL);  in init_generic_mmio_info()
2234 	MMIO_GM_RDR(_MMIO(0x12198), D_ALL, NULL, NULL);  in init_generic_mmio_info()
2236 	MMIO_RING_DFH(RING_TAIL, D_ALL, 0, NULL, NULL);  in init_generic_mmio_info()
2237 	MMIO_RING_DFH(RING_HEAD, D_ALL, 0, NULL, NULL);  in init_generic_mmio_info()
2238 	MMIO_RING_DFH(RING_CTL, D_ALL, 0, NULL, NULL);  in init_generic_mmio_info()
2239 	MMIO_RING_DFH(RING_ACTHD, D_ALL, 0, mmio_read_from_hw, NULL);  in init_generic_mmio_info()
2240 	MMIO_RING_GM(RING_START, D_ALL, NULL, NULL);  in init_generic_mmio_info()
2245 		F_MODE_MASK | F_CMD_ACCESS | F_CMD_WRITE_PATCH, NULL,  in init_generic_mmio_info()
2250 		NULL, NULL);  in init_generic_mmio_info()
2252 			NULL, NULL);  in init_generic_mmio_info()
2254 			mmio_read_from_hw, NULL);  in init_generic_mmio_info()
2256 			mmio_read_from_hw, NULL);  in init_generic_mmio_info()
2258 	MMIO_DFH(GEN7_GT_MODE, D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2260 		NULL, NULL);  in init_generic_mmio_info()
2261 	MMIO_DFH(CACHE_MODE_1, D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2262 	MMIO_DFH(CACHE_MODE_0, D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2263 	MMIO_DFH(_MMIO(0x2124), D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2265 	MMIO_DFH(_MMIO(0x20dc), D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2266 	MMIO_DFH(_3D_CHICKEN3, D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2267 	MMIO_DFH(_MMIO(0x2088), D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2269 		 F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2270 	MMIO_DFH(_MMIO(0x2470), D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2271 	MMIO_DFH(GAM_ECOCHK, D_ALL, F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2273 		NULL, NULL);  in init_generic_mmio_info()
2275 		 NULL, NULL);  in init_generic_mmio_info()
2276 	MMIO_DFH(_MMIO(0x9030), D_ALL, F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2277 	MMIO_DFH(_MMIO(0x20a0), D_ALL, F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2278 	MMIO_DFH(_MMIO(0x2420), D_ALL, F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2279 	MMIO_DFH(_MMIO(0x2430), D_ALL, F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2280 	MMIO_DFH(_MMIO(0x2434), D_ALL, F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2281 	MMIO_DFH(_MMIO(0x2438), D_ALL, F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2282 	MMIO_DFH(_MMIO(0x243c), D_ALL, F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2283 	MMIO_DFH(_MMIO(0x7018), D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2284 	MMIO_DFH(HSW_HALF_SLICE_CHICKEN3, D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2285 	MMIO_DFH(GEN7_HALF_SLICE_CHICKEN1, D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2288 	MMIO_DH(TRANSCONF(display, TRANSCODER_A), D_ALL, NULL,  in init_generic_mmio_info()
2290 	MMIO_DH(TRANSCONF(display, TRANSCODER_B), D_ALL, NULL,  in init_generic_mmio_info()
2292 	MMIO_DH(TRANSCONF(display, TRANSCODER_C), D_ALL, NULL,  in init_generic_mmio_info()
2294 	MMIO_DH(TRANSCONF(display, TRANSCODER_EDP), D_ALL, NULL,  in init_generic_mmio_info()
2296 	MMIO_DH(DSPSURF(display, PIPE_A), D_ALL, NULL, pri_surf_mmio_write);  in init_generic_mmio_info()
2297 	MMIO_DH(REG_50080(PIPE_A, PLANE_PRIMARY), D_ALL, NULL,  in init_generic_mmio_info()
2299 	MMIO_DH(DSPSURF(display, PIPE_B), D_ALL, NULL, pri_surf_mmio_write);  in init_generic_mmio_info()
2300 	MMIO_DH(REG_50080(PIPE_B, PLANE_PRIMARY), D_ALL, NULL,  in init_generic_mmio_info()
2302 	MMIO_DH(DSPSURF(display, PIPE_C), D_ALL, NULL, pri_surf_mmio_write);  in init_generic_mmio_info()
2303 	MMIO_DH(REG_50080(PIPE_C, PLANE_PRIMARY), D_ALL, NULL,  in init_generic_mmio_info()
2305 	MMIO_DH(SPRSURF(PIPE_A), D_ALL, NULL, spr_surf_mmio_write);  in init_generic_mmio_info()
2306 	MMIO_DH(REG_50080(PIPE_A, PLANE_SPRITE0), D_ALL, NULL,  in init_generic_mmio_info()
2308 	MMIO_DH(SPRSURF(PIPE_B), D_ALL, NULL, spr_surf_mmio_write);  in init_generic_mmio_info()
2309 	MMIO_DH(REG_50080(PIPE_B, PLANE_SPRITE0), D_ALL, NULL,  in init_generic_mmio_info()
2311 	MMIO_DH(SPRSURF(PIPE_C), D_ALL, NULL, spr_surf_mmio_write);  in init_generic_mmio_info()
2312 	MMIO_DH(REG_50080(PIPE_C, PLANE_SPRITE0), D_ALL, NULL,  in init_generic_mmio_info()
2317 	MMIO_F(PCH_GPIO_BASE, 6 * 4, F_UNALIGN, 0, 0, D_ALL, NULL, NULL);  in init_generic_mmio_info()
2319 	MMIO_F(PCH_DP_AUX_CH_CTL(AUX_CH_B), 6 * 4, 0, 0, 0, D_PRE_SKL, NULL,  in init_generic_mmio_info()
2321 	MMIO_F(PCH_DP_AUX_CH_CTL(AUX_CH_C), 6 * 4, 0, 0, 0, D_PRE_SKL, NULL,  in init_generic_mmio_info()
2323 	MMIO_F(PCH_DP_AUX_CH_CTL(AUX_CH_D), 6 * 4, 0, 0, 0, D_PRE_SKL, NULL,  in init_generic_mmio_info()
2326 	MMIO_DH(PCH_ADPA, D_PRE_SKL, NULL, pch_adpa_mmio_write);  in init_generic_mmio_info()
2328 	MMIO_DH(_MMIO(_PCH_TRANSACONF), D_ALL, NULL, transconf_mmio_write);  in init_generic_mmio_info()
2329 	MMIO_DH(_MMIO(_PCH_TRANSBCONF), D_ALL, NULL, transconf_mmio_write);  in init_generic_mmio_info()
2331 	MMIO_DH(FDI_RX_IIR(PIPE_A), D_ALL, NULL, fdi_rx_iir_mmio_write);  in init_generic_mmio_info()
2332 	MMIO_DH(FDI_RX_IIR(PIPE_B), D_ALL, NULL, fdi_rx_iir_mmio_write);  in init_generic_mmio_info()
2333 	MMIO_DH(FDI_RX_IIR(PIPE_C), D_ALL, NULL, fdi_rx_iir_mmio_write);  in init_generic_mmio_info()
2334 	MMIO_DH(FDI_RX_IMR(PIPE_A), D_ALL, NULL, update_fdi_rx_iir_status);  in init_generic_mmio_info()
2335 	MMIO_DH(FDI_RX_IMR(PIPE_B), D_ALL, NULL, update_fdi_rx_iir_status);  in init_generic_mmio_info()
2336 	MMIO_DH(FDI_RX_IMR(PIPE_C), D_ALL, NULL, update_fdi_rx_iir_status);  in init_generic_mmio_info()
2337 	MMIO_DH(FDI_RX_CTL(PIPE_A), D_ALL, NULL, update_fdi_rx_iir_status);  in init_generic_mmio_info()
2338 	MMIO_DH(FDI_RX_CTL(PIPE_B), D_ALL, NULL, update_fdi_rx_iir_status);  in init_generic_mmio_info()
2339 	MMIO_DH(FDI_RX_CTL(PIPE_C), D_ALL, NULL, update_fdi_rx_iir_status);  in init_generic_mmio_info()
2340 	MMIO_DH(PCH_PP_CONTROL, D_ALL, NULL, pch_pp_control_mmio_write);  in init_generic_mmio_info()
2341 	MMIO_DH(_MMIO(0xe651c), D_ALL, dpy_reg_mmio_read, NULL);  in init_generic_mmio_info()
2342 	MMIO_DH(_MMIO(0xe661c), D_ALL, dpy_reg_mmio_read, NULL);  in init_generic_mmio_info()
2343 	MMIO_DH(_MMIO(0xe671c), D_ALL, dpy_reg_mmio_read, NULL);  in init_generic_mmio_info()
2344 	MMIO_DH(_MMIO(0xe681c), D_ALL, dpy_reg_mmio_read, NULL);  in init_generic_mmio_info()
2345 	MMIO_DH(_MMIO(0xe6c04), D_ALL, dpy_reg_mmio_read, NULL);  in init_generic_mmio_info()
2346 	MMIO_DH(_MMIO(0xe6e1c), D_ALL, dpy_reg_mmio_read, NULL);  in init_generic_mmio_info()
2353 		NULL, NULL);  in init_generic_mmio_info()
2355 	MMIO_DH(LCPLL_CTL, D_ALL, NULL, lcpll_ctl_mmio_write);  in init_generic_mmio_info()
2356 	MMIO_DH(SOUTH_CHICKEN2, D_ALL, NULL, south_chicken2_mmio_write);  in init_generic_mmio_info()
2357 	MMIO_DH(SFUSE_STRAP, D_ALL, NULL, NULL);  in init_generic_mmio_info()
2358 	MMIO_DH(SBI_DATA, D_ALL, sbi_data_mmio_read, NULL);  in init_generic_mmio_info()
2359 	MMIO_DH(SBI_CTL_STAT, D_ALL, NULL, sbi_ctl_mmio_write);  in init_generic_mmio_info()
2361 	MMIO_F(DP_AUX_CH_CTL(AUX_CH_A), 6 * 4, 0, 0, 0, D_ALL, NULL,  in init_generic_mmio_info()
2364 	MMIO_DH(DDI_BUF_CTL(PORT_A), D_ALL, NULL, ddi_buf_ctl_mmio_write);  in init_generic_mmio_info()
2365 	MMIO_DH(DDI_BUF_CTL(PORT_B), D_ALL, NULL, ddi_buf_ctl_mmio_write);  in init_generic_mmio_info()
2366 	MMIO_DH(DDI_BUF_CTL(PORT_C), D_ALL, NULL, ddi_buf_ctl_mmio_write);  in init_generic_mmio_info()
2367 	MMIO_DH(DDI_BUF_CTL(PORT_D), D_ALL, NULL, ddi_buf_ctl_mmio_write);  in init_generic_mmio_info()
2368 	MMIO_DH(DDI_BUF_CTL(PORT_E), D_ALL, NULL, ddi_buf_ctl_mmio_write);  in init_generic_mmio_info()
2370 	MMIO_DH(DP_TP_CTL(PORT_A), D_ALL, NULL, dp_tp_ctl_mmio_write);  in init_generic_mmio_info()
2371 	MMIO_DH(DP_TP_CTL(PORT_B), D_ALL, NULL, dp_tp_ctl_mmio_write);  in init_generic_mmio_info()
2372 	MMIO_DH(DP_TP_CTL(PORT_C), D_ALL, NULL, dp_tp_ctl_mmio_write);  in init_generic_mmio_info()
2373 	MMIO_DH(DP_TP_CTL(PORT_D), D_ALL, NULL, dp_tp_ctl_mmio_write);  in init_generic_mmio_info()
2374 	MMIO_DH(DP_TP_CTL(PORT_E), D_ALL, NULL, dp_tp_ctl_mmio_write);  in init_generic_mmio_info()
2376 	MMIO_DH(DP_TP_STATUS(PORT_A), D_ALL, NULL, dp_tp_status_mmio_write);  in init_generic_mmio_info()
2377 	MMIO_DH(DP_TP_STATUS(PORT_B), D_ALL, NULL, dp_tp_status_mmio_write);  in init_generic_mmio_info()
2378 	MMIO_DH(DP_TP_STATUS(PORT_C), D_ALL, NULL, dp_tp_status_mmio_write);  in init_generic_mmio_info()
2379 	MMIO_DH(DP_TP_STATUS(PORT_D), D_ALL, NULL, dp_tp_status_mmio_write);  in init_generic_mmio_info()
2380 	MMIO_DH(DP_TP_STATUS(PORT_E), D_ALL, NULL, NULL);  in init_generic_mmio_info()
2382 	MMIO_DH(_MMIO(_TRANS_DDI_FUNC_CTL_A), D_ALL, NULL, NULL);  in init_generic_mmio_info()
2383 	MMIO_DH(_MMIO(_TRANS_DDI_FUNC_CTL_B), D_ALL, NULL, NULL);  in init_generic_mmio_info()
2384 	MMIO_DH(_MMIO(_TRANS_DDI_FUNC_CTL_C), D_ALL, NULL, NULL);  in init_generic_mmio_info()
2385 	MMIO_DH(_MMIO(_TRANS_DDI_FUNC_CTL_EDP), D_ALL, NULL, NULL);  in init_generic_mmio_info()
2387 	MMIO_DH(FORCEWAKE, D_ALL, NULL, NULL);  in init_generic_mmio_info()
2388 	MMIO_DFH(GTFIFODBG, D_ALL, F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2389 	MMIO_DFH(GTFIFOCTL, D_ALL, F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2390 	MMIO_DH(FORCEWAKE_MT, D_PRE_SKL, NULL, mul_force_wake_write);  in init_generic_mmio_info()
2391 	MMIO_DH(FORCEWAKE_ACK_HSW, D_BDW, NULL, NULL);  in init_generic_mmio_info()
2392 	MMIO_DH(GEN6_RC_CONTROL, D_ALL, NULL, NULL);  in init_generic_mmio_info()
2393 	MMIO_DH(GEN6_RC_STATE, D_ALL, NULL, NULL);  in init_generic_mmio_info()
2394 	MMIO_DH(HSW_PWR_WELL_CTL1, D_BDW, NULL, power_well_ctl_mmio_write);  in init_generic_mmio_info()
2395 	MMIO_DH(HSW_PWR_WELL_CTL2, D_BDW, NULL, power_well_ctl_mmio_write);  in init_generic_mmio_info()
2396 	MMIO_DH(HSW_PWR_WELL_CTL3, D_BDW, NULL, power_well_ctl_mmio_write);  in init_generic_mmio_info()
2397 	MMIO_DH(HSW_PWR_WELL_CTL4, D_BDW, NULL, power_well_ctl_mmio_write);  in init_generic_mmio_info()
2398 	MMIO_DH(HSW_PWR_WELL_CTL5, D_BDW, NULL, power_well_ctl_mmio_write);  in init_generic_mmio_info()
2399 	MMIO_DH(HSW_PWR_WELL_CTL6, D_BDW, NULL, power_well_ctl_mmio_write);  in init_generic_mmio_info()
2401 	MMIO_DH(GEN6_GDRST, D_ALL, NULL, gdrst_mmio_write);  in init_generic_mmio_info()
2403 	MMIO_DH(CPU_VGACNTRL, D_ALL, NULL, vga_control_mmio_write);  in init_generic_mmio_info()
2405 	MMIO_DH(GEN7_ERR_INT, D_ALL, NULL, NULL);  in init_generic_mmio_info()
2406 	MMIO_DH(GFX_FLSH_CNTL_GEN6, D_ALL, NULL, NULL);  in init_generic_mmio_info()
2408 	MMIO_DH(GEN6_MBCTL, D_ALL, NULL, mbctl_write);  in init_generic_mmio_info()
2409 	MMIO_DFH(GEN7_UCGCTL4, D_ALL, F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2411 	MMIO_DH(FPGA_DBG, D_ALL, NULL, fpga_dbg_mmio_write);  in init_generic_mmio_info()
2412 	MMIO_DFH(_MMIO(0x215c), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2413 	MMIO_DFH(_MMIO(0x2178), D_ALL, F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2414 	MMIO_DFH(_MMIO(0x217c), D_ALL, F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2415 	MMIO_DFH(_MMIO(0x12178), D_ALL, F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2416 	MMIO_DFH(_MMIO(0x1217c), D_ALL, F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2418 	MMIO_F(_MMIO(0x2290), 8, F_CMD_ACCESS, 0, 0, D_BDW_PLUS, NULL, NULL);  in init_generic_mmio_info()
2419 	MMIO_F(_MMIO(0x5200), 32, F_CMD_ACCESS, 0, 0, D_ALL, NULL, NULL);  in init_generic_mmio_info()
2420 	MMIO_F(_MMIO(0x5240), 32, F_CMD_ACCESS, 0, 0, D_ALL, NULL, NULL);  in init_generic_mmio_info()
2421 	MMIO_F(_MMIO(0x5280), 16, F_CMD_ACCESS, 0, 0, D_ALL, NULL, NULL);  in init_generic_mmio_info()
2423 	MMIO_DFH(_MMIO(0x1c17c), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2424 	MMIO_DFH(_MMIO(0x1c178), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2425 	MMIO_DFH(BCS_SWCTRL, D_ALL, F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2427 	MMIO_F(HS_INVOCATION_COUNT, 8, F_CMD_ACCESS, 0, 0, D_ALL, NULL, NULL);  in init_generic_mmio_info()
2428 	MMIO_F(DS_INVOCATION_COUNT, 8, F_CMD_ACCESS, 0, 0, D_ALL, NULL, NULL);  in init_generic_mmio_info()
2429 	MMIO_F(IA_VERTICES_COUNT, 8, F_CMD_ACCESS, 0, 0, D_ALL, NULL, NULL);  in init_generic_mmio_info()
2430 	MMIO_F(IA_PRIMITIVES_COUNT, 8, F_CMD_ACCESS, 0, 0, D_ALL, NULL, NULL);  in init_generic_mmio_info()
2431 	MMIO_F(VS_INVOCATION_COUNT, 8, F_CMD_ACCESS, 0, 0, D_ALL, NULL, NULL);  in init_generic_mmio_info()
2432 	MMIO_F(GS_INVOCATION_COUNT, 8, F_CMD_ACCESS, 0, 0, D_ALL, NULL, NULL);  in init_generic_mmio_info()
2433 	MMIO_F(GS_PRIMITIVES_COUNT, 8, F_CMD_ACCESS, 0, 0, D_ALL, NULL, NULL);  in init_generic_mmio_info()
2434 	MMIO_F(CL_INVOCATION_COUNT, 8, F_CMD_ACCESS, 0, 0, D_ALL, NULL, NULL);  in init_generic_mmio_info()
2435 	MMIO_F(CL_PRIMITIVES_COUNT, 8, F_CMD_ACCESS, 0, 0, D_ALL, NULL, NULL);  in init_generic_mmio_info()
2436 	MMIO_F(PS_INVOCATION_COUNT, 8, F_CMD_ACCESS, 0, 0, D_ALL, NULL, NULL);  in init_generic_mmio_info()
2437 	MMIO_F(PS_DEPTH_COUNT, 8, F_CMD_ACCESS, 0, 0, D_ALL, NULL, NULL);  in init_generic_mmio_info()
2438 	MMIO_DH(_MMIO(0x4260), D_BDW_PLUS, NULL, gvt_reg_tlb_control_handler);  in init_generic_mmio_info()
2439 	MMIO_DH(_MMIO(0x4264), D_BDW_PLUS, NULL, gvt_reg_tlb_control_handler);  in init_generic_mmio_info()
2440 	MMIO_DH(_MMIO(0x4268), D_BDW_PLUS, NULL, gvt_reg_tlb_control_handler);  in init_generic_mmio_info()
2441 	MMIO_DH(_MMIO(0x426c), D_BDW_PLUS, NULL, gvt_reg_tlb_control_handler);  in init_generic_mmio_info()
2442 	MMIO_DH(_MMIO(0x4270), D_BDW_PLUS, NULL, gvt_reg_tlb_control_handler);  in init_generic_mmio_info()
2443 	MMIO_DFH(_MMIO(0x4094), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2445 	MMIO_DFH(ARB_MODE, D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2446 	MMIO_RING_GM(RING_BBADDR, D_ALL, NULL, NULL);  in init_generic_mmio_info()
2447 	MMIO_DFH(_MMIO(0x2220), D_ALL, F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2448 	MMIO_DFH(_MMIO(0x12220), D_ALL, F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2449 	MMIO_DFH(_MMIO(0x22220), D_ALL, F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2450 	MMIO_RING_DFH(RING_SYNC_1, D_ALL, F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2451 	MMIO_RING_DFH(RING_SYNC_0, D_ALL, F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2452 	MMIO_DFH(_MMIO(0x22178), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2453 	MMIO_DFH(_MMIO(0x1a178), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2454 	MMIO_DFH(_MMIO(0x1a17c), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2455 	MMIO_DFH(_MMIO(0x2217c), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);  in init_generic_mmio_info()
2457 	MMIO_DH(EDP_PSR_IMR, D_BDW_PLUS, NULL, edp_psr_imr_iir_write);  in init_generic_mmio_info()
2458 	MMIO_DH(EDP_PSR_IIR, D_BDW_PLUS, NULL, edp_psr_imr_iir_write);  in init_generic_mmio_info()
2459 	MMIO_DH(GUC_STATUS, D_ALL, guc_status_read, NULL);  in init_generic_mmio_info()
2468 	MMIO_DH(GEN8_GT_IMR(0), D_BDW_PLUS, NULL, intel_vgpu_reg_imr_handler);  in init_bdw_mmio_info()
2469 	MMIO_DH(GEN8_GT_IER(0), D_BDW_PLUS, NULL, intel_vgpu_reg_ier_handler);  in init_bdw_mmio_info()
2470 	MMIO_DH(GEN8_GT_IIR(0), D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler);  in init_bdw_mmio_info()
2472 	MMIO_DH(GEN8_GT_IMR(1), D_BDW_PLUS, NULL, intel_vgpu_reg_imr_handler);  in init_bdw_mmio_info()
2473 	MMIO_DH(GEN8_GT_IER(1), D_BDW_PLUS, NULL, intel_vgpu_reg_ier_handler);  in init_bdw_mmio_info()
2474 	MMIO_DH(GEN8_GT_IIR(1), D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler);  in init_bdw_mmio_info()
2476 	MMIO_DH(GEN8_GT_IMR(2), D_BDW_PLUS, NULL, intel_vgpu_reg_imr_handler);  in init_bdw_mmio_info()
2477 	MMIO_DH(GEN8_GT_IER(2), D_BDW_PLUS, NULL, intel_vgpu_reg_ier_handler);  in init_bdw_mmio_info()
2478 	MMIO_DH(GEN8_GT_IIR(2), D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler);  in init_bdw_mmio_info()
2480 	MMIO_DH(GEN8_GT_IMR(3), D_BDW_PLUS, NULL, intel_vgpu_reg_imr_handler);  in init_bdw_mmio_info()
2481 	MMIO_DH(GEN8_GT_IER(3), D_BDW_PLUS, NULL, intel_vgpu_reg_ier_handler);  in init_bdw_mmio_info()
2482 	MMIO_DH(GEN8_GT_IIR(3), D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler);  in init_bdw_mmio_info()
2484 	MMIO_DH(GEN8_DE_PIPE_IMR(PIPE_A), D_BDW_PLUS, NULL,  in init_bdw_mmio_info()
2486 	MMIO_DH(GEN8_DE_PIPE_IER(PIPE_A), D_BDW_PLUS, NULL,  in init_bdw_mmio_info()
2488 	MMIO_DH(GEN8_DE_PIPE_IIR(PIPE_A), D_BDW_PLUS, NULL,  in init_bdw_mmio_info()
2491 	MMIO_DH(GEN8_DE_PIPE_IMR(PIPE_B), D_BDW_PLUS, NULL,  in init_bdw_mmio_info()
2493 	MMIO_DH(GEN8_DE_PIPE_IER(PIPE_B), D_BDW_PLUS, NULL,  in init_bdw_mmio_info()
2495 	MMIO_DH(GEN8_DE_PIPE_IIR(PIPE_B), D_BDW_PLUS, NULL,  in init_bdw_mmio_info()
2498 	MMIO_DH(GEN8_DE_PIPE_IMR(PIPE_C), D_BDW_PLUS, NULL,  in init_bdw_mmio_info()
2500 	MMIO_DH(GEN8_DE_PIPE_IER(PIPE_C), D_BDW_PLUS, NULL,  in init_bdw_mmio_info()
2502 	MMIO_DH(GEN8_DE_PIPE_IIR(PIPE_C), D_BDW_PLUS, NULL,  in init_bdw_mmio_info()
2505 	MMIO_DH(GEN8_DE_PORT_IMR, D_BDW_PLUS, NULL, intel_vgpu_reg_imr_handler);  in init_bdw_mmio_info()
2506 	MMIO_DH(GEN8_DE_PORT_IER, D_BDW_PLUS, NULL, intel_vgpu_reg_ier_handler);  in init_bdw_mmio_info()
2507 	MMIO_DH(GEN8_DE_PORT_IIR, D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler);  in init_bdw_mmio_info()
2509 	MMIO_DH(GEN8_DE_MISC_IMR, D_BDW_PLUS, NULL, intel_vgpu_reg_imr_handler);  in init_bdw_mmio_info()
2510 	MMIO_DH(GEN8_DE_MISC_IER, D_BDW_PLUS, NULL, intel_vgpu_reg_ier_handler);  in init_bdw_mmio_info()
2511 	MMIO_DH(GEN8_DE_MISC_IIR, D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler);  in init_bdw_mmio_info()
2513 	MMIO_DH(GEN8_PCU_IMR, D_BDW_PLUS, NULL, intel_vgpu_reg_imr_handler);  in init_bdw_mmio_info()
2514 	MMIO_DH(GEN8_PCU_IER, D_BDW_PLUS, NULL, intel_vgpu_reg_ier_handler);  in init_bdw_mmio_info()
2515 	MMIO_DH(GEN8_PCU_IIR, D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler);  in init_bdw_mmio_info()
2517 	MMIO_DH(GEN8_MASTER_IRQ, D_BDW_PLUS, NULL,  in init_bdw_mmio_info()
2521 		mmio_read_from_hw, NULL);  in init_bdw_mmio_info()
2525 		~_MASKED_BIT_ENABLE(RESET_CTL_REQUEST_RESET), D_BDW_PLUS, NULL,  in init_bdw_mmio_info()
2530 	MMIO_RING_DFH(RING_REG, D_BDW_PLUS, 0, NULL, elsp_mmio_write);  in init_bdw_mmio_info()
2535 		NULL, NULL);  in init_bdw_mmio_info()
2539 	MMIO_RING_DFH(RING_REG, D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);  in init_bdw_mmio_info()
2543 	MMIO_RING_F(RING_REG, 48, F_RO, 0, ~0, D_BDW_PLUS, NULL, NULL);  in init_bdw_mmio_info()
2547 	MMIO_RING_DFH(RING_REG, D_BDW_PLUS, F_MODE_MASK, NULL, NULL);  in init_bdw_mmio_info()
2550 	MMIO_DH(GEN6_PCODE_MAILBOX, D_BDW_PLUS, NULL, mailbox_write);  in init_bdw_mmio_info()
2553 	MMIO_RING_F(RING_REG, 32, F_CMD_ACCESS, 0, 0, D_BDW_PLUS, NULL, NULL);  in init_bdw_mmio_info()
2556 	MMIO_RING_GM(RING_HWS_PGA, D_BDW_PLUS, NULL, hws_pga_write);  in init_bdw_mmio_info()
2558 	MMIO_DFH(HDC_CHICKEN0, D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);  in init_bdw_mmio_info()
2561 		NULL, NULL);  in init_bdw_mmio_info()
2563 		NULL, NULL);  in init_bdw_mmio_info()
2564 	MMIO_DFH(GEN8_UCGCTL6, D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);  in init_bdw_mmio_info()
2566 	MMIO_DFH(_MMIO(0xb1f0), D_BDW, F_CMD_ACCESS, NULL, NULL);  in init_bdw_mmio_info()
2567 	MMIO_DFH(_MMIO(0xb1c0), D_BDW, F_CMD_ACCESS, NULL, NULL);  in init_bdw_mmio_info()
2568 	MMIO_DFH(GEN8_L3SQCREG4, D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);  in init_bdw_mmio_info()
2569 	MMIO_DFH(_MMIO(0xb100), D_BDW, F_CMD_ACCESS, NULL, NULL);  in init_bdw_mmio_info()
2570 	MMIO_DFH(_MMIO(0xb10c), D_BDW, F_CMD_ACCESS, NULL, NULL);  in init_bdw_mmio_info()
2573 		D_BDW_PLUS, NULL, force_nonpriv_write);  in init_bdw_mmio_info()
2575 	MMIO_DFH(_MMIO(0x83a4), D_BDW, F_CMD_ACCESS, NULL, NULL);  in init_bdw_mmio_info()
2577 	MMIO_DFH(_MMIO(0x8430), D_BDW, F_CMD_ACCESS, NULL, NULL);  in init_bdw_mmio_info()
2579 	MMIO_DFH(_MMIO(0xe194), D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);  in init_bdw_mmio_info()
2580 	MMIO_DFH(_MMIO(0xe188), D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);  in init_bdw_mmio_info()
2581 	MMIO_DFH(HALF_SLICE_CHICKEN2, D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);  in init_bdw_mmio_info()
2582 	MMIO_DFH(_MMIO(0x2580), D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);  in init_bdw_mmio_info()
2584 	MMIO_DFH(_MMIO(0x2248), D_BDW, F_CMD_ACCESS, NULL, NULL);  in init_bdw_mmio_info()
2586 	MMIO_DFH(_MMIO(0xe220), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);  in init_bdw_mmio_info()
2587 	MMIO_DFH(_MMIO(0xe230), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);  in init_bdw_mmio_info()
2588 	MMIO_DFH(_MMIO(0xe240), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);  in init_bdw_mmio_info()
2589 	MMIO_DFH(_MMIO(0xe260), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);  in init_bdw_mmio_info()
2590 	MMIO_DFH(_MMIO(0xe270), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);  in init_bdw_mmio_info()
2591 	MMIO_DFH(_MMIO(0xe280), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);  in init_bdw_mmio_info()
2592 	MMIO_DFH(_MMIO(0xe2a0), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);  in init_bdw_mmio_info()
2593 	MMIO_DFH(_MMIO(0xe2b0), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);  in init_bdw_mmio_info()
2594 	MMIO_DFH(_MMIO(0xe2c0), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);  in init_bdw_mmio_info()
2595 	MMIO_DFH(_MMIO(0x21f0), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);  in init_bdw_mmio_info()
2603 	MMIO_DH(FORCEWAKE_RENDER_GEN9, D_SKL_PLUS, NULL, mul_force_wake_write);  in init_skl_mmio_info()
2604 	MMIO_DH(FORCEWAKE_ACK_RENDER_GEN9, D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2605 	MMIO_DH(FORCEWAKE_GT_GEN9, D_SKL_PLUS, NULL, mul_force_wake_write);  in init_skl_mmio_info()
2606 	MMIO_DH(FORCEWAKE_ACK_GT_GEN9, D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2607 	MMIO_DH(FORCEWAKE_MEDIA_GEN9, D_SKL_PLUS, NULL, mul_force_wake_write);  in init_skl_mmio_info()
2608 	MMIO_DH(FORCEWAKE_ACK_MEDIA_GEN9, D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2610 	MMIO_F(DP_AUX_CH_CTL(AUX_CH_B), 6 * 4, 0, 0, 0, D_SKL_PLUS, NULL,  in init_skl_mmio_info()
2612 	MMIO_F(DP_AUX_CH_CTL(AUX_CH_C), 6 * 4, 0, 0, 0, D_SKL_PLUS, NULL,  in init_skl_mmio_info()
2614 	MMIO_F(DP_AUX_CH_CTL(AUX_CH_D), 6 * 4, 0, 0, 0, D_SKL_PLUS, NULL,  in init_skl_mmio_info()
2617 	MMIO_DH(HSW_PWR_WELL_CTL2, D_SKL_PLUS, NULL, skl_power_well_ctl_write);  in init_skl_mmio_info()
2619 	MMIO_DH(DBUF_CTL_S(0), D_SKL_PLUS, NULL, gen9_dbuf_ctl_mmio_write);  in init_skl_mmio_info()
2621 	MMIO_DFH(GEN9_GAMT_ECO_REG_RW_IA, D_SKL_PLUS, F_CMD_ACCESS, NULL, NULL);  in init_skl_mmio_info()
2622 	MMIO_DFH(MMCD_MISC_CTRL, D_SKL_PLUS, F_CMD_ACCESS, NULL, NULL);  in init_skl_mmio_info()
2623 	MMIO_DH(CHICKEN_PAR1_1, D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2624 	MMIO_DH(LCPLL1_CTL, D_SKL_PLUS, NULL, skl_lcpll_write);  in init_skl_mmio_info()
2625 	MMIO_DH(LCPLL2_CTL, D_SKL_PLUS, NULL, skl_lcpll_write);  in init_skl_mmio_info()
2626 	MMIO_DH(DPLL_STATUS, D_SKL_PLUS, dpll_status_read, NULL);  in init_skl_mmio_info()
2628 	MMIO_DH(SKL_PS_WIN_POS(PIPE_A, 0), D_SKL_PLUS, NULL, pf_write);  in init_skl_mmio_info()
2629 	MMIO_DH(SKL_PS_WIN_POS(PIPE_A, 1), D_SKL_PLUS, NULL, pf_write);  in init_skl_mmio_info()
2630 	MMIO_DH(SKL_PS_WIN_POS(PIPE_B, 0), D_SKL_PLUS, NULL, pf_write);  in init_skl_mmio_info()
2631 	MMIO_DH(SKL_PS_WIN_POS(PIPE_B, 1), D_SKL_PLUS, NULL, pf_write);  in init_skl_mmio_info()
2632 	MMIO_DH(SKL_PS_WIN_POS(PIPE_C, 0), D_SKL_PLUS, NULL, pf_write);  in init_skl_mmio_info()
2633 	MMIO_DH(SKL_PS_WIN_POS(PIPE_C, 1), D_SKL_PLUS, NULL, pf_write);  in init_skl_mmio_info()
2635 	MMIO_DH(SKL_PS_WIN_SZ(PIPE_A, 0), D_SKL_PLUS, NULL, pf_write);  in init_skl_mmio_info()
2636 	MMIO_DH(SKL_PS_WIN_SZ(PIPE_A, 1), D_SKL_PLUS, NULL, pf_write);  in init_skl_mmio_info()
2637 	MMIO_DH(SKL_PS_WIN_SZ(PIPE_B, 0), D_SKL_PLUS, NULL, pf_write);  in init_skl_mmio_info()
2638 	MMIO_DH(SKL_PS_WIN_SZ(PIPE_B, 1), D_SKL_PLUS, NULL, pf_write);  in init_skl_mmio_info()
2639 	MMIO_DH(SKL_PS_WIN_SZ(PIPE_C, 0), D_SKL_PLUS, NULL, pf_write);  in init_skl_mmio_info()
2640 	MMIO_DH(SKL_PS_WIN_SZ(PIPE_C, 1), D_SKL_PLUS, NULL, pf_write);  in init_skl_mmio_info()
2642 	MMIO_DH(SKL_PS_CTRL(PIPE_A, 0), D_SKL_PLUS, NULL, pf_write);  in init_skl_mmio_info()
2643 	MMIO_DH(SKL_PS_CTRL(PIPE_A, 1), D_SKL_PLUS, NULL, pf_write);  in init_skl_mmio_info()
2644 	MMIO_DH(SKL_PS_CTRL(PIPE_B, 0), D_SKL_PLUS, NULL, pf_write);  in init_skl_mmio_info()
2645 	MMIO_DH(SKL_PS_CTRL(PIPE_B, 1), D_SKL_PLUS, NULL, pf_write);  in init_skl_mmio_info()
2646 	MMIO_DH(SKL_PS_CTRL(PIPE_C, 0), D_SKL_PLUS, NULL, pf_write);  in init_skl_mmio_info()
2647 	MMIO_DH(SKL_PS_CTRL(PIPE_C, 1), D_SKL_PLUS, NULL, pf_write);  in init_skl_mmio_info()
2649 	MMIO_DH(PLANE_BUF_CFG(PIPE_A, 0), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2650 	MMIO_DH(PLANE_BUF_CFG(PIPE_A, 1), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2651 	MMIO_DH(PLANE_BUF_CFG(PIPE_A, 2), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2652 	MMIO_DH(PLANE_BUF_CFG(PIPE_A, 3), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2654 	MMIO_DH(PLANE_BUF_CFG(PIPE_B, 0), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2655 	MMIO_DH(PLANE_BUF_CFG(PIPE_B, 1), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2656 	MMIO_DH(PLANE_BUF_CFG(PIPE_B, 2), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2657 	MMIO_DH(PLANE_BUF_CFG(PIPE_B, 3), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2659 	MMIO_DH(PLANE_BUF_CFG(PIPE_C, 0), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2660 	MMIO_DH(PLANE_BUF_CFG(PIPE_C, 1), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2661 	MMIO_DH(PLANE_BUF_CFG(PIPE_C, 2), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2662 	MMIO_DH(PLANE_BUF_CFG(PIPE_C, 3), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2664 	MMIO_DH(CUR_BUF_CFG(PIPE_A), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2665 	MMIO_DH(CUR_BUF_CFG(PIPE_B), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2666 	MMIO_DH(CUR_BUF_CFG(PIPE_C), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2668 	MMIO_DH(PLANE_WM_TRANS(PIPE_A, 0), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2669 	MMIO_DH(PLANE_WM_TRANS(PIPE_A, 1), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2670 	MMIO_DH(PLANE_WM_TRANS(PIPE_A, 2), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2672 	MMIO_DH(PLANE_WM_TRANS(PIPE_B, 0), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2673 	MMIO_DH(PLANE_WM_TRANS(PIPE_B, 1), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2674 	MMIO_DH(PLANE_WM_TRANS(PIPE_B, 2), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2676 	MMIO_DH(PLANE_WM_TRANS(PIPE_C, 0), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2677 	MMIO_DH(PLANE_WM_TRANS(PIPE_C, 1), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2678 	MMIO_DH(PLANE_WM_TRANS(PIPE_C, 2), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2680 	MMIO_DH(CUR_WM_TRANS(PIPE_A), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2681 	MMIO_DH(CUR_WM_TRANS(PIPE_B), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2682 	MMIO_DH(CUR_WM_TRANS(PIPE_C), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2684 	MMIO_DH(PLANE_NV12_BUF_CFG(PIPE_A, 0), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2685 	MMIO_DH(PLANE_NV12_BUF_CFG(PIPE_A, 1), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2686 	MMIO_DH(PLANE_NV12_BUF_CFG(PIPE_A, 2), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2687 	MMIO_DH(PLANE_NV12_BUF_CFG(PIPE_A, 3), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2689 	MMIO_DH(PLANE_NV12_BUF_CFG(PIPE_B, 0), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2690 	MMIO_DH(PLANE_NV12_BUF_CFG(PIPE_B, 1), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2691 	MMIO_DH(PLANE_NV12_BUF_CFG(PIPE_B, 2), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2692 	MMIO_DH(PLANE_NV12_BUF_CFG(PIPE_B, 3), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2694 	MMIO_DH(PLANE_NV12_BUF_CFG(PIPE_C, 0), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2695 	MMIO_DH(PLANE_NV12_BUF_CFG(PIPE_C, 1), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2696 	MMIO_DH(PLANE_NV12_BUF_CFG(PIPE_C, 2), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2697 	MMIO_DH(PLANE_NV12_BUF_CFG(PIPE_C, 3), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2699 	MMIO_DH(PLANE_AUX_DIST(PIPE_A, 0), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2700 	MMIO_DH(PLANE_AUX_DIST(PIPE_A, 1), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2701 	MMIO_DH(PLANE_AUX_DIST(PIPE_A, 2), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2702 	MMIO_DH(PLANE_AUX_DIST(PIPE_A, 3), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2704 	MMIO_DH(PLANE_AUX_DIST(PIPE_B, 0), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2705 	MMIO_DH(PLANE_AUX_DIST(PIPE_B, 1), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2706 	MMIO_DH(PLANE_AUX_DIST(PIPE_B, 2), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2707 	MMIO_DH(PLANE_AUX_DIST(PIPE_B, 3), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2709 	MMIO_DH(PLANE_AUX_DIST(PIPE_C, 0), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2710 	MMIO_DH(PLANE_AUX_DIST(PIPE_C, 1), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2711 	MMIO_DH(PLANE_AUX_DIST(PIPE_C, 2), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2712 	MMIO_DH(PLANE_AUX_DIST(PIPE_C, 3), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2714 	MMIO_DH(PLANE_AUX_OFFSET(PIPE_A, 0), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2715 	MMIO_DH(PLANE_AUX_OFFSET(PIPE_A, 1), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2716 	MMIO_DH(PLANE_AUX_OFFSET(PIPE_A, 2), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2717 	MMIO_DH(PLANE_AUX_OFFSET(PIPE_A, 3), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2719 	MMIO_DH(PLANE_AUX_OFFSET(PIPE_B, 0), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2720 	MMIO_DH(PLANE_AUX_OFFSET(PIPE_B, 1), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2721 	MMIO_DH(PLANE_AUX_OFFSET(PIPE_B, 2), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2722 	MMIO_DH(PLANE_AUX_OFFSET(PIPE_B, 3), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2724 	MMIO_DH(PLANE_AUX_OFFSET(PIPE_C, 0), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2725 	MMIO_DH(PLANE_AUX_OFFSET(PIPE_C, 1), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2726 	MMIO_DH(PLANE_AUX_OFFSET(PIPE_C, 2), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2727 	MMIO_DH(PLANE_AUX_OFFSET(PIPE_C, 3), D_SKL_PLUS, NULL, NULL);  in init_skl_mmio_info()
2729 	MMIO_DFH(BDW_SCRATCH1, D_SKL_PLUS, F_CMD_ACCESS, NULL, NULL);  in init_skl_mmio_info()
2732 		NULL, NULL);  in init_skl_mmio_info()
2734 		NULL, NULL);  in init_skl_mmio_info()
2737 		 F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);  in init_skl_mmio_info()
2739 		NULL, NULL);  in init_skl_mmio_info()
2742 	MMIO_DFH(TRVATTL3PTRDW(0), D_SKL_PLUS, F_CMD_ACCESS, NULL, NULL);  in init_skl_mmio_info()
2743 	MMIO_DFH(TRVATTL3PTRDW(1), D_SKL_PLUS, F_CMD_ACCESS, NULL, NULL);  in init_skl_mmio_info()
2744 	MMIO_DFH(TRVATTL3PTRDW(2), D_SKL_PLUS, F_CMD_ACCESS, NULL, NULL);  in init_skl_mmio_info()
2745 	MMIO_DFH(TRVATTL3PTRDW(3), D_SKL_PLUS, F_CMD_ACCESS, NULL, NULL);  in init_skl_mmio_info()
2746 	MMIO_DFH(TRVADR, D_SKL_PLUS, F_CMD_ACCESS, NULL, NULL);  in init_skl_mmio_info()
2748 		 NULL, gen9_trtte_write);  in init_skl_mmio_info()
2750 		 NULL, gen9_trtt_chicken_write);  in init_skl_mmio_info()
2752 	MMIO_DFH(GEN8_GARBCNTL, D_SKL_PLUS, F_CMD_ACCESS, NULL, NULL);  in init_skl_mmio_info()
2753 	MMIO_DH(DMA_CTRL, D_SKL_PLUS, NULL, dma_ctrl_write);  in init_skl_mmio_info()
2757 		      NULL, csfe_chicken1_mmio_write);  in init_skl_mmio_info()
2760 		 NULL, NULL);  in init_skl_mmio_info()
2762 		 NULL, NULL);  in init_skl_mmio_info()
2764 	MMIO_DFH(GAMT_CHKN_BIT_REG, D_KBL | D_CFL, F_CMD_ACCESS, NULL, NULL);  in init_skl_mmio_info()
2765 	MMIO_DFH(_MMIO(0xe4cc), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);  in init_skl_mmio_info()
2774 	MMIO_DH(BXT_P_CR_GT_DISP_PWRON, D_BXT, NULL, bxt_gt_disp_pwron_write);  in init_bxt_mmio_info()
2776 		NULL, bxt_phy_ctl_family_write);  in init_bxt_mmio_info()
2778 		NULL, bxt_phy_ctl_family_write);  in init_bxt_mmio_info()
2780 		NULL, bxt_port_pll_enable_write);  in init_bxt_mmio_info()
2782 		NULL, bxt_port_pll_enable_write);  in init_bxt_mmio_info()
2783 	MMIO_DH(BXT_PORT_PLL_ENABLE(PORT_C), D_BXT, NULL,  in init_bxt_mmio_info()
2787 		NULL, bxt_pcs_dw12_grp_write);  in init_bxt_mmio_info()
2789 		bxt_port_tx_dw3_read, NULL);  in init_bxt_mmio_info()
2791 		NULL, bxt_pcs_dw12_grp_write);  in init_bxt_mmio_info()
2793 		bxt_port_tx_dw3_read, NULL);  in init_bxt_mmio_info()
2795 		NULL, bxt_pcs_dw12_grp_write);  in init_bxt_mmio_info()
2797 		bxt_port_tx_dw3_read, NULL);  in init_bxt_mmio_info()
2798 	MMIO_DH(BXT_DE_PLL_ENABLE, D_BXT, NULL, bxt_de_pll_enable_write);  in init_bxt_mmio_info()
2799 	MMIO_DFH(GEN8_L3SQCREG1, D_BXT, F_CMD_ACCESS, NULL, NULL);  in init_bxt_mmio_info()
2800 	MMIO_DFH(GEN8_L3CNTLREG, D_BXT, F_CMD_ACCESS, NULL, NULL);  in init_bxt_mmio_info()
2801 	MMIO_DFH(_MMIO(0x20D8), D_BXT, F_CMD_ACCESS, NULL, NULL);  in init_bxt_mmio_info()
2803 	       0, 0, D_BXT, NULL, NULL);  in init_bxt_mmio_info()
2805 	       0, 0, D_BXT, NULL, NULL);  in init_bxt_mmio_info()
2807 	       0, 0, D_BXT, NULL, NULL);  in init_bxt_mmio_info()
2809 	       0, 0, D_BXT, NULL, NULL);  in init_bxt_mmio_info()
2811 	MMIO_DFH(GEN9_CTX_PREEMPT_REG, D_BXT, F_CMD_ACCESS, NULL, NULL);  in init_bxt_mmio_info()
2813 	MMIO_DH(GEN8_PRIVATE_PAT_LO, D_BXT, NULL, bxt_ppat_low_write);  in init_bxt_mmio_info()
2830 	return NULL;  in find_mmio_block()
2851 	gvt->mmio.mmio_block = NULL;  in intel_gvt_clean_mmio_info()
2855 	gvt->mmio.mmio_attribute = NULL;  in intel_gvt_clean_mmio_info()