54 static unsigned char edid_get_byte(struct intel_vgpu *vgpu)  in edid_get_byte()  argument
56 	struct intel_vgpu_i2c_edid *edid = &vgpu->display.i2c_edid;  in edid_get_byte()
73 	if (intel_vgpu_has_monitor_on_port(vgpu, edid->port)) {  in edid_get_byte()
75 			intel_vgpu_port(vgpu, edid->port)->edid;  in edid_get_byte()
131 static void reset_gmbus_controller(struct intel_vgpu *vgpu)  in reset_gmbus_controller()  argument
133 	vgpu_vreg_t(vgpu, PCH_GMBUS2) = GMBUS_HW_RDY;  in reset_gmbus_controller()
134 	if (!vgpu->display.i2c_edid.edid_available)  in reset_gmbus_controller()
135 		vgpu_vreg_t(vgpu, PCH_GMBUS2) |= GMBUS_SATOER;  in reset_gmbus_controller()
136 	vgpu->display.i2c_edid.gmbus.phase = GMBUS_IDLE_PHASE;  in reset_gmbus_controller()
140 static int gmbus0_mmio_write(struct intel_vgpu *vgpu,  in gmbus0_mmio_write()  argument
143 	struct drm_i915_private *i915 = vgpu->gvt->gt->i915;  in gmbus0_mmio_write()
146 	memcpy(&vgpu_vreg(vgpu, offset), p_data, bytes);  in gmbus0_mmio_write()
148 	pin_select = vgpu_vreg(vgpu, offset) & _GMBUS_PIN_SEL_MASK;  in gmbus0_mmio_write()
150 	intel_vgpu_init_i2c_edid(vgpu);  in gmbus0_mmio_write()
164 	vgpu->display.i2c_edid.state = I2C_GMBUS;  in gmbus0_mmio_write()
165 	vgpu->display.i2c_edid.gmbus.phase = GMBUS_IDLE_PHASE;  in gmbus0_mmio_write()
167 	vgpu_vreg_t(vgpu, PCH_GMBUS2) &= ~GMBUS_ACTIVE;  in gmbus0_mmio_write()
168 	vgpu_vreg_t(vgpu, PCH_GMBUS2) |= GMBUS_HW_RDY | GMBUS_HW_WAIT_PHASE;  in gmbus0_mmio_write()
170 	if (intel_vgpu_has_monitor_on_port(vgpu, port) &&  in gmbus0_mmio_write()
171 			!intel_vgpu_port_is_dp(vgpu, port)) {  in gmbus0_mmio_write()
172 		vgpu->display.i2c_edid.port = port;  in gmbus0_mmio_write()
173 		vgpu->display.i2c_edid.edid_available = true;  in gmbus0_mmio_write()
174 		vgpu_vreg_t(vgpu, PCH_GMBUS2) &= ~GMBUS_SATOER;  in gmbus0_mmio_write()
176 		vgpu_vreg_t(vgpu, PCH_GMBUS2) |= GMBUS_SATOER;  in gmbus0_mmio_write()
180 static int gmbus1_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,  in gmbus1_mmio_write()  argument
183 	struct intel_vgpu_i2c_edid *i2c_edid = &vgpu->display.i2c_edid;  in gmbus1_mmio_write()
187 	if (vgpu_vreg(vgpu, offset) & GMBUS_SW_CLR_INT) {  in gmbus1_mmio_write()
189 			vgpu_vreg(vgpu, offset) &= ~GMBUS_SW_CLR_INT;  in gmbus1_mmio_write()
190 			reset_gmbus_controller(vgpu);  in gmbus1_mmio_write()
203 			vgpu_vreg_t(vgpu, PCH_GMBUS2) &= ~GMBUS_INT;  in gmbus1_mmio_write()
204 			vgpu_vreg_t(vgpu, PCH_GMBUS2) |= GMBUS_HW_RDY;  in gmbus1_mmio_write()
217 		/* vgpu gmbus only support EDID */  in gmbus1_mmio_write()
222 				"vgpu%d: unsupported gmbus target addr(0x%x)\n"  in gmbus1_mmio_write()
224 					vgpu->id, target_addr);  in gmbus1_mmio_write()
242 			if (gmbus1_bus_cycle(vgpu_vreg(vgpu, offset))  in gmbus1_mmio_write()
244 				intel_vgpu_init_i2c_edid(vgpu);  in gmbus1_mmio_write()
252 				vgpu_vreg_t(vgpu, PCH_GMBUS2) &= ~GMBUS_ACTIVE;  in gmbus1_mmio_write()
264 			vgpu_vreg_t(vgpu, PCH_GMBUS2) |= GMBUS_ACTIVE;  in gmbus1_mmio_write()
276 		vgpu_vreg(vgpu, offset) = wvalue;  in gmbus1_mmio_write()
281 static int gmbus3_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,  in gmbus3_mmio_write()  argument
284 	struct drm_i915_private *i915 = vgpu->gvt->gt->i915;  in gmbus3_mmio_write()
290 static int gmbus3_mmio_read(struct intel_vgpu *vgpu, unsigned int offset,  in gmbus3_mmio_read()  argument
295 	struct intel_vgpu_i2c_edid *i2c_edid = &vgpu->display.i2c_edid;  in gmbus3_mmio_read()
302 	if (vgpu_vreg_t(vgpu, PCH_GMBUS1) & GMBUS_SLAVE_READ) {  in gmbus3_mmio_read()
304 			memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes);  in gmbus3_mmio_read()
311 			byte_data = edid_get_byte(vgpu);  in gmbus3_mmio_read()
315 		memcpy(&vgpu_vreg(vgpu, offset), &reg_data, byte_count);  in gmbus3_mmio_read()
316 		memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes);  in gmbus3_mmio_read()
330 			intel_vgpu_init_i2c_edid(vgpu);  in gmbus3_mmio_read()
337 		memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes);  in gmbus3_mmio_read()
343 static int gmbus2_mmio_read(struct intel_vgpu *vgpu, unsigned int offset,  in gmbus2_mmio_read()  argument
346 	u32 value = vgpu_vreg(vgpu, offset);  in gmbus2_mmio_read()
348 	if (!(vgpu_vreg(vgpu, offset) & GMBUS_INUSE))  in gmbus2_mmio_read()
349 		vgpu_vreg(vgpu, offset) |= GMBUS_INUSE;  in gmbus2_mmio_read()
354 static int gmbus2_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,  in gmbus2_mmio_write()  argument
360 		vgpu_vreg(vgpu, offset) &= ~GMBUS_INUSE;  in gmbus2_mmio_write()
367  * @vgpu: a vGPU
378 int intel_gvt_i2c_handle_gmbus_read(struct intel_vgpu *vgpu,  in intel_gvt_i2c_handle_gmbus_read()  argument
381 	struct drm_i915_private *i915 = vgpu->gvt->gt->i915;  in intel_gvt_i2c_handle_gmbus_read()
387 		return gmbus2_mmio_read(vgpu, offset, p_data, bytes);  in intel_gvt_i2c_handle_gmbus_read()
389 		return gmbus3_mmio_read(vgpu, offset, p_data, bytes);  in intel_gvt_i2c_handle_gmbus_read()
391 	memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes);  in intel_gvt_i2c_handle_gmbus_read()
397  * @vgpu: a vGPU
408 int intel_gvt_i2c_handle_gmbus_write(struct intel_vgpu *vgpu,  in intel_gvt_i2c_handle_gmbus_write()  argument
411 	struct drm_i915_private *i915 = vgpu->gvt->gt->i915;  in intel_gvt_i2c_handle_gmbus_write()
417 		return gmbus0_mmio_write(vgpu, offset, p_data, bytes);  in intel_gvt_i2c_handle_gmbus_write()
419 		return gmbus1_mmio_write(vgpu, offset, p_data, bytes);  in intel_gvt_i2c_handle_gmbus_write()
421 		return gmbus2_mmio_write(vgpu, offset, p_data, bytes);  in intel_gvt_i2c_handle_gmbus_write()
423 		return gmbus3_mmio_write(vgpu, offset, p_data, bytes);  in intel_gvt_i2c_handle_gmbus_write()
425 	memcpy(&vgpu_vreg(vgpu, offset), p_data, bytes);  in intel_gvt_i2c_handle_gmbus_write()
470  * @vgpu: a vGPU
478 void intel_gvt_i2c_handle_aux_ch_write(struct intel_vgpu *vgpu,  in intel_gvt_i2c_handle_aux_ch_write()  argument
483 	struct drm_i915_private *i915 = vgpu->gvt->gt->i915;  in intel_gvt_i2c_handle_aux_ch_write()
484 	struct intel_vgpu_i2c_edid *i2c_edid = &vgpu->display.i2c_edid;  in intel_gvt_i2c_handle_aux_ch_write()
492 		vgpu_vreg(vgpu, offset) = value;  in intel_gvt_i2c_handle_aux_ch_write()
499 	msg = vgpu_vreg(vgpu, offset + 4);  in intel_gvt_i2c_handle_aux_ch_write()
510 	vgpu_vreg(vgpu, offset) =  in intel_gvt_i2c_handle_aux_ch_write()
517 			intel_vgpu_init_i2c_edid(vgpu);  in intel_gvt_i2c_handle_aux_ch_write()
524 				intel_vgpu_init_i2c_edid(vgpu);  in intel_gvt_i2c_handle_aux_ch_write()
529 				if (intel_vgpu_has_monitor_on_port(vgpu,  in intel_gvt_i2c_handle_aux_ch_write()
531 					intel_vgpu_port_is_dp(vgpu, port_idx))  in intel_gvt_i2c_handle_aux_ch_write()
548 			unsigned char val = edid_get_byte(vgpu);  in intel_gvt_i2c_handle_aux_ch_write()
559 	vgpu_vreg(vgpu, offset + 4) = aux_data_for_write;  in intel_gvt_i2c_handle_aux_ch_write()
563  * intel_vgpu_init_i2c_edid - initialize vGPU i2c edid emulation
564  * @vgpu: a vGPU
566  * This function is used to initialize vGPU i2c edid emulation stuffs
569 void intel_vgpu_init_i2c_edid(struct intel_vgpu *vgpu)  in intel_vgpu_init_i2c_edid()  argument
571 	struct intel_vgpu_i2c_edid *edid = &vgpu->display.i2c_edid;  in intel_vgpu_init_i2c_edid()