91 		u32 val;  in intel_sagv_block_time()  local
97 		u32 val = 0;  in intel_sagv_block_time()  local
373 		int level;  in skl_crtc_can_enable_sagv()  local
737 static unsigned int skl_wm_latency(struct drm_i915_private *i915, int level,  in skl_wm_latency()
768 	int level;  in skl_cursor_allocation()  local
808 	u32 val;  in skl_ddb_get_hw_plane_state()  local
1439 		   int level)  in skl_plane_wm_level()
1491 static bool skl_need_wm_copy_wa(struct drm_i915_private *i915, int level,  in skl_need_wm_copy_wa()
1557 	int level;  in skl_crtc_allocate_plane_ddb()  local
1908 static bool skl_wm_has_lines(struct drm_i915_private *i915, int level)  in skl_wm_has_lines()
1925 static bool xe3_auto_min_alloc_capable(struct intel_plane *plane, int level)  in xe3_auto_min_alloc_capable()
1934 				 int level,  in skl_compute_plane_wm()
2078 	int level;  in skl_compute_wm_levels()  local
2330 	int level;  in skl_max_wm_level_for_vblank()  local
2355 	int wm0_lines, level;  in skl_wm_check_vblank()  local
2453 	int level;  in skl_plane_wm_equals()  local
2811 	int level;  in skl_plane_selected_wm_equals()  local
2925 	u32 clear, val;  in intel_program_dpkgc_latency()  local
3007 				      u32 val, struct skl_wm_level *level)  in skl_wm_level_from_reg_val()
3023 	int level;  in skl_pipe_wm_get_hw_state()  local
3024 	u32 val;  in skl_pipe_wm_get_hw_state()  local
3186 	int i, level;  in adjust_wm_latency()  local
3228 	u32 val;  in mtl_read_wm_latency()  local
3250 	u32 val;  in skl_read_wm_latency()  local
3372 	u32 val = 0;  in pipe_mbus_dbox_ctl()  local
3782 	int level;  in intel_wm_state_verify()  local
3991 	int level;  in skl_watermark_max_latency()  local