Lines Matching +defs:val +defs:latency
91 u32 val; in intel_sagv_block_time() local
97 u32 val = 0; in intel_sagv_block_time() local
740 unsigned int latency = i915->display.wm.skl_latency[level]; in skl_wm_latency() local
778 unsigned int latency = skl_wm_latency(i915, level, &wp); in skl_cursor_allocation() local
808 u32 val; in skl_ddb_get_hw_plane_state() local
1737 u8 cpp, u32 latency, u32 dbuf_block_size) in skl_wm_method1()
1755 skl_wm_method2(u32 pixel_rate, u32 pipe_htotal, u32 latency, in skl_wm_method2()
1935 unsigned int latency, in skl_compute_plane_wm()
2082 unsigned int latency = skl_wm_latency(i915, level, wm_params); in skl_compute_wm_levels() local
2099 unsigned int latency = 0; in tgl_compute_sagv_wm() local
2297 int wm0_lines, int latency) in skl_is_vblank_too_short()
2333 int latency; in skl_max_wm_level_for_vblank() local
2922 u32 latency = LNL_PKG_C_LATENCY_MASK; in intel_program_dpkgc_latency() local
2925 u32 clear, val; in intel_program_dpkgc_latency() local
3007 u32 val, struct skl_wm_level *level) in skl_wm_level_from_reg_val()
3024 u32 val; in skl_pipe_wm_get_hw_state() local
3228 u32 val; in mtl_read_wm_latency() local
3250 u32 val; in skl_read_wm_latency() local
3372 u32 val = 0; in pipe_mbus_dbox_ctl() local
3994 unsigned int latency = skl_wm_latency(i915, level, NULL); in skl_watermark_max_latency() local