Lines Matching +full:pre +full:- +full:scaler
1 // SPDX-License-Identifier: MIT
17 * -0.5. That matches how the hardware calculates the scaling
18 * factors (from top-left of the first pixel to bottom-right
29 * The same behaviour is observed on pre-SKL platforms as well.
31 * Theory behind the formula (note that we ignore sub-pixel
37 * -0.5
46 * -0.5
47 * | -0.375 (initial phase)
56 int phase = -0x8000; in skl_scaler_calc_phase()
60 phase += (sub - 1) * 0x8000 / sub; in skl_scaler_calc_phase()
65 * Hardware initial phase limited to [-0.5:1.5]. in skl_scaler_calc_phase()
69 WARN_ON(phase < -0x8000 || phase > 0x18000); in skl_scaler_calc_phase()
111 &crtc_state->scaler_state; in skl_update_scaler()
112 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in skl_update_scaler()
114 &crtc_state->hw.adjusted_mode; in skl_update_scaler()
115 int pipe_src_w = drm_rect_width(&crtc_state->pipe_src); in skl_update_scaler()
116 int pipe_src_h = drm_rect_height(&crtc_state->pipe_src); in skl_update_scaler()
129 * Scaling/fitting not supported in IF-ID mode in GEN9+ in skl_update_scaler()
131 * Once NV12 is enabled, handle it here while allocating scaler in skl_update_scaler()
134 if (DISPLAY_VER(display) >= 9 && crtc_state->hw.enable && in skl_update_scaler()
135 need_scaler && adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) { in skl_update_scaler()
136 drm_dbg_kms(display->drm, in skl_update_scaler()
137 "Pipe/Plane scaling not supported with IF-ID mode\n"); in skl_update_scaler()
138 return -EINVAL; in skl_update_scaler()
142 * if plane is being disabled or scaler is no more required or force detach in skl_update_scaler()
143 * - free scaler binded to this plane/crtc in skl_update_scaler()
144 * - in order to do this, update crtc->scaler_usage in skl_update_scaler()
146 * Here scaler state in crtc_state is set free so that in skl_update_scaler()
147 * scaler can be assigned to other user. Actual register in skl_update_scaler()
148 * update to free the scaler is done in plane/panel-fit programming. in skl_update_scaler()
149 * For this purpose crtc/plane_state->scaler_id isn't reset here. in skl_update_scaler()
153 scaler_state->scaler_users &= ~(1 << scaler_user); in skl_update_scaler()
154 scaler_state->scalers[*scaler_id].in_use = false; in skl_update_scaler()
156 drm_dbg_kms(display->drm, in skl_update_scaler()
158 "Staged freeing scaler id %d scaler_users = 0x%x\n", in skl_update_scaler()
159 crtc->pipe, scaler_user, *scaler_id, in skl_update_scaler()
160 scaler_state->scaler_users); in skl_update_scaler()
161 *scaler_id = -1; in skl_update_scaler()
168 drm_dbg_kms(display->drm, in skl_update_scaler()
170 return -EINVAL; in skl_update_scaler()
205 drm_dbg_kms(display->drm, in skl_update_scaler()
207 "size is out of scaler range\n", in skl_update_scaler()
208 crtc->pipe, scaler_user, src_w, src_h, in skl_update_scaler()
210 return -EINVAL; in skl_update_scaler()
214 * The pipe scaler does not use all the bits of PIPESRC, at least in skl_update_scaler()
217 * we assume the limits match the scaler destination size limits. in skl_update_scaler()
222 drm_dbg_kms(display->drm, in skl_update_scaler()
224 "is out of scaler range\n", in skl_update_scaler()
225 crtc->pipe, scaler_user, pipe_src_w, pipe_src_h); in skl_update_scaler()
226 return -EINVAL; in skl_update_scaler()
229 /* mark this plane as a scaler user in crtc_state */ in skl_update_scaler()
230 scaler_state->scaler_users |= (1 << scaler_user); in skl_update_scaler()
231 drm_dbg_kms(display->drm, "scaler_user index %u.%u: " in skl_update_scaler()
232 "staged scaling request for %ux%u->%ux%u scaler_users = 0x%x\n", in skl_update_scaler()
233 crtc->pipe, scaler_user, src_w, src_h, dst_w, dst_h, in skl_update_scaler()
234 scaler_state->scaler_users); in skl_update_scaler()
241 const struct drm_display_mode *pipe_mode = &crtc_state->hw.pipe_mode; in skl_update_scaler_crtc()
244 if (crtc_state->pch_pfit.enabled) { in skl_update_scaler_crtc()
245 width = drm_rect_width(&crtc_state->pch_pfit.dst); in skl_update_scaler_crtc()
246 height = drm_rect_height(&crtc_state->pch_pfit.dst); in skl_update_scaler_crtc()
248 width = pipe_mode->crtc_hdisplay; in skl_update_scaler_crtc()
249 height = pipe_mode->crtc_vdisplay; in skl_update_scaler_crtc()
251 return skl_update_scaler(crtc_state, !crtc_state->hw.active, in skl_update_scaler_crtc()
253 &crtc_state->scaler_state.scaler_id, in skl_update_scaler_crtc()
254 drm_rect_width(&crtc_state->pipe_src), in skl_update_scaler_crtc()
255 drm_rect_height(&crtc_state->pipe_src), in skl_update_scaler_crtc()
257 crtc_state->pch_pfit.enabled); in skl_update_scaler_crtc()
261 * skl_update_scaler_plane - Stages update to scaler state for a given plane.
262 * @crtc_state: crtc's scaler state
266 * 0 - scaler_usage updated successfully
267 * error - requested scaling cannot be supported or other error condition
272 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in skl_update_scaler_plane()
273 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in skl_update_scaler_plane()
274 struct drm_framebuffer *fb = plane_state->hw.fb; in skl_update_scaler_plane()
275 bool force_detach = !fb || !plane_state->uapi.visible; in skl_update_scaler_plane()
278 /* Pre-gen11 and SDR planes always need a scaler for planar formats. */ in skl_update_scaler_plane()
279 if (!icl_is_hdr_plane(dev_priv, plane->id) && in skl_update_scaler_plane()
280 fb && intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier)) in skl_update_scaler_plane()
284 drm_plane_index(&plane->base), in skl_update_scaler_plane()
285 &plane_state->scaler_id, in skl_update_scaler_plane()
286 drm_rect_width(&plane_state->uapi.src) >> 16, in skl_update_scaler_plane()
287 drm_rect_height(&plane_state->uapi.src) >> 16, in skl_update_scaler_plane()
288 drm_rect_width(&plane_state->uapi.dst), in skl_update_scaler_plane()
289 drm_rect_height(&plane_state->uapi.dst), in skl_update_scaler_plane()
290 fb ? fb->format : NULL, in skl_update_scaler_plane()
291 fb ? fb->modifier : 0, in skl_update_scaler_plane()
300 for (i = 0; i < crtc->num_scalers; i++) { in intel_allocate_scaler()
301 if (scaler_state->scalers[i].in_use) in intel_allocate_scaler()
304 scaler_state->scalers[i].in_use = true; in intel_allocate_scaler()
309 return -1; in intel_allocate_scaler()
319 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_atomic_setup_scaler()
325 if (drm_WARN(display->drm, *scaler_id < 0, in intel_atomic_setup_scaler()
326 "Cannot find scaler for %s:%d\n", name, idx)) in intel_atomic_setup_scaler()
327 return -EINVAL; in intel_atomic_setup_scaler()
329 /* set scaler mode */ in intel_atomic_setup_scaler()
330 if (plane_state && plane_state->hw.fb && in intel_atomic_setup_scaler()
331 plane_state->hw.fb->format->is_yuv && in intel_atomic_setup_scaler()
332 plane_state->hw.fb->format->num_planes > 1) { in intel_atomic_setup_scaler()
333 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in intel_atomic_setup_scaler()
337 } else if (icl_is_hdr_plane(dev_priv, plane->id)) { in intel_atomic_setup_scaler()
339 * On gen11+'s HDR planes we only use the scaler for in intel_atomic_setup_scaler()
341 * we don't need the scaler to upsample the UV plane. in intel_atomic_setup_scaler()
346 plane_state->planar_linked_plane; in intel_atomic_setup_scaler()
351 mode |= PS_BINDING_Y_PLANE(linked->id); in intel_atomic_setup_scaler()
355 } else if (num_scalers_need == 1 && crtc->num_scalers > 1) { in intel_atomic_setup_scaler()
357 * when only 1 scaler is in use on a pipe with 2 scalers in intel_atomic_setup_scaler()
358 * scaler 0 operates in high quality (HQ) mode. in intel_atomic_setup_scaler()
359 * In this case use scaler 0 to take advantage of HQ mode in intel_atomic_setup_scaler()
361 scaler_state->scalers[*scaler_id].in_use = false; in intel_atomic_setup_scaler()
363 scaler_state->scalers[0].in_use = true; in intel_atomic_setup_scaler()
370 * FIXME: we should also check the scaler factors for pfit, so in intel_atomic_setup_scaler()
373 if (plane_state && plane_state->hw.fb) { in intel_atomic_setup_scaler()
374 const struct drm_framebuffer *fb = plane_state->hw.fb; in intel_atomic_setup_scaler()
375 const struct drm_rect *src = &plane_state->uapi.src; in intel_atomic_setup_scaler()
376 const struct drm_rect *dst = &plane_state->uapi.dst; in intel_atomic_setup_scaler()
383 * as the first scaler, so we don't reject downscaling in intel_atomic_setup_scaler()
390 * scaler supports a vertical scaling factor in intel_atomic_setup_scaler()
394 max_hscale = 0x30000 - 1; in intel_atomic_setup_scaler()
396 max_vscale = 0x30000 - 1; in intel_atomic_setup_scaler()
401 !intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier)) { in intel_atomic_setup_scaler()
402 max_hscale = 0x30000 - 1; in intel_atomic_setup_scaler()
403 max_vscale = 0x30000 - 1; in intel_atomic_setup_scaler()
405 max_hscale = 0x20000 - 1; in intel_atomic_setup_scaler()
406 max_vscale = 0x20000 - 1; in intel_atomic_setup_scaler()
410 * FIXME: We should change the if-else block above to in intel_atomic_setup_scaler()
411 * support HQ vs dynamic scaler properly. in intel_atomic_setup_scaler()
419 drm_dbg_kms(display->drm, in intel_atomic_setup_scaler()
420 "Scaler %d doesn't support required plane scaling\n", in intel_atomic_setup_scaler()
425 return -EINVAL; in intel_atomic_setup_scaler()
429 drm_dbg_kms(display->drm, "Attached scaler id %u.%u to %s:%d\n", in intel_atomic_setup_scaler()
430 crtc->pipe, *scaler_id, name, idx); in intel_atomic_setup_scaler()
431 scaler_state->scalers[*scaler_id].mode = mode; in intel_atomic_setup_scaler()
442 &crtc_state->scaler_state; in setup_crtc_scaler()
445 hweight32(scaler_state->scaler_users), in setup_crtc_scaler()
446 crtc, "CRTC", crtc->base.base.id, in setup_crtc_scaler()
447 NULL, &scaler_state->scaler_id); in setup_crtc_scaler()
458 &crtc_state->scaler_state; in setup_plane_scaler()
461 /* plane on different crtc cannot be a scaler user of this crtc */ in setup_plane_scaler()
462 if (drm_WARN_ON(display->drm, plane->pipe != crtc->pipe)) in setup_plane_scaler()
480 hweight32(scaler_state->scaler_users), in setup_plane_scaler()
481 crtc, "PLANE", plane->base.base.id, in setup_plane_scaler()
482 plane_state, &plane_state->scaler_id); in setup_plane_scaler()
486 * intel_atomic_setup_scalers() - setup scalers for crtc per staged requests
494 * This function takes into account the current scaler(s) in use by any planes
498 * 0 - scalers were setup successfully
499 * error code - otherwise
508 &crtc_state->scaler_state; in intel_atomic_setup_scalers()
512 num_scalers_need = hweight32(scaler_state->scaler_users); in intel_atomic_setup_scalers()
516 * - staged scaler requests are already in scaler_state->scaler_users in intel_atomic_setup_scalers()
517 * - check whether staged scaling requests can be supported in intel_atomic_setup_scalers()
518 * - add planes using scalers that aren't in current transaction in intel_atomic_setup_scalers()
519 * - assign scalers to requested users in intel_atomic_setup_scalers()
520 * - as part of plane commit, scalers will be committed in intel_atomic_setup_scalers()
522 * - as part of crtc_commit, scaler will be either attached or detached in intel_atomic_setup_scalers()
527 if (num_scalers_need > crtc->num_scalers) { in intel_atomic_setup_scalers()
528 drm_dbg_kms(display->drm, in intel_atomic_setup_scalers()
530 num_scalers_need, crtc->num_scalers); in intel_atomic_setup_scalers()
531 return -EINVAL; in intel_atomic_setup_scalers()
535 for (i = 0; i < sizeof(scaler_state->scaler_users) * 8; i++) { in intel_atomic_setup_scalers()
538 /* skip if scaler not required */ in intel_atomic_setup_scalers()
539 if (!(scaler_state->scaler_users & (1 << i))) in intel_atomic_setup_scalers()
548 to_intel_plane(drm_plane_from_index(display->drm, i)); in intel_atomic_setup_scalers()
570 * Theory behind setting nearest-neighbor integer scaling:
574 * represents the coefficient set for a phase (0-16).
576 * +------------+------------------------+------------------------+
578 * +------------+------------------------+------------------------+
580 * +------------+------------------------+------------------------+
582 * +------------+------------------------+------------------------+
584 * +------------+------------------------+------------------------+
586 * +------------+------------------------+------------------------+
588 * +------------+------------------------+------------------------+
590 * +------------+------------------------+------------------------+
592 * +------------+------------------------+------------------------+
594 * +------------+------------------------+------------------------+
596 * +------------+------------------------+------------------------+
598 * +------------+------------------------+------------------------+
600 * To enable nearest-neighbor scaling: program scaler coefficents with
661 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in skl_pfit_enable()
663 &crtc_state->scaler_state; in skl_pfit_enable()
664 const struct drm_rect *dst = &crtc_state->pch_pfit.dst; in skl_pfit_enable()
666 enum pipe pipe = crtc->pipe; in skl_pfit_enable()
669 int x = dst->x1; in skl_pfit_enable()
670 int y = dst->y1; in skl_pfit_enable()
676 if (!crtc_state->pch_pfit.enabled) in skl_pfit_enable()
679 if (drm_WARN_ON(display->drm, in skl_pfit_enable()
680 crtc_state->scaler_state.scaler_id < 0)) in skl_pfit_enable()
684 drm_rect_width(&crtc_state->pipe_src) << 16, in skl_pfit_enable()
685 drm_rect_height(&crtc_state->pipe_src) << 16); in skl_pfit_enable()
693 id = scaler_state->scaler_id; in skl_pfit_enable()
695 ps_ctrl = PS_SCALER_EN | PS_BINDING_PIPE | scaler_state->scalers[id].mode | in skl_pfit_enable()
696 skl_scaler_get_filter_select(crtc_state->hw.scaling_filter, 0); in skl_pfit_enable()
699 crtc_state->hw.scaling_filter); in skl_pfit_enable()
719 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in skl_program_plane_scaler()
720 const struct drm_framebuffer *fb = plane_state->hw.fb; in skl_program_plane_scaler()
721 enum pipe pipe = plane->pipe; in skl_program_plane_scaler()
722 int scaler_id = plane_state->scaler_id; in skl_program_plane_scaler()
723 const struct intel_scaler *scaler = in skl_program_plane_scaler() local
724 &crtc_state->scaler_state.scalers[scaler_id]; in skl_program_plane_scaler()
725 int crtc_x = plane_state->uapi.dst.x1; in skl_program_plane_scaler()
726 int crtc_y = plane_state->uapi.dst.y1; in skl_program_plane_scaler()
727 u32 crtc_w = drm_rect_width(&plane_state->uapi.dst); in skl_program_plane_scaler()
728 u32 crtc_h = drm_rect_height(&plane_state->uapi.dst); in skl_program_plane_scaler()
734 hscale = drm_rect_calc_hscale(&plane_state->uapi.src, in skl_program_plane_scaler()
735 &plane_state->uapi.dst, in skl_program_plane_scaler()
737 vscale = drm_rect_calc_vscale(&plane_state->uapi.src, in skl_program_plane_scaler()
738 &plane_state->uapi.dst, in skl_program_plane_scaler()
741 /* TODO: handle sub-pixel coordinates */ in skl_program_plane_scaler()
742 if (intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier) && in skl_program_plane_scaler()
743 !icl_is_hdr_plane(dev_priv, plane->id)) { in skl_program_plane_scaler()
759 ps_ctrl = PS_SCALER_EN | PS_BINDING_PLANE(plane->id) | scaler->mode | in skl_program_plane_scaler()
760 skl_scaler_get_filter_select(plane_state->hw.scaling_filter, 0); in skl_program_plane_scaler()
763 plane_state->hw.scaling_filter); in skl_program_plane_scaler()
780 intel_de_write_fw(display, SKL_PS_CTRL(crtc->pipe, id), 0); in skl_detach_scaler()
781 intel_de_write_fw(display, SKL_PS_WIN_POS(crtc->pipe, id), 0); in skl_detach_scaler()
782 intel_de_write_fw(display, SKL_PS_WIN_SZ(crtc->pipe, id), 0); in skl_detach_scaler()
790 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in skl_detach_scalers()
792 &crtc_state->scaler_state; in skl_detach_scalers()
796 for (i = 0; i < crtc->num_scalers; i++) { in skl_detach_scalers()
797 if (!scaler_state->scalers[i].in_use) in skl_detach_scalers()
804 struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); in skl_scaler_disable()
807 for (i = 0; i < crtc->num_scalers; i++) in skl_scaler_disable()
814 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in skl_scaler_get_config()
815 struct intel_crtc_scaler_state *scaler_state = &crtc_state->scaler_state; in skl_scaler_get_config()
816 int id = -1; in skl_scaler_get_config()
819 /* find scaler attached to this pipe */ in skl_scaler_get_config()
820 for (i = 0; i < crtc->num_scalers; i++) { in skl_scaler_get_config()
823 ctl = intel_de_read(display, SKL_PS_CTRL(crtc->pipe, i)); in skl_scaler_get_config()
828 crtc_state->pch_pfit.enabled = true; in skl_scaler_get_config()
830 pos = intel_de_read(display, SKL_PS_WIN_POS(crtc->pipe, i)); in skl_scaler_get_config()
831 size = intel_de_read(display, SKL_PS_WIN_SZ(crtc->pipe, i)); in skl_scaler_get_config()
833 drm_rect_init(&crtc_state->pch_pfit.dst, in skl_scaler_get_config()
839 scaler_state->scalers[i].in_use = true; in skl_scaler_get_config()
843 scaler_state->scaler_id = id; in skl_scaler_get_config()
845 scaler_state->scaler_users |= (1 << SKL_CRTC_INDEX); in skl_scaler_get_config()
847 scaler_state->scaler_users &= ~(1 << SKL_CRTC_INDEX); in skl_scaler_get_config()