Lines Matching full:i915
180 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); in intel_tc_cold_requires_aux_pw() local
184 intel_display_power_legacy_aux_domain(i915, dig_port->aux_ch); in intel_tc_cold_requires_aux_pw()
190 struct drm_i915_private *i915 = tc_to_i915(tc); in __tc_cold_block() local
194 return intel_display_power_get(i915, *domain); in __tc_cold_block()
214 struct drm_i915_private *i915 = tc_to_i915(tc); in __tc_cold_unblock() local
216 intel_display_power_put(i915, domain, wakeref); in __tc_cold_unblock()
233 struct drm_i915_private *i915 = tc_to_i915(tc); in assert_display_core_power_enabled() local
235 drm_WARN_ON(&i915->drm, in assert_display_core_power_enabled()
236 !intel_display_power_is_enabled(i915, POWER_DOMAIN_DISPLAY_CORE)); in assert_display_core_power_enabled()
242 struct drm_i915_private *i915 = tc_to_i915(tc); in assert_tc_cold_blocked() local
245 enabled = intel_display_power_is_enabled(i915, in assert_tc_cold_blocked()
247 drm_WARN_ON(&i915->drm, !enabled); in assert_tc_cold_blocked()
261 struct drm_i915_private *i915 = tc_to_i915(tc); in assert_tc_port_power_enabled() local
263 drm_WARN_ON(&i915->drm, in assert_tc_port_power_enabled()
264 !intel_display_power_is_enabled(i915, tc_port_power_domain(tc))); in assert_tc_port_power_enabled()
269 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); in intel_tc_port_get_lane_mask() local
273 lane_mask = intel_de_read(i915, PORT_TX_DFLEXDPSP(tc->phy_fia)); in intel_tc_port_get_lane_mask()
275 drm_WARN_ON(&i915->drm, lane_mask == 0xffffffff); in intel_tc_port_get_lane_mask()
284 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); in intel_tc_port_get_pin_assignment_mask() local
288 pin_mask = intel_de_read(i915, PORT_TX_DFLEXPA1(tc->phy_fia)); in intel_tc_port_get_pin_assignment_mask()
290 drm_WARN_ON(&i915->drm, pin_mask == 0xffffffff); in intel_tc_port_get_pin_assignment_mask()
299 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); in lnl_tc_port_get_max_lane_count() local
304 with_intel_display_power(i915, POWER_DOMAIN_DISPLAY_CORE, wakeref) in lnl_tc_port_get_max_lane_count()
305 val = intel_de_read(i915, TCSS_DDI_STATUS(tc_port)); in lnl_tc_port_get_max_lane_count()
324 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); in mtl_tc_port_get_max_lane_count() local
328 with_intel_display_power(i915, POWER_DOMAIN_DISPLAY_CORE, wakeref) in mtl_tc_port_get_max_lane_count()
345 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); in intel_tc_port_get_max_lane_count() local
349 with_intel_display_power(i915, POWER_DOMAIN_DISPLAY_CORE, wakeref) in intel_tc_port_get_max_lane_count()
371 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); in intel_tc_port_max_lane_count() local
379 if (DISPLAY_VER(i915) >= 20) in intel_tc_port_max_lane_count()
382 if (DISPLAY_VER(i915) >= 14) in intel_tc_port_max_lane_count()
391 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); in intel_tc_port_set_fia_lane_count() local
396 if (DISPLAY_VER(i915) >= 14) in intel_tc_port_set_fia_lane_count()
399 drm_WARN_ON(&i915->drm, in intel_tc_port_set_fia_lane_count()
404 val = intel_de_read(i915, PORT_TX_DFLEXDPMLE1(tc->phy_fia)); in intel_tc_port_set_fia_lane_count()
425 intel_de_write(i915, PORT_TX_DFLEXDPMLE1(tc->phy_fia), val); in intel_tc_port_set_fia_lane_count()
431 struct drm_i915_private *i915 = tc_to_i915(tc); in tc_port_fixup_legacy_flag() local
434 drm_WARN_ON(&i915->drm, tc->mode != TC_PORT_DISCONNECTED); in tc_port_fixup_legacy_flag()
449 drm_dbg_kms(&i915->drm, in tc_port_fixup_legacy_flag()
480 struct drm_i915_private *i915 = tc_to_i915(tc); in icl_tc_phy_cold_off_domain() local
484 return intel_display_power_legacy_aux_domain(i915, dig_port->aux_ch); in icl_tc_phy_cold_off_domain()
491 struct drm_i915_private *i915 = tc_to_i915(tc); in icl_tc_phy_hpd_live_status() local
493 u32 isr_bit = i915->display.hotplug.pch_hpd[dig_port->base.hpd_pin]; in icl_tc_phy_hpd_live_status()
499 with_intel_display_power(i915, tc_phy_cold_off_domain(tc), wakeref) { in icl_tc_phy_hpd_live_status()
500 fia_isr = intel_de_read(i915, PORT_TX_DFLEXDPSP(tc->phy_fia)); in icl_tc_phy_hpd_live_status()
501 pch_isr = intel_de_read(i915, SDEISR); in icl_tc_phy_hpd_live_status()
505 drm_dbg_kms(&i915->drm, in icl_tc_phy_hpd_live_status()
532 struct drm_i915_private *i915 = tc_to_i915(tc); in icl_tc_phy_is_ready() local
537 val = intel_de_read(i915, PORT_TX_DFLEXDPPMS(tc->phy_fia)); in icl_tc_phy_is_ready()
539 drm_dbg_kms(&i915->drm, in icl_tc_phy_is_ready()
551 struct drm_i915_private *i915 = tc_to_i915(tc); in icl_tc_phy_take_ownership() local
556 val = intel_de_read(i915, PORT_TX_DFLEXDPCSSS(tc->phy_fia)); in icl_tc_phy_take_ownership()
558 drm_dbg_kms(&i915->drm, in icl_tc_phy_take_ownership()
569 intel_de_write(i915, PORT_TX_DFLEXDPCSSS(tc->phy_fia), val); in icl_tc_phy_take_ownership()
576 struct drm_i915_private *i915 = tc_to_i915(tc); in icl_tc_phy_is_owned() local
581 val = intel_de_read(i915, PORT_TX_DFLEXDPCSSS(tc->phy_fia)); in icl_tc_phy_is_owned()
583 drm_dbg_kms(&i915->drm, in icl_tc_phy_is_owned()
620 struct drm_i915_private *i915 = tc_to_i915(tc); in tc_phy_verify_legacy_or_dp_alt_mode() local
626 drm_WARN_ON(&i915->drm, max_lanes != 4); in tc_phy_verify_legacy_or_dp_alt_mode()
630 drm_WARN_ON(&i915->drm, tc->mode != TC_PORT_DP_ALT); in tc_phy_verify_legacy_or_dp_alt_mode()
637 drm_dbg_kms(&i915->drm, "Port %s: PHY sudden disconnect\n", in tc_phy_verify_legacy_or_dp_alt_mode()
643 drm_dbg_kms(&i915->drm, in tc_phy_verify_legacy_or_dp_alt_mode()
656 struct drm_i915_private *i915 = tc_to_i915(tc); in icl_tc_phy_connect() local
665 !drm_WARN_ON(&i915->drm, tc->mode == TC_PORT_LEGACY)) { in icl_tc_phy_connect()
666 drm_dbg_kms(&i915->drm, "Port %s: can't take PHY ownership (ready %s)\n", in icl_tc_phy_connect()
733 struct drm_i915_private *i915 = tc_to_i915(tc); in tgl_tc_phy_init() local
737 with_intel_display_power(i915, tc_phy_cold_off_domain(tc), wakeref) in tgl_tc_phy_init()
738 val = intel_de_read(i915, PORT_TX_DFLEXDPSP(FIA1)); in tgl_tc_phy_init()
740 drm_WARN_ON(&i915->drm, val == 0xffffffff); in tgl_tc_phy_init()
763 struct drm_i915_private *i915 = tc_to_i915(tc); in adlp_tc_phy_cold_off_domain() local
767 return intel_display_power_legacy_aux_domain(i915, dig_port->aux_ch); in adlp_tc_phy_cold_off_domain()
774 struct drm_i915_private *i915 = tc_to_i915(tc); in adlp_tc_phy_hpd_live_status() local
777 u32 cpu_isr_bits = i915->display.hotplug.hpd[hpd_pin]; in adlp_tc_phy_hpd_live_status()
778 u32 pch_isr_bit = i915->display.hotplug.pch_hpd[hpd_pin]; in adlp_tc_phy_hpd_live_status()
784 with_intel_display_power(i915, POWER_DOMAIN_DISPLAY_CORE, wakeref) { in adlp_tc_phy_hpd_live_status()
785 cpu_isr = intel_de_read(i915, GEN11_DE_HPD_ISR); in adlp_tc_phy_hpd_live_status()
786 pch_isr = intel_de_read(i915, SDEISR); in adlp_tc_phy_hpd_live_status()
809 struct drm_i915_private *i915 = tc_to_i915(tc); in adlp_tc_phy_is_ready() local
815 val = intel_de_read(i915, TCSS_DDI_STATUS(tc_port)); in adlp_tc_phy_is_ready()
817 drm_dbg_kms(&i915->drm, in adlp_tc_phy_is_ready()
829 struct drm_i915_private *i915 = tc_to_i915(tc); in adlp_tc_phy_take_ownership() local
834 intel_de_rmw(i915, DDI_BUF_CTL(port), DDI_BUF_CTL_TC_PHY_OWNERSHIP, in adlp_tc_phy_take_ownership()
842 struct drm_i915_private *i915 = tc_to_i915(tc); in adlp_tc_phy_is_owned() local
848 val = intel_de_read(i915, DDI_BUF_CTL(port)); in adlp_tc_phy_is_owned()
854 struct drm_i915_private *i915 = tc_to_i915(tc); in adlp_tc_phy_get_hw_state() local
859 port_wakeref = intel_display_power_get(i915, port_power_domain); in adlp_tc_phy_get_hw_state()
865 intel_display_power_put(i915, port_power_domain, port_wakeref); in adlp_tc_phy_get_hw_state()
870 struct drm_i915_private *i915 = tc_to_i915(tc); in adlp_tc_phy_connect() local
880 port_wakeref = intel_display_power_get(i915, port_power_domain); in adlp_tc_phy_connect()
883 !drm_WARN_ON(&i915->drm, tc->mode == TC_PORT_LEGACY)) { in adlp_tc_phy_connect()
884 drm_dbg_kms(&i915->drm, "Port %s: can't take PHY ownership\n", in adlp_tc_phy_connect()
890 !drm_WARN_ON(&i915->drm, tc->mode == TC_PORT_LEGACY)) { in adlp_tc_phy_connect()
891 drm_dbg_kms(&i915->drm, "Port %s: PHY not ready\n", in adlp_tc_phy_connect()
901 intel_display_power_put(i915, port_power_domain, port_wakeref); in adlp_tc_phy_connect()
910 intel_display_power_put(i915, port_power_domain, port_wakeref); in adlp_tc_phy_connect()
917 struct drm_i915_private *i915 = tc_to_i915(tc); in adlp_tc_phy_disconnect() local
922 port_wakeref = intel_display_power_get(i915, port_power_domain); in adlp_tc_phy_disconnect()
937 intel_display_power_put(i915, port_power_domain, port_wakeref); in adlp_tc_phy_disconnect()
962 struct drm_i915_private *i915 = tc_to_i915(tc); in xelpdp_tc_phy_hpd_live_status() local
965 u32 pica_isr_bits = i915->display.hotplug.hpd[hpd_pin]; in xelpdp_tc_phy_hpd_live_status()
966 u32 pch_isr_bit = i915->display.hotplug.pch_hpd[hpd_pin]; in xelpdp_tc_phy_hpd_live_status()
972 with_intel_display_power(i915, POWER_DOMAIN_DISPLAY_CORE, wakeref) { in xelpdp_tc_phy_hpd_live_status()
973 pica_isr = intel_de_read(i915, PICAINTERRUPT_ISR); in xelpdp_tc_phy_hpd_live_status()
974 pch_isr = intel_de_read(i915, SDEISR); in xelpdp_tc_phy_hpd_live_status()
991 struct drm_i915_private *i915 = tc_to_i915(tc); in xelpdp_tc_phy_tcss_power_is_enabled() local
993 i915_reg_t reg = XELPDP_PORT_BUF_CTL1(i915, port); in xelpdp_tc_phy_tcss_power_is_enabled()
997 return intel_de_read(i915, reg) & XELPDP_TCSS_POWER_STATE; in xelpdp_tc_phy_tcss_power_is_enabled()
1003 struct drm_i915_private *i915 = tc_to_i915(tc); in xelpdp_tc_phy_wait_for_tcss_power() local
1006 drm_dbg_kms(&i915->drm, in xelpdp_tc_phy_wait_for_tcss_power()
1066 struct drm_i915_private *i915 = tc_to_i915(tc); in xelpdp_tc_phy_enable_tcss_power() local
1079 if (drm_WARN_ON(&i915->drm, tc->mode == TC_PORT_LEGACY)) in xelpdp_tc_phy_enable_tcss_power()
1093 struct drm_i915_private *i915 = tc_to_i915(tc); in xelpdp_tc_phy_take_ownership() local
1095 i915_reg_t reg = XELPDP_PORT_BUF_CTL1(i915, port); in xelpdp_tc_phy_take_ownership()
1100 val = intel_de_read(i915, reg); in xelpdp_tc_phy_take_ownership()
1105 intel_de_write(i915, reg, val); in xelpdp_tc_phy_take_ownership()
1110 struct drm_i915_private *i915 = tc_to_i915(tc); in xelpdp_tc_phy_is_owned() local
1112 i915_reg_t reg = XELPDP_PORT_BUF_CTL1(i915, port); in xelpdp_tc_phy_is_owned()
1116 return intel_de_read(i915, reg) & XELPDP_TC_PHY_OWNERSHIP; in xelpdp_tc_phy_is_owned()
1121 struct drm_i915_private *i915 = tc_to_i915(tc); in xelpdp_tc_phy_get_hw_state() local
1131 drm_WARN_ON(&i915->drm, in xelpdp_tc_phy_get_hw_state()
1204 struct drm_i915_private *i915 = tc_to_i915(tc); in tc_phy_hpd_live_status() local
1210 drm_WARN_ON_ONCE(&i915->drm, hweight32(mask) > 1); in tc_phy_hpd_live_status()
1233 struct drm_i915_private *i915 = tc_to_i915(tc); in tc_phy_is_ready_and_owned() local
1235 drm_WARN_ON(&i915->drm, phy_is_owned && !phy_is_ready); in tc_phy_is_ready_and_owned()
1244 struct drm_i915_private *i915 = to_i915(encoder->base.dev); in tc_phy_is_connected() local
1254 drm_dbg_kms(&i915->drm, in tc_phy_is_connected()
1267 struct drm_i915_private *i915 = tc_to_i915(tc); in tc_phy_wait_for_ready() local
1270 drm_err(&i915->drm, "Port %s: timeout waiting for PHY ready\n", in tc_phy_wait_for_ready()
1340 struct drm_i915_private *i915 = tc_to_i915(tc); in tc_phy_get_current_mode() local
1360 drm_WARN_ON(&i915->drm, live_mode == TC_PORT_TBT_ALT); in tc_phy_get_current_mode()
1364 drm_dbg_kms(&i915->drm, in tc_phy_get_current_mode()
1404 struct drm_i915_private *i915 = tc_to_i915(tc); in tc_phy_connect() local
1418 drm_WARN_ON(&i915->drm, !connected); in tc_phy_connect()
1439 struct drm_i915_private *i915 = tc_to_i915(tc); in intel_tc_port_reset_mode() local
1443 intel_display_power_flush_work(i915); in intel_tc_port_reset_mode()
1449 aux_powered = intel_display_power_is_enabled(i915, aux_domain); in intel_tc_port_reset_mode()
1450 drm_WARN_ON(&i915->drm, aux_powered); in intel_tc_port_reset_mode()
1457 drm_dbg_kms(&i915->drm, "Port %s: TC port mode reset (%s -> %s)\n", in intel_tc_port_reset_mode()
1488 struct drm_i915_private *i915 = tc_to_i915(tc); in tc_port_is_enabled() local
1493 return intel_de_read(i915, DDI_BUF_CTL(dig_port->base.port)) & in tc_port_is_enabled()
1506 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); in intel_tc_port_init_mode() local
1512 drm_WARN_ON(&i915->drm, tc->mode != TC_PORT_DISCONNECTED); in intel_tc_port_init_mode()
1513 drm_WARN_ON(&i915->drm, tc->lock_wakeref); in intel_tc_port_init_mode()
1514 drm_WARN_ON(&i915->drm, tc->link_refcount); in intel_tc_port_init_mode()
1537 drm_WARN_ON(&i915->drm, !tc->legacy_port); in intel_tc_port_init_mode()
1538 drm_err(&i915->drm, in intel_tc_port_init_mode()
1556 struct drm_i915_private *i915 = tc_to_i915(tc); in tc_port_has_active_links() local
1570 drm_err(&i915->drm, in tc_port_has_active_links()
1592 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); in intel_tc_port_sanitize_mode() local
1597 drm_WARN_ON(&i915->drm, tc->link_refcount != 1); in intel_tc_port_sanitize_mode()
1607 drm_dbg_kms(&i915->drm, in intel_tc_port_sanitize_mode()
1615 drm_dbg_kms(&i915->drm, "Port %s: sanitize mode (%s)\n", in intel_tc_port_sanitize_mode()
1635 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); in intel_tc_port_connected() local
1639 drm_WARN_ON(&i915->drm, !intel_tc_port_ref_held(dig_port)); in intel_tc_port_connected()
1674 struct drm_i915_private *i915 = tc_to_i915(tc); in reset_link_commit() local
1681 ret = drm_modeset_lock(&i915->drm.mode_config.connection_mutex, ctx); in reset_link_commit()
1692 for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, pipe_mask) { in reset_link_commit()
1710 struct drm_i915_private *i915 = tc_to_i915(tc); in reset_link() local
1716 _state = drm_atomic_state_alloc(&i915->drm); in reset_link()
1735 struct drm_i915_private *i915 = tc_to_i915(tc); in intel_tc_port_link_reset_work() local
1741 mutex_lock(&i915->drm.mode_config.mutex); in intel_tc_port_link_reset_work()
1743 drm_dbg_kms(&i915->drm, in intel_tc_port_link_reset_work()
1747 drm_WARN_ON(&i915->drm, ret); in intel_tc_port_link_reset_work()
1749 mutex_unlock(&i915->drm.mode_config.mutex); in intel_tc_port_link_reset_work()
1777 struct drm_i915_private *i915 = tc_to_i915(tc); in __intel_tc_port_lock() local
1787 drm_WARN_ON(&i915->drm, tc->mode == TC_PORT_DISCONNECTED); in __intel_tc_port_lock()
1788 drm_WARN_ON(&i915->drm, tc->mode != TC_PORT_TBT_ALT && in __intel_tc_port_lock()
1882 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); in intel_tc_port_init() local
1887 if (drm_WARN_ON(&i915->drm, tc_port == TC_PORT_NONE)) in intel_tc_port_init()
1897 if (DISPLAY_VER(i915) >= 14) in intel_tc_port_init()
1899 else if (DISPLAY_VER(i915) >= 13) in intel_tc_port_init()
1901 else if (DISPLAY_VER(i915) >= 12) in intel_tc_port_init()