Lines Matching +full:4 +full:- +full:temp
1 // SPDX-License-Identifier: MIT
30 struct intel_display *display = &dev_priv->display; in assert_fdi_tx()
38 * so pipe->transcoder cast is fine here. in assert_fdi_tx()
64 struct intel_display *display = &dev_priv->display; in assert_fdi_rx()
86 struct intel_display *display = &i915->display; in assert_fdi_tx_pll_enabled()
105 struct intel_display *display = &i915->display; in assert_fdi_rx_pll()
127 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_fdi_link_train()
129 dev_priv->display.funcs.fdi->fdi_link_train(crtc, crtc_state); in intel_fdi_link_train()
133 * intel_fdi_add_affected_crtcs - add CRTCs on FDI affected by other modeset CRTCs
146 struct drm_i915_private *i915 = to_i915(state->base.dev); in intel_fdi_add_affected_crtcs()
163 if (!old_crtc_state->fdi_lanes) in intel_fdi_add_affected_crtcs()
167 new_crtc_state = intel_atomic_get_crtc_state(&state->base, crtc); in intel_fdi_add_affected_crtcs()
172 if (!old_crtc_state->fdi_lanes) in intel_fdi_add_affected_crtcs()
183 if (crtc_state->hw.enable && crtc_state->has_pch_encoder) in pipe_required_fdi_lanes()
184 return crtc_state->fdi_lanes; in pipe_required_fdi_lanes()
195 struct drm_atomic_state *state = pipe_config->uapi.state; in ilk_check_fdi_lanes()
201 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
203 pipe_name(pipe), pipe_config->fdi_lanes); in ilk_check_fdi_lanes()
204 if (pipe_config->fdi_lanes > 4) { in ilk_check_fdi_lanes()
205 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
207 pipe_name(pipe), pipe_config->fdi_lanes); in ilk_check_fdi_lanes()
208 return -EINVAL; in ilk_check_fdi_lanes()
212 if (pipe_config->fdi_lanes > 2) { in ilk_check_fdi_lanes()
213 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
215 pipe_config->fdi_lanes); in ilk_check_fdi_lanes()
216 return -EINVAL; in ilk_check_fdi_lanes()
230 if (pipe_config->fdi_lanes <= 2) in ilk_check_fdi_lanes()
240 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
242 pipe_name(pipe), pipe_config->fdi_lanes); in ilk_check_fdi_lanes()
243 return -EINVAL; in ilk_check_fdi_lanes()
247 if (pipe_config->fdi_lanes > 2) { in ilk_check_fdi_lanes()
248 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
250 pipe_name(pipe), pipe_config->fdi_lanes); in ilk_check_fdi_lanes()
251 return -EINVAL; in ilk_check_fdi_lanes()
261 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
266 return -EINVAL; in ilk_check_fdi_lanes()
281 i915->display.fdi.pll_freq = (fdi_pll_clk + 2) * 10000; in intel_fdi_pll_freq_update()
283 i915->display.fdi.pll_freq = 270000; in intel_fdi_pll_freq_update()
288 drm_dbg(&i915->drm, "FDI PLL freq=%d\n", i915->display.fdi.pll_freq); in intel_fdi_pll_freq_update()
295 return pipe_config->port_clock; /* SPLL */ in intel_fdi_link_freq()
297 return i915->display.fdi.pll_freq; in intel_fdi_link_freq()
301 * intel_fdi_compute_pipe_bpp - compute pipe bpp limited by max link bpp
306 * link bpp will always match the pipe bpp. This is the case for all non-DP
315 int pipe_bpp = min(crtc_state->pipe_bpp, in intel_fdi_compute_pipe_bpp()
316 fxp_q4_to_int(crtc_state->max_link_bpp_x16)); in intel_fdi_compute_pipe_bpp()
323 crtc_state->pipe_bpp = pipe_bpp; in intel_fdi_compute_pipe_bpp()
331 struct drm_device *dev = crtc->base.dev; in ilk_fdi_compute_config()
333 const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; in ilk_fdi_compute_config()
345 fdi_dotclock = adjusted_mode->crtc_clock; in ilk_fdi_compute_config()
348 pipe_config->pipe_bpp); in ilk_fdi_compute_config()
350 pipe_config->fdi_lanes = lane; in ilk_fdi_compute_config()
352 intel_link_compute_m_n(fxp_q4_from_int(pipe_config->pipe_bpp), in ilk_fdi_compute_config()
356 &pipe_config->fdi_m_n); in ilk_fdi_compute_config()
366 struct drm_i915_private *i915 = to_i915(crtc->base.dev); in intel_fdi_atomic_check_bw()
370 ret = ilk_check_fdi_lanes(&i915->drm, crtc->pipe, pipe_config, in intel_fdi_atomic_check_bw()
372 if (ret != -EINVAL) in intel_fdi_atomic_check_bw()
379 return ret ? : -EAGAIN; in intel_fdi_atomic_check_bw()
383 * intel_fdi_atomic_check_link - check all modeset FDI link configuration
393 * - 0 if the confugration is valid
394 * - %-EAGAIN, if the configuration is invalid and @limits got updated
397 * - Other negative error, if the configuration is invalid without a
410 if (!crtc_state->has_pch_encoder || in intel_fdi_atomic_check_link()
412 !crtc_state->hw.enable) in intel_fdi_atomic_check_link()
425 u32 temp; in cpt_set_fdi_bc_bifurcation() local
427 temp = intel_de_read(dev_priv, SOUTH_CHICKEN1); in cpt_set_fdi_bc_bifurcation()
428 if (!!(temp & FDI_BC_BIFURCATION_SELECT) == enable) in cpt_set_fdi_bc_bifurcation()
431 drm_WARN_ON(&dev_priv->drm, in cpt_set_fdi_bc_bifurcation()
434 drm_WARN_ON(&dev_priv->drm, in cpt_set_fdi_bc_bifurcation()
438 temp &= ~FDI_BC_BIFURCATION_SELECT; in cpt_set_fdi_bc_bifurcation()
440 temp |= FDI_BC_BIFURCATION_SELECT; in cpt_set_fdi_bc_bifurcation()
442 drm_dbg_kms(&dev_priv->drm, "%sabling fdi C rx\n", in cpt_set_fdi_bc_bifurcation()
444 intel_de_write(dev_priv, SOUTH_CHICKEN1, temp); in cpt_set_fdi_bc_bifurcation()
450 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in ivb_update_fdi_bc_bifurcation()
451 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in ivb_update_fdi_bc_bifurcation()
453 switch (crtc->pipe) { in ivb_update_fdi_bc_bifurcation()
457 if (crtc_state->fdi_lanes > 2) in ivb_update_fdi_bc_bifurcation()
468 MISSING_CASE(crtc->pipe); in ivb_update_fdi_bc_bifurcation()
474 struct drm_device *dev = crtc->base.dev; in intel_fdi_normal_train()
476 enum pipe pipe = crtc->pipe; in intel_fdi_normal_train()
478 u32 temp; in intel_fdi_normal_train() local
482 temp = intel_de_read(dev_priv, reg); in intel_fdi_normal_train()
484 temp &= ~FDI_LINK_TRAIN_NONE_IVB; in intel_fdi_normal_train()
485 temp |= FDI_LINK_TRAIN_NONE_IVB | FDI_TX_ENHANCE_FRAME_ENABLE; in intel_fdi_normal_train()
487 temp &= ~FDI_LINK_TRAIN_NONE; in intel_fdi_normal_train()
488 temp |= FDI_LINK_TRAIN_NONE | FDI_TX_ENHANCE_FRAME_ENABLE; in intel_fdi_normal_train()
490 intel_de_write(dev_priv, reg, temp); in intel_fdi_normal_train()
493 temp = intel_de_read(dev_priv, reg); in intel_fdi_normal_train()
495 temp &= ~FDI_LINK_TRAIN_PATTERN_MASK_CPT; in intel_fdi_normal_train()
496 temp |= FDI_LINK_TRAIN_NORMAL_CPT; in intel_fdi_normal_train()
498 temp &= ~FDI_LINK_TRAIN_NONE; in intel_fdi_normal_train()
499 temp |= FDI_LINK_TRAIN_NONE; in intel_fdi_normal_train()
501 intel_de_write(dev_priv, reg, temp | FDI_RX_ENHANCE_FRAME_ENABLE); in intel_fdi_normal_train()
516 struct drm_device *dev = crtc->base.dev; in ilk_fdi_link_train()
518 enum pipe pipe = crtc->pipe; in ilk_fdi_link_train()
520 u32 temp, tries; in ilk_fdi_link_train() local
530 assert_transcoder_enabled(dev_priv, crtc_state->cpu_transcoder); in ilk_fdi_link_train()
535 temp = intel_de_read(dev_priv, reg); in ilk_fdi_link_train()
536 temp &= ~FDI_RX_SYMBOL_LOCK; in ilk_fdi_link_train()
537 temp &= ~FDI_RX_BIT_LOCK; in ilk_fdi_link_train()
538 intel_de_write(dev_priv, reg, temp); in ilk_fdi_link_train()
544 temp = intel_de_read(dev_priv, reg); in ilk_fdi_link_train()
545 temp &= ~FDI_DP_PORT_WIDTH_MASK; in ilk_fdi_link_train()
546 temp |= FDI_DP_PORT_WIDTH(crtc_state->fdi_lanes); in ilk_fdi_link_train()
547 temp &= ~FDI_LINK_TRAIN_NONE; in ilk_fdi_link_train()
548 temp |= FDI_LINK_TRAIN_PATTERN_1; in ilk_fdi_link_train()
549 intel_de_write(dev_priv, reg, temp | FDI_TX_ENABLE); in ilk_fdi_link_train()
552 temp = intel_de_read(dev_priv, reg); in ilk_fdi_link_train()
553 temp &= ~FDI_LINK_TRAIN_NONE; in ilk_fdi_link_train()
554 temp |= FDI_LINK_TRAIN_PATTERN_1; in ilk_fdi_link_train()
555 intel_de_write(dev_priv, reg, temp | FDI_RX_ENABLE); in ilk_fdi_link_train()
568 temp = intel_de_read(dev_priv, reg); in ilk_fdi_link_train()
569 drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp); in ilk_fdi_link_train()
571 if ((temp & FDI_RX_BIT_LOCK)) { in ilk_fdi_link_train()
572 drm_dbg_kms(&dev_priv->drm, "FDI train 1 done.\n"); in ilk_fdi_link_train()
573 intel_de_write(dev_priv, reg, temp | FDI_RX_BIT_LOCK); in ilk_fdi_link_train()
578 drm_err(&dev_priv->drm, "FDI train 1 fail!\n"); in ilk_fdi_link_train()
590 temp = intel_de_read(dev_priv, reg); in ilk_fdi_link_train()
591 drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp); in ilk_fdi_link_train()
593 if (temp & FDI_RX_SYMBOL_LOCK) { in ilk_fdi_link_train()
595 temp | FDI_RX_SYMBOL_LOCK); in ilk_fdi_link_train()
596 drm_dbg_kms(&dev_priv->drm, "FDI train 2 done.\n"); in ilk_fdi_link_train()
601 drm_err(&dev_priv->drm, "FDI train 2 fail!\n"); in ilk_fdi_link_train()
603 drm_dbg_kms(&dev_priv->drm, "FDI train done\n"); in ilk_fdi_link_train()
618 struct drm_device *dev = crtc->base.dev; in gen6_fdi_link_train()
620 enum pipe pipe = crtc->pipe; in gen6_fdi_link_train()
622 u32 temp, i, retry; in gen6_fdi_link_train() local
634 temp = intel_de_read(dev_priv, reg); in gen6_fdi_link_train()
635 temp &= ~FDI_RX_SYMBOL_LOCK; in gen6_fdi_link_train()
636 temp &= ~FDI_RX_BIT_LOCK; in gen6_fdi_link_train()
637 intel_de_write(dev_priv, reg, temp); in gen6_fdi_link_train()
644 temp = intel_de_read(dev_priv, reg); in gen6_fdi_link_train()
645 temp &= ~FDI_DP_PORT_WIDTH_MASK; in gen6_fdi_link_train()
646 temp |= FDI_DP_PORT_WIDTH(crtc_state->fdi_lanes); in gen6_fdi_link_train()
647 temp &= ~FDI_LINK_TRAIN_NONE; in gen6_fdi_link_train()
648 temp |= FDI_LINK_TRAIN_PATTERN_1; in gen6_fdi_link_train()
649 temp &= ~FDI_LINK_TRAIN_VOL_EMP_MASK; in gen6_fdi_link_train()
650 /* SNB-B */ in gen6_fdi_link_train()
651 temp |= FDI_LINK_TRAIN_400MV_0DB_SNB_B; in gen6_fdi_link_train()
652 intel_de_write(dev_priv, reg, temp | FDI_TX_ENABLE); in gen6_fdi_link_train()
658 temp = intel_de_read(dev_priv, reg); in gen6_fdi_link_train()
660 temp &= ~FDI_LINK_TRAIN_PATTERN_MASK_CPT; in gen6_fdi_link_train()
661 temp |= FDI_LINK_TRAIN_PATTERN_1_CPT; in gen6_fdi_link_train()
663 temp &= ~FDI_LINK_TRAIN_NONE; in gen6_fdi_link_train()
664 temp |= FDI_LINK_TRAIN_PATTERN_1; in gen6_fdi_link_train()
666 intel_de_write(dev_priv, reg, temp | FDI_RX_ENABLE); in gen6_fdi_link_train()
671 for (i = 0; i < 4; i++) { in gen6_fdi_link_train()
679 temp = intel_de_read(dev_priv, reg); in gen6_fdi_link_train()
680 drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp); in gen6_fdi_link_train()
681 if (temp & FDI_RX_BIT_LOCK) { in gen6_fdi_link_train()
683 temp | FDI_RX_BIT_LOCK); in gen6_fdi_link_train()
684 drm_dbg_kms(&dev_priv->drm, in gen6_fdi_link_train()
693 if (i == 4) in gen6_fdi_link_train()
694 drm_err(&dev_priv->drm, "FDI train 1 fail!\n"); in gen6_fdi_link_train()
698 temp = intel_de_read(dev_priv, reg); in gen6_fdi_link_train()
699 temp &= ~FDI_LINK_TRAIN_NONE; in gen6_fdi_link_train()
700 temp |= FDI_LINK_TRAIN_PATTERN_2; in gen6_fdi_link_train()
702 temp &= ~FDI_LINK_TRAIN_VOL_EMP_MASK; in gen6_fdi_link_train()
703 /* SNB-B */ in gen6_fdi_link_train()
704 temp |= FDI_LINK_TRAIN_400MV_0DB_SNB_B; in gen6_fdi_link_train()
706 intel_de_write(dev_priv, reg, temp); in gen6_fdi_link_train()
709 temp = intel_de_read(dev_priv, reg); in gen6_fdi_link_train()
711 temp &= ~FDI_LINK_TRAIN_PATTERN_MASK_CPT; in gen6_fdi_link_train()
712 temp |= FDI_LINK_TRAIN_PATTERN_2_CPT; in gen6_fdi_link_train()
714 temp &= ~FDI_LINK_TRAIN_NONE; in gen6_fdi_link_train()
715 temp |= FDI_LINK_TRAIN_PATTERN_2; in gen6_fdi_link_train()
717 intel_de_write(dev_priv, reg, temp); in gen6_fdi_link_train()
722 for (i = 0; i < 4; i++) { in gen6_fdi_link_train()
730 temp = intel_de_read(dev_priv, reg); in gen6_fdi_link_train()
731 drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp); in gen6_fdi_link_train()
732 if (temp & FDI_RX_SYMBOL_LOCK) { in gen6_fdi_link_train()
734 temp | FDI_RX_SYMBOL_LOCK); in gen6_fdi_link_train()
735 drm_dbg_kms(&dev_priv->drm, in gen6_fdi_link_train()
744 if (i == 4) in gen6_fdi_link_train()
745 drm_err(&dev_priv->drm, "FDI train 2 fail!\n"); in gen6_fdi_link_train()
747 drm_dbg_kms(&dev_priv->drm, "FDI train done.\n"); in gen6_fdi_link_train()
754 struct drm_device *dev = crtc->base.dev; in ivb_manual_fdi_link_train()
756 enum pipe pipe = crtc->pipe; in ivb_manual_fdi_link_train()
758 u32 temp, i, j; in ivb_manual_fdi_link_train() local
772 temp = intel_de_read(dev_priv, reg); in ivb_manual_fdi_link_train()
773 temp &= ~FDI_RX_SYMBOL_LOCK; in ivb_manual_fdi_link_train()
774 temp &= ~FDI_RX_BIT_LOCK; in ivb_manual_fdi_link_train()
775 intel_de_write(dev_priv, reg, temp); in ivb_manual_fdi_link_train()
780 drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR before link train 0x%x\n", in ivb_manual_fdi_link_train()
787 temp = intel_de_read(dev_priv, reg); in ivb_manual_fdi_link_train()
788 temp &= ~(FDI_LINK_TRAIN_AUTO | FDI_LINK_TRAIN_NONE_IVB); in ivb_manual_fdi_link_train()
789 temp &= ~FDI_TX_ENABLE; in ivb_manual_fdi_link_train()
790 intel_de_write(dev_priv, reg, temp); in ivb_manual_fdi_link_train()
793 temp = intel_de_read(dev_priv, reg); in ivb_manual_fdi_link_train()
794 temp &= ~FDI_LINK_TRAIN_AUTO; in ivb_manual_fdi_link_train()
795 temp &= ~FDI_LINK_TRAIN_PATTERN_MASK_CPT; in ivb_manual_fdi_link_train()
796 temp &= ~FDI_RX_ENABLE; in ivb_manual_fdi_link_train()
797 intel_de_write(dev_priv, reg, temp); in ivb_manual_fdi_link_train()
801 temp = intel_de_read(dev_priv, reg); in ivb_manual_fdi_link_train()
802 temp &= ~FDI_DP_PORT_WIDTH_MASK; in ivb_manual_fdi_link_train()
803 temp |= FDI_DP_PORT_WIDTH(crtc_state->fdi_lanes); in ivb_manual_fdi_link_train()
804 temp |= FDI_LINK_TRAIN_PATTERN_1_IVB; in ivb_manual_fdi_link_train()
805 temp &= ~FDI_LINK_TRAIN_VOL_EMP_MASK; in ivb_manual_fdi_link_train()
806 temp |= snb_b_fdi_train_param[j/2]; in ivb_manual_fdi_link_train()
807 temp |= FDI_COMPOSITE_SYNC; in ivb_manual_fdi_link_train()
808 intel_de_write(dev_priv, reg, temp | FDI_TX_ENABLE); in ivb_manual_fdi_link_train()
814 temp = intel_de_read(dev_priv, reg); in ivb_manual_fdi_link_train()
815 temp |= FDI_LINK_TRAIN_PATTERN_1_CPT; in ivb_manual_fdi_link_train()
816 temp |= FDI_COMPOSITE_SYNC; in ivb_manual_fdi_link_train()
817 intel_de_write(dev_priv, reg, temp | FDI_RX_ENABLE); in ivb_manual_fdi_link_train()
822 for (i = 0; i < 4; i++) { in ivb_manual_fdi_link_train()
824 temp = intel_de_read(dev_priv, reg); in ivb_manual_fdi_link_train()
825 drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp); in ivb_manual_fdi_link_train()
827 if (temp & FDI_RX_BIT_LOCK || in ivb_manual_fdi_link_train()
830 temp | FDI_RX_BIT_LOCK); in ivb_manual_fdi_link_train()
831 drm_dbg_kms(&dev_priv->drm, in ivb_manual_fdi_link_train()
838 if (i == 4) { in ivb_manual_fdi_link_train()
839 drm_dbg_kms(&dev_priv->drm, in ivb_manual_fdi_link_train()
854 for (i = 0; i < 4; i++) { in ivb_manual_fdi_link_train()
856 temp = intel_de_read(dev_priv, reg); in ivb_manual_fdi_link_train()
857 drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp); in ivb_manual_fdi_link_train()
859 if (temp & FDI_RX_SYMBOL_LOCK || in ivb_manual_fdi_link_train()
862 temp | FDI_RX_SYMBOL_LOCK); in ivb_manual_fdi_link_train()
863 drm_dbg_kms(&dev_priv->drm, in ivb_manual_fdi_link_train()
870 if (i == 4) in ivb_manual_fdi_link_train()
871 drm_dbg_kms(&dev_priv->drm, in ivb_manual_fdi_link_train()
876 drm_dbg_kms(&dev_priv->drm, "FDI train done.\n"); in ivb_manual_fdi_link_train()
880 * connection to the PCH-located connectors. For this, it is necessary to train
890 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in hsw_fdi_link_train()
891 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in hsw_fdi_link_train()
892 u32 temp, i, rx_ctl_val; in hsw_fdi_link_train() local
895 encoder->get_buf_trans(encoder, crtc_state, &n_entries); in hsw_fdi_link_train()
901 * - TP1 to TP2 time with the default value in hsw_fdi_link_train()
902 * - FDI delay to 90h in hsw_fdi_link_train()
913 rx_ctl_val = dev_priv->display.fdi.rx_config | FDI_RX_ENHANCE_FRAME_ENABLE | in hsw_fdi_link_train()
915 FDI_DP_PORT_WIDTH(crtc_state->fdi_lanes); in hsw_fdi_link_train()
925 drm_WARN_ON(&dev_priv->drm, crtc_state->shared_dpll->info->id != DPLL_ID_SPLL); in hsw_fdi_link_train()
931 /* Configure DP_TP_CTL with auto-training */ in hsw_fdi_link_train()
944 ((crtc_state->fdi_lanes - 1) << 1) | in hsw_fdi_link_train()
953 /* Enable PCH FDI Receiver with auto-training */ in hsw_fdi_link_train()
969 temp = intel_de_read(dev_priv, DP_TP_STATUS(PORT_E)); in hsw_fdi_link_train()
970 if (temp & DP_TP_STATUS_AUTOTRAIN_DONE) { in hsw_fdi_link_train()
971 drm_dbg_kms(&dev_priv->drm, in hsw_fdi_link_train()
980 if (i == n_entries * 2 - 1) { in hsw_fdi_link_train()
981 drm_err(&dev_priv->drm, "FDI link training failed!\n"); in hsw_fdi_link_train()
1015 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in hsw_fdi_disable()
1036 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in ilk_fdi_pll_enable()
1037 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in ilk_fdi_pll_enable()
1038 enum pipe pipe = crtc->pipe; in ilk_fdi_pll_enable()
1040 u32 temp; in ilk_fdi_pll_enable() local
1044 temp = intel_de_read(dev_priv, reg); in ilk_fdi_pll_enable()
1045 temp &= ~(FDI_DP_PORT_WIDTH_MASK | (0x7 << 16)); in ilk_fdi_pll_enable()
1046 temp |= FDI_DP_PORT_WIDTH(crtc_state->fdi_lanes); in ilk_fdi_pll_enable()
1047 temp |= (intel_de_read(dev_priv, TRANSCONF(dev_priv, pipe)) & TRANSCONF_BPC_MASK) << 11; in ilk_fdi_pll_enable()
1048 intel_de_write(dev_priv, reg, temp | FDI_RX_PLL_ENABLE); in ilk_fdi_pll_enable()
1060 temp = intel_de_read(dev_priv, reg); in ilk_fdi_pll_enable()
1061 if ((temp & FDI_TX_PLL_ENABLE) == 0) { in ilk_fdi_pll_enable()
1062 intel_de_write(dev_priv, reg, temp | FDI_TX_PLL_ENABLE); in ilk_fdi_pll_enable()
1071 struct drm_device *dev = crtc->base.dev; in ilk_fdi_pll_disable()
1073 enum pipe pipe = crtc->pipe; in ilk_fdi_pll_disable()
1091 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in ilk_fdi_disable()
1092 enum pipe pipe = crtc->pipe; in ilk_fdi_disable()
1094 u32 temp; in ilk_fdi_disable() local
1101 temp = intel_de_read(dev_priv, reg); in ilk_fdi_disable()
1102 temp &= ~(0x7 << 16); in ilk_fdi_disable()
1103 temp |= (intel_de_read(dev_priv, TRANSCONF(dev_priv, pipe)) & TRANSCONF_BPC_MASK) << 11; in ilk_fdi_disable()
1104 intel_de_write(dev_priv, reg, temp & ~FDI_RX_ENABLE); in ilk_fdi_disable()
1119 temp = intel_de_read(dev_priv, reg); in ilk_fdi_disable()
1121 temp &= ~FDI_LINK_TRAIN_PATTERN_MASK_CPT; in ilk_fdi_disable()
1122 temp |= FDI_LINK_TRAIN_PATTERN_1_CPT; in ilk_fdi_disable()
1124 temp &= ~FDI_LINK_TRAIN_NONE; in ilk_fdi_disable()
1125 temp |= FDI_LINK_TRAIN_PATTERN_1; in ilk_fdi_disable()
1128 temp &= ~(0x07 << 16); in ilk_fdi_disable()
1129 temp |= (intel_de_read(dev_priv, TRANSCONF(dev_priv, pipe)) & TRANSCONF_BPC_MASK) << 11; in ilk_fdi_disable()
1130 intel_de_write(dev_priv, reg, temp); in ilk_fdi_disable()
1152 dev_priv->display.funcs.fdi = &ilk_funcs; in intel_fdi_init_hook()
1154 dev_priv->display.funcs.fdi = &gen6_funcs; in intel_fdi_init_hook()
1157 dev_priv->display.funcs.fdi = &ivb_funcs; in intel_fdi_init_hook()